SGS Thomson Microelectronics 74ALVCH16373T Datasheet

LOW VOLTAGE CMOS 16-BITD-TYPE LATCH (3-STATE)

WITH 3.6V TOLERANT INPUTS AND OUTPUTS

■ 3.6V TOLERANT INPUTS AND OUTPUTS

■ HIGH SPEED :

t

= 3.6 ns (MAX.) at VCC=3.0to3.6V

PD

t

= 4.5 ns (MAX.) at VCC=2.3to2.7V

PD

t

= 6.5 ns (MAX.) atVCC= 1.65V

PD

■ POWER DOWN PROTECTION ON INPUTS

AND OUTPUTS

■ SYMMETRICAL OUTPUT IMPEDANCE:

|=IOL= 24mA (MIN) at VCC=3.0V

|I

OH

|I

|=IOL= 18mA (MIN) at VCC=2.3V

OH

|I

|=IOL=4mA(MIN)atVCC= 1.65V

OH

■ OPERATING VOLTAGE RA NGE:

V

(OPR) = 1.65V to 3.6V

CC

■ BUS HOLD PROVIDED ON DATA INPUTS

■ PIN AND FUNCTION COMPATIBLE WITH

74 SERIES 16373

■ LATCH-UP PERFORMANCE EXCEEDS

300mA (JESD 17)

■ ESD PERFORMANCE:

HBM > 2000V (MIL STD 883 method 3015); MM > 200V

74ALVCH16373

TSSOP

ORDER CODES

PACKAGE TUBE T & R

TSSOP 74ALVCH16373TTR

PIN CONNECTION

DESCRIPTION

The 74ALVCH16373 is a low voltage CMOS 16 BIT D-TYPE LATCH with 3 STATE OUTPUTS NON INVERTING fabricated with sub-micron silicon gate and five-layer metal wiring C

2

MOS technology. It is ideal for low power and very high speed 1.65 to 3.6V applications; it can be interfaced to 3.6V signal environment for bot h inputs and outputs. These 16 bit D-TYPE latches are bite controlled by two latc h enable inputs (nLE) and tw o output enable inputs (OE

). While the nLE input is held at a high level, the nQ outputs will follow the data input precisely. When the nLE is taken low, the nQ outputs will be in a normal logic state (high or low logic level) and while high level the outputs will be in a high impedance state.This device is designed to be used with 3 state memory address drivers, etc. Active bus-hold circuitry holds unused or und riv en inputs at a valid logic state. All inputs and outputs are equipped with protection circuits aga inst static discharge, giving them 2KV ESD immunity and transient excess voltage.

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74ALVCH16373

INPUT AND OUTPUT EQUIVALENT CIRCUIT

PIN DESCRIPTION

PIN No SYMBOL NAME AND FUNCTION

1 1OE

2, 3,5, 6, 8,9,

11, 12

13,14,16,17,

19, 20, 22, 23

24 2OE

25 2LE Latch Enable Input

36,35,33,32,

30, 29, 27, 26

47,46,44,43,

41, 40, 38, 37

48 1LE Latch Enable Input

4, 10, 15, 21, 28, 34, 39, 45

7, 18, 31, 42 V

1Q0 to 1Q7 3-State Outputs

2Q0 to 2Q7 3-State Outputs

2D0 to 2D7 Data Inputs

1D0 to 1D7 Data Inputs

GND Ground (0V)

CC

3 State Output Enable Input (Active LOW)

Positive Supply Voltage

TRUTH TABLE

INPUTS OUTPUT

OE

HXX Z

L L X NO CHANGE * LHL L LHH H

X : Don‘tCare Z : High Impedance * : Qoutputs are latched atthe time when theLEinput istakenlow

logiclevel.

LE D Q

IEC LOGIC SYMBOLS

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74ALVCH16373

LOGIC DIAGRAM

ABSOLUTE MAXIMUM RATINGS

Symbol Parameter Value Unit

V

CC

V V V

I

IK

I

OK

I

or I

I

CC

P

T

stg

T

Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied

absolute maximum rating must be observed

1) I

O

2) V

<GND,VO>V

O

Supply Voltage DC Input Voltage

I

DC Output Voltage (OFF State)

O

DC Output Voltage (High or Low State) (note 1) -0.5 to VCC+ 0.5

O

DC Input Diode Current DC Output Diode Current (note 2) DC Output Current

O

DC VCCor Ground Current per Supply Pin

GND

Power Dissipation

D

Storage Temperature Lead Temperature (10 sec)

L

CC

-0.5 to +4.6 V

-0.5 to +4.6 V V

-50 mA

± 50 mA

± 100 mA

400 mW

-65 to +150 °C

300 °C

RECOMMENDED OPERATING CONDITIONS

Symbol Parameter Value Unit

V

CC

V V V

I

OH,IOL

I

OH,IOL

I

OH,IOL

T

dt/dv Input Rise and Fall Time (note 1) 0 to 10 ns/V

1) VINfrom0.8Vto2V at VCC=3.0V

Supply Voltage Input Voltage

I

Output Voltage (OFF State)

O

Output Voltage (High or Low State) 0 to V

O

High or Low Level Output Current (VCC= 3.0 to 3.6V) High or Low Level Output Current (VCC= 2.3 to 2.7V) High or Low Level Output Current (VCC= 1.8V) Operating Temperature

op

1.65 to 3.6 V

-0.3 to 3.6 V 0 to 3.6 V

CC

± 24 mA ± 12 mA

± 4mA

-55 to 125 °C

V

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74ALVCH16373

DC SPECIFICATIONS

Test Condition Value

Symbol Parameter

V

I

IHOLD

High Level Input

IH

Voltage

V

Low Level Input

IL

Voltage

High Level Output

OH

Voltage

Low Level Output

OL

Voltage

Input Leakage

I

Current Bus Hold Input

Leakage Current

Power Off Leakage

I

off

Current

I

High Impedance

OZ

Output Leakage Current

I

∆I

Quiescent Supply

CC

Current

CCICC

incr. per Input 3.0 to 3.6 VIH=VCC- 0.6V 500 750 µA

V

CC

(V)

-40 to 85 °C -55 to 125 °C

Min. Max. Min. Max.

1.65 to 1.95 0.65 Vcc 0.65 Vcc

2.3 to 2.7 1.7 1.7

2.7 to 3.6 2.0 2.0

1.65 to 1.95 0.35 Vcc 0.35 Vcc

2.3 to 2.7 0.7 0.7

2.7 to 3.6 0.8 0.8

1.65 to 3.6

1.65

2.3

2.7

3.0

1.65 to 3.6

1.65

2.3

2.7

3.0

3.6

1.65

2.3

3.0

3.6 0V

3.6 V

3.6 VI=VCCor GND

IO=-100 µAVCC-0.2 VCC-0.2

I

=-4 mA

O

=-6 mA

I

O

=-12 mA

I

O

=-12 mA

I

O

=-12 mA

I

O

=-24 mA

I

O

=100 µA

I

O

=4 mA

I

O

=6 mA

I

O

=12 mA

I

O

=12 mA

I

O

=24 mA

I

O

= 0 or 3.6V

V

I

VI=0.58 V

=1.07 V

V

I

=0.7 V

V

I

=1.7 V

V

I

=0.8 V

V

I

=2 V

V

I

= 0 to 3.6V

V

I

or VO= 3.6V 10 20 µA

I

or V

I=VIH

VO= 0 to V

IL

CC

1.2 1.2

2.0 2.0

1.7 1.7

2.2 2.2

2.4 2.4

2.0 2.0

0.2 0.2 V

0.45 0.45

0.4 0.4

0.7 0.7

0.4 0.4

0.55 0.55 ± 5 ± 5 µA

+25 +25

-25 -25

+45 +45

-45 -45

+75 +75

-75 -75

± 500 ± 500

± 5 ± 10 µA

20 40 µA

I

=0

O

Unit

V

µA

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