SGS Thomson Microelectronics 74ACT32701LBR, 74ACT32701LB Datasheet

16-BIT D-TYPE LATCH PULS 16-BIT BUS BUFFER

WITH 3-STATE OUTPUTS (NON INVERTED)

■ HIGH SPEED: t

■ LOW POWER DISSIPATION:

I

=8µA(MAX.) atTA=25°C

CC

■ COMPATIBLE WITHTTL OUTPUTS

V

=2V(MIN.),VIL= 0.8V (MAX.)

IH

■ SYMMETRICAL OUTPUT IMPEDANCE:

|I

|=IOL= 24mA (MIN) at VCC=4.5V

OH

■ BALANCED PROPAGATION DELAYS:

t

≅ t

PLH

PHL

■ OPERATING VOLTAGE RANG E:

V

(OPR) = 4.5V to 5.5V

CC

■ FUNCTION COMPATIBLE WITH SERIES

16373 AND 16245 (244)

■ IMPROVED LATCH-UP IMMUNITY

■ IMPROVED ESD IMMUNITY

DESCRIPTION

The 74ACT16244 is a low voltage CMOS 16-BIT
D-TYPE LATCHand 16 BIT BUS TRANSCEIVER
with 3-STATE ou tput non inverting fabricated with
sub-micron silicon gate and double-layer metal
wiring C

2

MOS technology.
Both functions can be used as 16 bit or dual octal
devices,so the 16 bittransceivercan be used ad 8
bit bus buffer plus 8 bit tran scei ver, or only 16 bit
buffer in selec t direction.

= 4.8ns (TYP.) at VCC=5V

PD

74ACT32701

PRELIMINARY DATA

LFBGA96

(Top and Bottom view)

ORDER CODES

PACKAGE TRAY T & R

LFBGA96 74ACT32701LB 74ACT32701LBR

This d ev ice can be used to integrate in one chip
the internal logic component required to S TV 0701
to work ad P.O.D. interface in Digital TV
application. It is ideal for low power and high
speed 4.5 to 5.5. applications.
All inputs and outputs are equipped with
protection circuits against st atic discharge, giving
them ESD immunity and transient excess voltage.

LOGIC DIAGRAM

1/9July 2003

This is preliminary information on a new product now in development are or undergoing evaluation. Details subject to change without notice.

74ACT32701

PIN CONNECTION (Top view)

TERMINAL ASSIGNMENT

ABCDEFGHJKLMNPRT

61D2 1D4 1D6 1D8 2D2 2D4 2D6 2D7 3A2 3A4 3A6 3A8 4A2 4A4 4A6 4A7
5 1D1 1D3 1D5 1D7 2D1 2D3 2D5 2D8 3A1 3A3 3A5 3A7 4A1 4A3 4A5 4A8
4 1LE GND
3 1OE GND

V

CC

V

CC

GND GND
GND GND

V

GND 2LE 3G GND

CC

V

GND 2OE 3DIR GND

CC

2 1Q1 1Q3 1Q5 1Q7 2Q1 2Q3 2Q5 2B8 3B1 3B3 3B5 3B7 4B1 4B3 4B5 4B8

V

CC

V

CC

GND GND
GND GND

V

CC

V

CC

GND 4G
GND 4DIR

1 1Q2 1Q4 1Q6 1Q8 2Q2 2Q4 2Q6 2B7 3B2 3B4 3B6 3B8 4B2 4B4 4B6 4B7

INPUT AND OUTPUT EQUIVALENT CIRCUIT TRUTH TABLE (e ac h 8bit section of 16bit Latch)

INPUTS OUTPUT

OE

LE D Q

LHHH
LHLL
LLX

Q

0

HXXZ

TRUTH TABLE (each 8bit s ection of 16bit
Transceiver)

INPUTS

G

DIR

L L B data to A bus
L H A data to B bus

H X Isolation

X : Don‘tCare
Z : High Impedance

OPERATION

2/9

74ACT32701

ABSOLUTE MAXIMUM RATINGS

Symbol Parameter Value Unit

V

V

V

I

I

OK

I

or I

I

CC

T

T

Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is
not implied.

RECOMMENDED OPERATING CONDITIONS

Symbol Parameter Value Unit

V

V
V
T

dt/dv

1) VINfrom0.8V to 2.0V

Supply Voltage

CC

DC Input Voltage -0.5 to VCC+ 0.5

I

DC Output Voltage -0.5 to VCC+ 0.5

O

DC Input Diode Current

IK

DC Output Diode Current
DC Output Current

O

DC VCCor Ground Current

GND

Storage Temperature

stg

Lead Temperature (10 sec)

L

Supply Voltage

CC

Input Voltage 0 to V

I

Output Voltage 0 to V

O

Operating Temperature

op

Input Rise and Fall Time V

= 4.5 to 5.5V (note 1)

CC

-0.5 to +7 V

± 20 mA
± 20 mA
± 50 mA

± 400 mA

-65 to +150 °C
300 °C

4.5 to 5.5 V

CC
CC

-40 to 85 °C
8 ns/V

V
V

V
V

3/9