SGS Thomson Microelectronics 74ACT20M, 74ACT20B Datasheet

74ACT20
DUAL 4-INPUT NAND GATE
HIGH SPEED: t
LOW POWER DISSIPATION:
I
= 4µA(MAX.) at TA=25°C
CC
COMPATIBLE WITH TTL OU TP U TS
V
= 2V (M IN.), VIL = 0.8V (MAX.)
IH
50 TRANSMISSION LINE DRIVING
= 5ns (TYP.) at VCC = 5V
PD
CAPABILITY
SYMMETRICAL OUTPUT IMPEDANCE:
|I
| = IOL = 24mA (MIN)
OH
BALANCED PROPAGATION DELAYS:
t
t
PLH
OPERATING VOLTAGE RANGE:
V
CC
PIN AND FUNCTION COMPATIBLE WITH
PHL
(OPR) = 4.5V to 5.5V
74 SERIES 20
IMPROVED LATCH-UP IMMUNITY
DESCRIPTION
The 74ACT20 is an advanced high-speed CMOS DUAL 4-INPUT NAND GATE fabricated with sub-micron silicon gate and double-layer metal wiring C
2
MOS tecnology. The internal circuit is composed of 3 stages in­cluding buffer output, which enables high noise
TSSOPDIP SOP
ORDER CODES
PACKAGE TUBE T & R
DIP 74ACT20B
SOP 74ACT20M 74ACT20MTR
TSSOP 74ACT20TTR
immunity and stable output. The device is designed to interface directly High Speed CMOS systems with TTL, NMOS and CMOS output voltage levels. All inputs and outputs are equipped w ith protec­tion circuits a gainst static discharge, giving them 2KV ESD immunity and transient excess voltage.
PIN CONNECTION AND IEC LOGIC SYMBOLS
1/8April 2001
74ACT20
INPUT AND OUTPUT EQUIVALENT CIRCUIT PIN DESCRIPTION
PIN No SYMBOL NAME AND FUNCTION
1, 9 1A to 2A Data Inputs 2, 10 1B to 2B Data Inputs 3, 11 1C to 2C Data Inputs 5, 13 1C to 2D Data Inputs
6, 8 1Y to 2Y Data Outputs
7 GND Ground (0V)
14
TRUTH TABLE
ABCDY
LXXXH XLXXH XXLXH XXXLH HHHHL
X : Don’t Ca re
ABSOLUTE MAXIMUM RATINGS
V
CC
Positive Supply Voltage
Symbol Parameter² Value Unit
V
V
V
I
I
OK
I
I
or I
CC
T
T
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied.
Supply Voltage
CC
DC Input Voltage -0.5 to VCC + 0.5
I
DC Output Voltage -0.5 to VCC + 0.5
O
DC Input Diode Current
IK
DC Output Diode Current DC Output Current
O
DC VCC or Ground Current
GND
Storage Temperature
stg
Lead Temperature (10 sec)
L
-0.5 to +7 V V V
± 20 mA ± 20 mA ± 50 mA
± 100 mA
-65 to +150 °C 300 °C
RECOMMENDED OPERATING CONDITIONS
Symbol Parameter Value Unit
V
V
V
T
dt/dv
1) VIN from 0.8V to 2.0V
Supply Voltage
CC
Input Voltage 0 to V
I
Output Voltage 0 to V
O
Operating Temperqture
op
Input Rise and Fall Time V
= 4.5 to 5.5V (note 1)
CC
4.5 to 5.5 V
CC CC
-55 to 125 °C 8 ns/V
V V
2/8
DC SPECIFICATIONS
Test Condition Value
T
Symbol Parameter
V
CC
(V)
V
V
V
V
I
CCT
I
I
OLD
I
OHD
1) Maxim um test durati on 2ms, one out put loade d at time
2) Incid ent wave sw i tc hi ng is guaranteed on t ransmiss i on l i nes with impedances as low as 50
High Level Input
IH
Voltage Low Level Input
IL
Voltage High Level Output
OH
Voltage
Low Level Output
OL
Voltage
I
Input Leakage Cur-
I
rent Max ICC/Input
Quiescent Supply
CC
Current Dynamic Output
Current (note 1, 2)
4.5 VO = 0.1 V or V
-0.1V
CC
4.5 VO = 0.1 V or V
5.5 1.5 0.8 0.8 0.8
4.5
5.5
4.5
5.5
4.5
5.5
4.5
5.5
V
5.5
5.5
V
5.5
V
5.5
V
-0.1V
CC
=-50 µA
I
O
I
=-50 µA
O
I
=-24 mA
O
I
=-24 mA
O
=50 µA
I
O
I
=50 µA
O
I
=24 mA
O
I
=24 mA
O
= VCC or GND
I
VI = VCC - 2.1V
= VCC or GND
I
= 1.65 V max
OLD
= 3.85 V min
OHD
= 25°C
A
Min. Typ. Max. Min. Max. Min. Max.
2.0 1.5 2.0 2.0
1.5 0.8 0.8 0.8
4.4 4.49 4.4 4.4
5.4 5.49 5.4 5.4
3.86 3.76 3.7
4.86 4.76 4.7
0.001 0.1 0.1 0.1
0.001 0.1 0.1 0.1
0.36 0.44 0.5
0.36 0.44 0.5
± 0.1 ± 1 ± 1 µA
0.6 1.5 1.6 mA 44080µA
74ACT20
-40 to 85°C -55 to 125°C
75 50 mA
-75 -50 mA
Unit
V5.5 2.0 1.5 2.0 2.0
V
V
AC ELECTRICAL CHARACTERISTICS (CL = 50 pF, RL = 500 , Input tr = tf = 3ns)
Test Condition Value
T
Symbol Parameter
t
PLH tPHL
(*) Vol tage range is 5. 0V ± 0.5V
Propagation Delay Time
V
5.0
(V)
CC
= 25°C
A
Min. Typ. Max. Min. Max. Min. Max.
(*)
1.5 5.0 7.2 1.0 9.5 1.0 9.5 ns
-40 to 85°C -55 to 125°C
Unit
CAPACITIVE CHARACTERISTICS
Test Condition Value
T
Symbol Parameter
V
CC
(V)
C
C
1) CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without
load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. I
Input Capacitance
IN
Power Dissipation
PD
Capacitance (note 1)5.0
5.0 3.8 pF
= 10MHz
f
IN
= 25°C
A
Min. Typ. Max. Min. Max. Min. Max.
33 pF
-40 to 85°C -55 to 125°C
= CPD x VCC x fIN + ICC/2 (per gate)
CC(opr)
Unit
3/8
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