SGS-THOMSON M54HC423, M54HC423A, M74HC423, M74HC423A Technical data

M54HC423

M54HC423/423A

M74HC423/423A

DUAL RETRIGGERABLE MONOSTABLE MULTIVIBRATOR

.HIGH SPEED

.tPD = 25 ns (TYP) at VCC = 5V LOW POWER DISSIPATION

STANDBYSTATE ICC=4 μA (MAX.) AT TA=25°C

.ACTIVE STATE ICC = 700 μA (MAX.)AT VCC=5V HIGH NOISE IMMUNITY

.VNIH = VNIL = 28 % VCC (MIN.) OUTPUT DRIVE CAPABILITY

.10 LSTTL LOADS

SYMMETRICAL OUTPUT IMPEDANCE

.IOH = IOL = 4 mA (MIN.)

BALANCED PROPAGATION DELAYS

.tPLH = tPHL

WIDE OPERATING VOLTAGE RANGE

.VCC (OPR) = 2 V TO 6 V

WIDE OUTPUT PULSE WIDTH RANGE

.tWOUT = 120 ns 60 s OVER AT VCC = 4.5 V PIN AND FUNCTION COMPATIBLE WITH 54/74LS423

DESCRIPTION

B1R	F1R
(Plastic Package)	(Ceramic Package)

M1R	C1R
(Micro Package)	(Chip Carrier)
ORDER CODES :
M54HCXXXF1R	M74HCXXXM1R
M74HCXXXB1R	M74HCXXXC1R

PIN CONNECTIONS (top view)

The M54/74HC423/423A are high speed CMOS MONOSTABLE multivibrators fabricated with silicon gate C2MOS technology.

They achieve the high speed operation similar to equivalent LSTTL while maintaining the CMOS low power dissipation. There are two trigger inputs, A INPUT (negative edge) and B INPUT (positive edge). These inputs are valid for rising/falling signals, (tr ± tf ± 1 sec). After triggering the output maintains the MONOSTABLE state for the time period determined by the external resistor Rx and capacitor Cx.

Two different pulse width constant are available: K 0.46 for HC423 K 1 for HC423A.

Taking CLR low breaks this MONOSTABLE STATE. If the next trigger pulse occurs during the MONOSTABLEperiod it makes the MONOSTABLE period longer. Limit for values of Cx and Rx :

Cx : NO LIMIT

Rx : VCC < 3.0 V 5 K Ω to 1 M Ω VCC ≥ 3.0 V 1 K Ω to 1 M Ω

All inputs are equipped with protection circuits against static discharge and transient excess voltage.

NC =

No Internal

Connection

October 1993

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M54/M74HC423/423A

SYSTEM DIAGRAM

TIMING CHART

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M54/M74HC423/423A

BLOCK DIAGRAM

Note :

(1)Cx, Rx, Dx are external components.

(2)Dx is a clamping diode.

The external capacitor is charged to VCC inthe stand-by state, i.e. no trigger. When the supply voltage is turned off Cx is discharged mainly through an internal parasitic diode (see figures). If Cx is sufficiently large and VCC decreases rapidy, there will be some possibility of damaging the I.C. with a surge current or latch-up. If the voltage supply filter capacitor is large enough and VCC decrease slowly, the surge current is automatically limited and damage the I.C. is avoided. The maximum forward current of the parasitic diode is approximately 20 mA. In cases where Cx is large the time taken for the supply voltage to fall to 0.4 VCC can be calculated as follows :

tf ≥ (VCC ± 0.7) Cx/20mA

In cases where tf is too short an external clamping diode is required to protect the I.C. from the surge current.

FUNCTIONAL DESCRIPTION

STAND-BY STATE

The external capacitor, Cx, is fully charged to VCC in the stand-by state. Hence, before triggering, transistor Qp and Qn (connected to the Rx/Cx node) are both turned-off. The two comparators that control the timing and the two reference voltage sources stop operating. The total supply current is therefore only leakage current.

TRIGGER OPERATION

Triggering occurs when :

1 st) A is ºlowº and B has a falling edge ; 2 nd) B is ºhighº and A has a rising edge ;

3 rd) A is low and B is high and C1 has a rising edge.

After the multivibrator has been retriggered comparator C1 and C2 start operating and Qn is turned on. Cx then discharges through Qn. The voltage at the node R/C external falls.

When it reaches VREFL the output of comparator C1 becomes low. This in turn resets the flip-flop and Qn is turned off.

At this point C1 stops functioning but C2 continues to operate.

The voltage at R/C external begins to rise with a time constant set by the external components Rx, Cx.

Triggering the multivibrator causes Q to go high after internal delay due to the flip-flop and the gate. Q remains high until the voltage at R/C external rises again to VREFH. At this point C2 output goes low and O goes low. C2 stop operating. That means that after triggering when the voltage R/C external returns to VREFH the multivibrator has returned to its MONOSTABLE STATE. In the case where Rx Cx are large enough and the discharge time of the capacitor and the delay time in the I.C. can be ignored, the width of the output pulse tw (out) is as follows :

tW(OUT) = 0.46 Cx Rx (HC423)

tW(OUT) = Cx Rx (HC423A)

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M54/M74HC423/423A

FUNCTIONAL DESCRIPTION (continued)

RE-TRIGGERED OPERATION

When a second trigger pulse follows the first its effect will depend on the state of the multivibrator. If the capacitor Cx is being charged the voltage level of R/C external falls to Vrefl again and Q remains high i.e. the retrigger pulse arrives in a time shorter than the period Rx Cx seconds, the capacitor charging time constant. If the second trigger pulse is very close to the initial trigger pulse it is ineffective ; i.e. the second trigger must arrive in the capacitor discharge cycle to be ineffective; Hence the

minimum time for a second trigger to be effective depends on VCC and Cx.

RESET OPERATION

CL is normally high. If CL is low, the trigger is not effective because Q output goes low and trigger control flip-flop is reset.

Also transistor Op is turned on and Cx is charged quicky to VCC. This means if CL input goes low, the IC becomes waiting state both in operating and non operating state.

TRUTH TABLE

		INPUTS			OUTPUTS	NOTE
	A	B	CL	Q	Q
		H	H			OUTPUT ENABLE
	X	L	H	L	H	INHIBIT
	H	X	H	L	H	INHIBIT
	L		H			OUTPUT ENABLE
	X	X	L	L	H	INHIBIT
	X: Don't Care	Z: High Impedance

INPUT AND OUTPUT EQUIVALENT CIRCUIT

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		M54/M74HC423/423A
PIN DESCRIPTION		IEC LOGIC SYMBOL
PIN No	SYMBOL	NAME AND FUNCTION
1, 9	1A, 2A	Trigger Inputs (Negative
		Edge Triggered)
2, 10	1B, 2B	Trigger Inputs (Positive
		Edge Triggered)
3, 11	1CLR,	Direct Reset (Active LOW)
	2CLR
4, 12	1Q, 2Q	Outputs (Active LOW)
7	2REXT/CEXT	External Resistor
		Capacitor Connection
13, 5	1Q, 2Q	Outputs (Active HIGH)
14, 6	1CEXT	External Capacitor
	2CEXT	Connection
15	1REXT/CEXT	External Resistor
		Capacitor Connection
8	GND	Ground (0V)
16	VCC	Positive Supply Voltage
ABSOLUTE MAXIMUM RATING

Symbol	Parameter	Value	Unit
VCC	Supply Voltage	-0.5 to +7	V
VI	DC Input Voltage	-0.5 to VCC + 0.5	V
VO	DC Output Voltage	-0.5 to VCC + 0.5	V
IIK	DC Input Diode Current	± 20	mA
IOK	DC Output Diode Current	± 20	mA
IO	DC Output Source Sink Current Per Output Pin	± 25	mA
ICC or IGND	DC VCC or Ground Current	± 50	mA
PD	Power Dissipation	500 (*)	mW
Tstg	Storage Temperature	-65 to +150	oC
TL	Lead Temperature (10 sec)	300	oC

Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these condition isnotimplied.

(*) 500 mW: 65 oC derate to 300 mW by 10mW/oC: 65 oC to 85 oC

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