SGS-THOMSON M2716 Technical data

查询M27128A-1F1供应商

2048 x 8 ORGANIZATION
525mW Max AC TIVE PO W E R, 132mW Max

STANDBY POWER
ACCESS TIME:
– M2716-1 is 350ns
– M2716 is 450ns
SINGLE 5V SUPPLY VOLTAGE
STATIC-NO CLOCKS REQUIRED
INPUTS and OUTP UT S TT L CO MPAT IBL E

DURING BOTH REA D and PROG RA M
MODES

THREE-STATE OUTPUT with TIED-OR­CAPABILITY

EXTENDED TEMPERATURE RANGE
PROGRAMMING VOLTAGE: 25V

M2716

NMOS 16K (2K x 8) UV EPROM

24

1

FDIP24W (F)

Figure 1. Logic Diag ra m

DESCRIPTION

The M2716 is a 16,384 bit UV erasable and elec­trically programmable memory EPROM, ideally
suited for applications where fast turn around and
pattern experimentation are important require­ments.

The M2716 is housed in a 24 pin Window Ceramic
Frit-Seal Dual-in-Line pac kage. The transparent lid
allows the user to expose the chip t o ultraviolet light
to erase the bit patt ern. A new pattern can then b e
written to the devic e by following t he programmi ng
procedure.

T able 1. Signal Names

A0 - A10 Address Inputs
Q0 - Q7 Data Outputs
EP Chip Enable / Program
G Output Enable
V

PP

V

CC

Program Supply
Supply Voltage

CC

M2716

V

SS

V

PP

8

AI00784B

V

11

A0-A10 Q0-Q7

EP

G

V

SS

July 1994 1/9

Ground

M2716

T ab le 2. Absol ute Maxim um Ratin gs

Symbol Parameter Value Unit

T

A

T

BIAS

T

STG

V

CC

V

IO

V

PP

P

D

Note: Except for the rating "Operating Temperature Range", stresses above those listed in the Table "Absolute Maximum Ratings" may cause
permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those
indicated in the Operating sections of this spec ific ati on is not implied. Expos u re to Absolute Maximum Rat ing conditions for extended periods
may affect device reliability. Refer also to the SGS-THOMSON SURE Program and other relevant quality documents.

Ambient Operating T emperat ure grade 1

grade 6

Temperature Under Bias grade 1

grade 6
Storage Temperature –65 to 125 °C
Supply Voltage –0.3 to 6 V
Input or Output Voltages –0.3 to 6 V
Program Supply –0.3 to 26.5 V
Power Dissipation 1.5 W

0 to 70

–40 to 85
–10 to 80

–50 to 95

°C

°C

Figure 2. DIP Pin Connection s

A7

1
2

A6

3

A5
A4

4
5

A3

6

A2
A1

A0
Q0
Q1
Q2

V

SS

M2716

7
8
9
10
11
12

24
23
22
21
20
19
18
17
16
15
14
13

AI00785

V

CC

A8
A9
V

PP

G
A10
EP
Q7
Q6
Q5
Q4
Q3

DEVICE OPER ATION

The M2716 has 3 m odes of operation in the norm al
system environment . These are shown in Table 3.

Read Mode. The M2716 read operation requires

G = VIL, EP = VIL and that addresses A0-A10

that
have been stabilized. Valid data will appear on the
output pins after time t

AVQV

, t

GLQV

or t

ELQV

(see
Switching T ime Waveforms) depending on which is
limiting.

Deselect Mode. The M2716 is deselected by mak-

G = VIH. This mode is independent of EP a nd

ing
the condition of the addresses. The outputs are
Hi-Z when

G = VIH. This allows tied-OR of 2 or more

M2716’s for memory expansion.
Standby Mode (Power Down). The M2716 may

be powered down to the standby mode by making
EP = VIH. This is indep endent of G and automat­ically puts the outputs in the Hi- Z state. The power
is reduced to 25% (132 mW max) of the normal
operating power . V
at 5V . Acces s time at power up remains either t
or t

(see Switching Tim e W avefor ms ).

ELQV

and VPP must be maintained

CC

A VQV

Programming

The M2716 is shipped from SG S-THOMSO N com­pletely erased. All bits will be at “1" level (output
high) in this initial state and after any full erasure.
Table 3 shows the 3 programming modes.

Program Mode. The M2716 is programmed by
introducing “0"s into the desired locations. This is
done 8 bit s (a byte) at a time. Any individual a ddress,
sequenti a l a dd res ses, or ad d re ss es c hos en at ran­dom may be progr ammed. Any or all of the 8 bits
associated with an ad dress location may be pro­grammed wi th a single program pulse a pplied to the
EP pin. A ll input voltag e levels includin g the program
pulse on chip enable are TTL comp atible.

The programming sequence is: with V

= 25V , V

PP

CC

= 5V , G = VIH and EP = VIL, an address is selected
and the desired data word is applied to the output
pins (V

= “0" and VIH = ”1" for both address and

IL

data). After the address and data signals are stable
the program pin is pulsed from V

to VIH with a

IL

2/9

M2716

DEVICE OPER ATION (cont’d)

pulse width between 45ms and 55ms. Multiple
pulses are not needed but will not cause device
damage. No pins should be left open. A high level

or higher) must not b e maintained longer than

(V

IH

(max) on the program pin during program-

t

PHPL

ming. M2716’s may be programmed in parallel in
this mode.

Program Verify Mode. The programming of the
M2716 may be verified either one byte at a time
during the programming (as shown in Figure 6) or
by reading all of the bytes out at the end of the
programming sequence. This can be done with

= 25V or 5V in either case. VPP must be at 5 V

V

PP

for all operating modes and can be maintained at
25V for all programming modes.

Program Inhibit Mode. The program inhibit mode
allows several M2716’s to be programmed simul­taneously with different data for each one by con­trolling which ones receive the program pulse. All
similar inputs of the M2716 may be paralleled.
Pulsing the program pin (from V

to VIH) will pro-

IL

gram a unit while inhibiting the program pulse to a
unit will keep it from being programmed and k eep-

G = VIH will put its outputs in the Hi-Z state.

ing

ERASURE OPER ATION

The M2716 is erased by exposure to high intensity
ultraviolet light through the transparent window.
This exposure discharges the floating gate to its
initial state through induced photo current. It is
recommended that t he M2716 be kept out of direct
sunlight. The UV c ontent of s unlight may cause
a partial erasure of som e bits in a relativ ely short
period of time.

An ultraviolet source of 2537 Å yielding a total
integrated dosage of 15 watt-seconds/cm

2

power
rating is used. The M2716 to be erased should be
placed 1 inch away from the lamp and no filters
should be used.

An erasure system should be calibrated peri­odically. The erasure time is increased by the
square of the distance (if the distance is doubled
the erasure time goes up by a factor of 4). Lamps
lose intensity as they age, it is therefore important
to periodically check that the UV system is in good
order.

This will ensure that the EPROMs are being com­pletely erased. Incomplete erasure will cause
symptoms that can be misleading. Programmers,
components, and system designs have been erro­neously suspected when incomplete erasure was
the basic problem.

Table 3. Operating Modes

Mode EP GVPPQ0 - Q7

Read V
Program V
Verify V
Program Inhibit V
Deselect X V
Standby V

Note: X = VIH or VIL.

IL

Pulse V

IH

IL

IL

IH

V

IL

IH

V

IL

V

IH

IH

XVCCHi-Z

V

CC

V

PP

VPP or V

V

PP

V

CC

CC

Data Out

Data In

Data Out

Hi-Z
Hi-Z

3/9

M2716

AC MEASUREMENT CONDITIONS

Input Rise and Fall Times ≤ 20ns

Figure 4. AC T esti ng Load Circui t

1.3V

Input Pulse Voltages 0.45V to 2.4V
Input and Output Timing Ref. Voltages 0.8V to 2.0V

1N914

Note that Output Hi-Z is defined as the point where data
is no longer driven.

3.3kΩ

Figure 3. AC Te st ing Input Outpu t W avefo rm s

2.4V

0.45V

T ab le 4. Capacitance

(1)

(TA = 25 °C, f = 1 MHz )

2.0V

0.8V

AI00827

DEVICE
UNDER

TEST

CL = 100pF

CL includes JIG capacitance

Symbol Parameter Test Condition Min Max Unit

C

IN

C

OUT

Note: 1. Sampled only, not 100% tested.

Input Capacitance VIN = 0V 6 pF
Output Capacitance V

= 0V 12 pF

OUT

OUT

AI00828

T ab le 5. Read Mode DC Characteristics

(1)

(TA = 0 to 70 °C or –40 to 85 °C; VCC = 5V ± 5% or 5V ± 10%; VPP = VCC)

Symbol Parameter Test Condition Min Max Unit

I

I

LO

I

CC

I

CC1

I

PP

V

V
V
V

Note: 1. VCC must be applied simultaneously with or before VPP and removed simultaneously or after VPP.

Input Leakage Current 0 ≤ VIN ≤ V

LI

Output Leakage Current V

= VCC, EP = V

OUT

Supply Current EP = VIL, G = V
Supply Current (Standby) EP = VIH, G = V
Program Current VPP = V
Input Low Voltage –0.1 0.8 V

IL

Input High Voltage 2 VCC + 1 V

IH

Output Low Voltage IOL = 2.1mA 0.45 V

OL

Output High Voltage IOH = –400µA 2.4 V

OH

CC

CC

IL

IL

CC

±10 µA
±10 µA

100 mA

25 mA

5mA

4/9

M2716

T ab le 6. Read Mode AC Charact eristics

(1)

(TA = 0 to 70 °C or –40 to 85 °C; VCC = 5V ± 5% or 5V ± 10%; VPP = VCC)

Symbol Alt Parameter Test Condition

t

AVQV

t

ELQV

t

GLQV

t

EHQZ

t

GHQZ

t

AXQX

Notes: 1. VCC must be applied simultaneously with or before VPP and removed simultaneously or after VPP.

t

Address Valid to Output Valid EP = VIL, G = V

ACC

t

Chip Enable Low to Output Valid G = V

CE

t

Output Enable Low to Output Valid EP = V

OE

(2)

t

Chip Enable High to Output Hi-Z G = V

OD

(2)

t

Output Enable High to Output Hi-Z EP = V

DF

t

Address Transition to Output Transition EP = VIL, G = V

OH

2. Sampled only, not 100% tested.

IL

IL

IL

IL

IL

IL

-1 blank

Min Max Min Max

0 100 0 100 ns
0 100 0 100 ns
00ns

Figure 5. Read Mode AC Wavefo rms

A0-A10

tAVQV

VALID

tAXQX

M2716

Unit

350 450 ns
350 450 ns
120 120 ns

EP

tGLQV

G

tELQV

Q0-Q7

T ab le 7. Programming Mode DC Charact erist ics

DATA OUT

(1)

tEHQZ

tGHQZ

(TA = 25 °C; VCC = 5V ± 5%; VPP = 25V ± 1V)

Symbol Parameter Test Condition Min Max Unit

I

LI

I

CC

I

PP

I

PP1

V

IL

V

IH

Note: 1. VCC must be applied simultaneously with or before VPP and removed simultaneously or after VPP.

Input Leakage Current VIL ≤ VIN ≤ V

IH

Supply Current 100 mA
Program Current 5 mA
Program Current Pulse EP = VIH Pulse 30 mA
Input Low Voltage –0.1 0.8 V
Input High Voltage 2 VCC + 1 V

±10 µA

Hi-Z

AI00786

5/9

M2716

Tab le 8. Programmin g Mode AC Characteri stics

(1)

(TA = 25 °C; VCC = 5V ± 5%; VPP = 25V ± 1V)

Symbol Alt Parameter Test Condition Min Max Units

t

AVPH

t

QVPH

t

GHPH

t

PL1PL2

t

PH1PH2

t

PHPL

t

PLQX

t

PLGX

t

GLQV

t

GHQZ

t

PLAX

Notes: 1. VCC must be applied simultaneously with or before VPP and removed simultaneously or after VPP.

2. Sampled only, not 100% tested.

t
t
t

t

t
t
t
t

t

t

t

Address Valid to Program High G = V

AS

Input Valid to Program High G = V

DS

Output Enable High to Program

OS

IH

IH

High
Program Pulse Rise Time 5 ns

PR

Program Pulse Fall Time 5 ns

PF

Program Pulse Width 45 55 ms

PW

Program Low to Input Transition 2 µs

DH

Program Low to Output Enable

OH

Transition
Output Enable to Output Valid EP = V

OE

Output Enable High to Output Hi-Z 0 100 ns

DF

Program Low to Address Transition 2 µs

AH

IL

2 µs
2 µs

2 µs

2 µs

120 ns

Figure 6. Programming and Verify Modes AC Waveforms

6/9

A0-A10

Q0-Q7

G

EP

tAVPH

tQVPH

tGHPH

DATA IN

PROGRAM

tPLGX

tPHPL

tPLQX

VALID

tGLQV

tPLAX

DATA OUT

tGHQZ

VERIFY

AI00787

ORDERI NG INFO RM ATION SCHEME

Example: M2716 -1 F 1

M2716

Speed and VCC T olerance

-1 350 ns, 5V ±10%

blank 450 ns, 5V ±5%

For a list of available options (Speed, V

T olerance, Package, etc ...) refer to the current Memory Shor tform

CC

Package

F FDIP24W

Temperature Range

1 0 to 70 °C
6 –40 to 85 °C

catalogue.
For further information o n any aspect of this device, please contact SGS-THOM SON Sales O ffice nearest

to you.

7/9

M2716

FDIP24W - 24 pin Ceramic Frit-seal DIP, with window

Symb

Typ Min Max Typ Min Max

A 5.71 0.225
A1 0.50 1.78 0.020 0.070
A2 3.90 5.08 0.154 0.200

B 0.40 0.55 0.016 0.022
B1 1.17 1.42 0.046 0.056

C 0.22 0.31 0.009 0.012

D 32.30 1.272

E 15.40 15.80 0.606 0.622
E1 13.05 13.36 0.514 0.526
e1 2.54 – – 0.100 – –
e3 27.94 – – 1.100 – –
eA 16.17 18.32 0.637 0.721

L 3.18 4.10 0.125 0.161

S 1.52 2.49 0.060 0.098

∅ 7.11 – – 0.280 – –

α 4° 15° 4° 15°

N24 24

FDIP24W

mm inches

Drawing is not to scale

8/9

B1 B e1

e3

D

S

N

∅

1

A2

A1AL

Cα

eA

E1 E

FDIPW-a

M2716

Information furnished is believed to be accurate and reliable. However, SGS-THOMSON Microelectronics assumes no responsibility for the
consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No
license is granted by implication or otherwise under any patent or patent rights of SGS-THOMSON Microelectronics. Specificat ions mentioned
in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied.
SGS-THOMSON Microelectronics products are not authorized for use as critical components in life support devices or systems without express
written approval of SGS-THOMSON Microelectronics.

© 1994 SGS-THOMSON Microelectronics - All Rights Reserved

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Singapore - Spain - Sweden - Switzerland - Taiwan - Thailand - United Kingdom - U.S.A.

SGS-THOMSON Microelectronics GROUP OF COMPANIES

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