SGS-THOMSON HCC40192B, HCF40192B, HCC40193B, HCF40193B Technical data
查询HCC/HCF40192B供应商
PRESETTABLE UP/DOWN COUNTERS (DUAL CLOCK
WITH RESET) 40192B – BCD TYPE40193B – BINARY TYPE
.INDIVIDUAL CLOCK LINES FOR COUNTING
UP ORCOUNTINGDOWN
.SYNCHRONOUS HIGH-SPEED CARRY AND
BORROWPROPAGATIONDELAYSFORCASCADING
.ASYNCHRONOUS RESETAND PRESET CA-
PABILITY
.MEDIUM-SPEED OPERATION - f
(typ.)@ 10V
CL
.STANDARDIZED SYMMETRICAL OUTPUT
CHARACTERISTICS
.5V, 10V, AND 15V PARAMETRIC RATINGS
.INPUT CURRENTOF100nA AT 18V AND25°C
FOR HCC DEVICE
.100% TESTEDFOR QUIESCENTCURRENT
.MEETSALLREQUIREMENTSOFJEDECTEN-
TATIVESTANDARDN°13A,”STANDARD SPECIFICATIONS FOR DESCRIPTION OF ”B”
SERIESCMOS DEVICES”
= 8MHz
HCC/HCF40192B
HCC/H CF4 01 93B
EY
(Plastic Package)F(Ceramic Frit Seal Package)
M1
(Chip Carrier)
ORDER CODES :
HCC401XXBF HCF401XXBM1
HCF401XXBEY HCF401XXBC1
(Plastic Chip Carrier)
C1
DESCRIPTI ON
The HCC40192B, HCC40193B, (extended tem-
peraturerange) and the HCF40192B, HCF40193B
(intermediate temperature range) are monolithic integrated circuits, available in 16-lead dual in-line
plastic or ceramic package and platic micro package. The HCC/HCF40192B Presettable BCD
Up/DownCounter and theHCC/HCF40193B Pres-
ettable BinaryUp/Down Counter each consist of 4
synchronously clocked, gated ”D” type flip-flops
connected as a counter. The inputs consist of 4 individual jam lines,a PRESET ENABLE control, individual CLOCK UP and CLOCK DOWN signals
and a master RESET. Four buffered Q signal outputs as well as CARRY and BORROW outputs for
multiple-stage counting schemesareprovided. The
counter is cleared so that all outputs are in a low
stateby a high on the RESET line. A RESET isaccomplished asynchronously with the clock. Each
output is individually programmable asynchronouslywith theclocktothelevelonthecorresponding
jaminputwhenthePRESETENABLEcontrol islow.
The counter counts up one count on the positive
clock edge of the CLOCK UP signal provided the
CLOCK DOWN line is high. The counter counts
down one count on the positive clock edge of the
CLOCKDOWN signal provided the CLOCK UP line
PIN CONNECTIONS
June1989
1/15
HCC/HCF40192B/193B
is high.TheCARRYandBORROWsignals arehigh
when the counter is counting up or down. The
CARRY signal goes low one-half clock cycle after
thecounterreaches itsmaximumcountinthecountup mode. The BORROW signal goes low one-half
clock cycle after the counter reaches its minimum
FUN CTIONAL DIAG R A M
count in the count-down mode. Cascading of
multiple packages is easily accomplished without
the need foradditional externalcircuitrybytying the
BORROW and CARRY outputs to the CLOCK
DOWN and CLOCK UP inputs, respectively, of the
succeeding package.
ABSOLUTE MAXIMUM RATIN GS
Symbol Parameter Value Unit
V
* Supply Voltage :HC C Types
DD
HCF Types
V
Input Voltage – 0.5 to VDD+ 0.5 V
i
I
DC Input Current (any one input) ± 10 mA
I
P
Total Power Dissipation (per package)
tot
– 0.5 to + 20
– 0.5 to + 18
200
V
V
mW
Dissipation per Output Transistor
for Top= Full Package-temperature Range
T
Operating Temperature : HCC Types
op
HCF Types
T
Stresses above those listed under ”Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress
rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections
of this specification is not implied. Exposure to absolute maximum rating conditions for external periods may affect device reliability.
* All voltages are with respect to VSS(GND).
Storage Temperature – 65 to + 150 °C
stg
100
– 55 to + 125
–40to+85
mW
°C
°C
RECOMMENDED OPERATING CO NDITIONS
Symbol Parameter Value Unit
V
T
Supply Voltage : HCC Types
DD
HCF Types
V
Input Voltage 0 to V
I
Operating Temperature : HCC Types
op
HCF Types
3to18
3to15
DD
– 55 to + 125
–40to+85
V
V
V
°C
°C
2/15
LOGI C DI AGRAMS
40192B (BCD).
HCC/HCF40192B/193B
40193B (Binary).
3/15
HCC/HCF40192B/193B
TIM ING D IAG R AMS
40192B (BCD).
40193B (Binary).
4/15
InternalLogic of Flip-flop.
TRUTH TABLE
HCC/HCF40192B/193B
Clock
Up
–
/
–
–
\
–
1
1
X X 0 0 Preset
X X X 1 Reset
1 = High Level 0 = Low Level X = Don’t Care.
Clock
Down
1 1 0 Count Up
1 1 0 No Count
–
/
–
–
\
–
Pres et
Enab l e
1 0 Count Down
1 0 No Count
Reset Action
5/15
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