The SC1531(A) is designed to maintain a glitch-free 3.3V
output when at least one of two inputs, 5V (VIN) and
3.3V (VAUX), is present.
Whenever VIN exceeds a predetermined threshold value,
the internal 3.3V linear regulator is enabled, and DR is
pulled high.
When VIN falls below a lower threshold value, DR is pulled
low and the internal linear regulator is turned off. DR has
been designed to drive the gate of an external low
threshold P-channel MOSFET, which can be used to
connect the 3.3V supply directly to the regulator output.
This ensures an uninterrupted 3.3V output even if VIN
falls out of specification. A typical R
of 400mW is
DS(ON)
recommended (320mW for SC1531A).
When both supplies are simultaneously available, the
drive pin (DR) will be pulled High, turning off the external
PMOS switch.
The internal 5V detector has its upper threshold (for VIN
rising) set to 4.18V (typical) while the lower threshold (for
VIN falling) is at 4.05V (typical) giving a hysteresis of
approximately 130mV.
u Glitch-free transition between input sources
u Internal logic selects input source
u Gate drive for external PMOS bypass switch
u 5V detection with hysteresis
u 1% regulated output voltage accuracy
u 200mA load current capability (250mA for SC1531A)
u Remote sense
u SO-8 package
Applications
u Desktop Computers
u Network Interface Cards (NICs)
u PCMCIA/PCI Interface Cards
u Cardbus
u Power supplies with multiple input sources
TM
Technology
The SENSE pin, which is connected to the load, connects
internally to the inverting input of the LDO error
amplifier. It enables tight regulation of the load voltage
(while the 5V supply is present) despite variations in load
current.
The SC1531(A) is available in the popular SO-8 surface
mount package.
Typical Application Circuit
5V
3.3V
C1
0.1uF
C2
4.7uF
C3
0.1uF
1
2
3
45
Notes for Typical Application Circuit:
(1) External switch (Q1): use Motorola MGSF1P02ELT1
or equivalent (PMOS, typical Gate Threshold Voltage =
1V, typical R
= 0.4W at VGS = 2.5V) for SC1531. Use
DS(ON)
Vishay Si2301DS or equivalent for SC1531A.
(2) Connection of VAUX (pin 3) is optional.
Q1
U1
VIN
NC
VAUX
SENSE
GNDNC
SC1531
DR
VO
8
7
6
C4
4.7uF
C5
0.1uF
3.3V OUT
Revision 1, December 2000
1www.semtech.com
POWER MANAGEMENT
Absolute Maximum Rating
retemaraPlobmySmumixaMstinU
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egatloVylppuSyrailixuAXUAV7+ot5.0-V
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)A1351CS(tnerruCtuptuOODLI
tneibmAotnoitcnuJecnadepmIlamrehT
esaCotnoitcnuJecnadepmIlamrehT
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.ceS01)gniredloS(erutarepmeTdaeLT
gnitaRDSEV
O
O
q
AJ
q
CJ
A
J
GTS
DAEL
DSE
002Am
052Am
031W/C°
74W/C°
07+ot5-C°
521+ot5-C°
051+ot56-C°
003C°
2Vk
Electrical Characteristics
Unless specified: TA = 25°C, VIN = 5V, VAUX = 3.3V, IO = max. rated, CO = 4.7µF. Values in bold apply over full operating temperature range.
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NIV
egatloVylppuSNIVV0=XUAV3.40.55.5V
tnerruCtnecseiuQI
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I,V0=XUAV,V5=NIV
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O
0.21
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NIV
I,V0=NIV,V6.3=XUAV
Am0=0.101Aµ
O
02
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tnerruCtnecseiuQI
)XUA(Q
I,V0=NIV,V3.3=XUAV
Am0=8.05.1Am
O
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Am0=6.00.1Am
O
0.2
NIVmorFegakaeLesreveRI
XUAV
I,V0=XUAV,V5.5=NIV
Am0=705Aµ
O
001
2ã 2000 Semtech Corp.www.semtech.com
SC1531(A)
POWER MANAGEMENT
Electrical Characteristics (Cont.)
Unless specified: TA = 25°C, VIN = 5V, VAUX = 3.3V, IO = max. rated, CO = 4.7µF. Values in bold apply over full operating temperature range.
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£ I
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See next page for Notes.
RD
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3ã 2000 Semtech Corp.www.semtech.com
SC1531(A)
POWER MANAGEMENT
Electrical Characteristics (Cont.)
Notes:
(1) Guaranteed by design.
(2) See 5V Detect Thresholds below.
(3) Recommended source impedance for 5V supply: £ 0.25W (0.2W for SC1531A). This will ensure that
x R
I
O
(4) In Application Circuit on page 1.
(5) See Timing Diagram below.
SOURCE
< V
, thus avoiding DR toggling during 5V detect threshold transitions.
HYST
5V Detect Thresholds
(1)
Note:
(1) VIN rise and fall times (10% to 90%) to be ³ 100µs.
Timing Diagram
(1)
Note:
(1) VIN rise and fall times (10% to 90%) to be £ 100ns.
4ã 2000 Semtech Corp.www.semtech.com
POWER MANAGEMENT
SC1531(A)
Pin Configuration
Block Diagram
(TOP VIEW)
(SOIC-8)
Ordering Information
)1(
rebmuNtraP
RT.SC1351CSAm0028-OS
RT.SCA1351CSAm0528-OS
Note:
(1) Only available in tape and reel packaging. A reel
contains 2500 devices.
Auxiliary Quiescent Current vs. Auxiliary Input Voltage
vs. Junction Temperature, VIN = 0V
0.6
IO = 0mA
VIN = 0V
0.5
0.4
(mA)
0.3
Q(AUX)
I
0.2
0.1
0
00.3 0.6 0.9 1.2 1.5 1.8 2.1 2.4 2.733.3 3.6
VAUX (V)
-5°C
25°C
125°C
LDO Output Voltage vs.
Quiescent Current vs. Main Input Voltage
vs. Junction Temperature, VAUX = 3.3V
10
IO = 0mA
9
VAUX = 3.3V
8
7
6
5
(mA)
Q
I
4
3
2
1
0
0123456
VIN (V)
-5°C
25°C
125°C
Auxiliary Quiescent Current vs. Auxiliary Input Voltage
vs. Junction Temperature, VIN = 5V
0.7
IO = 0mA
VIN = 5V
0.6
0.5
0.4
mA
0.3
Q(AUX)
I
0.2
0.1
0
00.3 0.6 0.9 1.2 1.5 1.8 2.1 2.4 2.733.3 3.6
VAUX (V)
-5°C
25°C
125°C
Junction Temperature
3.34
IO = 200mA
3.33
VIN = 5V
3.32
3.31
(V)
3.30
O
V
3.29
3.28
3.27
3.26
-250255075100125
T
(°C)
J
6ã 2000 Semtech Corp.www.semtech.com
POWER MANAGEMENT
Typical Characteristics (Cont.)
SC1531(A)
(1)
Drive High Delay
Trace 1: VIN stepping from 3V to 5.5V
Trace 2: DR going high at V
TH(HI)
tDH < 225ns
Drive Low Delay
Trace 1: VIN stepping from 5.5V to 3V
Trace 2: DR going low at V
TH(LO)
tDL < 125ns
VO(MIN) With VIN Rising
(2)
Trace 1: VIN with 3A charging a 1500uF capacitor
Trace 2: DR going high at V
TH(HI)
Trace 3: VO, offset 3.3V. VO(MIN) = 3.19V
VO(MIN) With VIN Falling
(2)
Trace 1: VIN - discharging a 1500uF capacitor
Trace 2: DR going low at V
TH(LO)
Trace 3: VO, offset 3.3V. VO(MIN) = 3.14V
7ã 2000 Semtech Corp.www.semtech.com
POWER MANAGEMENT
(
)
Typical Characteristics (Cont.)
SC1531(A)
(1)
Load Transient Response
Trace 1: VO
Trace 2: I
stepping from 0mA to 200mA
O
Notes:
(1) In Application Circuit on page 1.
(2) IO = 200mA.
Load Transient Response
Trace 1: VO
Trace 2: IO stepping from 200mA to 0mA
Applications Information
Introduction
The SC1531(A) is intended for applications such as power
managed PCI and network interface cards (NICs), where
operation from a 3.3V VAUX supply may be required when
the 5V supply has been shut down. It provides a very
simple, low cost solution that uses very little pcb real
estate. During regular operation, 3.3V power for the PCI
card is provided by the SC1531(A)s on-board low
dropout regulator, generated from the 5V supply. When
the 5V supply is removed and 3.3V VAUX is available, the
SC1531(A) connects this supply directly to its output
using a tiny SOT-23 external p-channel FET. Connection
of pin 3 (VAUX) to the 3.3V supply is optional, and adds
active pull-down to the Drive pin.
Component Selection
Output capacitors - Semtech recommends a minimum
bulk capacitance of 4.7µF at the output, along with a
0.1µF ceramic decoupling capacitor. Increasing the bulk
capacitance will improve the overall transient response.
The device is very tolerant of capacitor value and ESR
variations, in fact, any combination of capacitors with
C ³ 4.7µF and ESR < 1W is sufficient for stability. This
target is easily met using surface mount ceramic or
tantalum capacitors.
Input capacitors (5V) - Semtech recommends the use of
a 4.7µF ceramic or tantalum capacitor plus a 0.1µF
ceramic capacitor at the input. This allows for the device
being some distance from any bulk capacitance on the
rail. Additionally, input droop due to load transients is
reduced, improving load transient response.
Input capacitors (3.3V) - Semtech recommends
decoupling this pin (if used) with a 0.1µF ceramic
capacitor.
P-channel bypass FET - selection of the external FET is
determined by two main requirements:
1) the FET has to have a very low gate threshold
(typically ~1V) in order to be sufficiently turned on with
V
£ 3.3V.
GS
2) the FET R
must be low enough such that:
DS(ON)
VORIVAUX≥•−
)MIN()ON(DS)MAX(O
8ã 2000 Semtech Corp.www.semtech.com
POWER MANAGEMENT
(
)
(
)
Applications Information (Cont.)
SC1531(A)
(Remember that at 125°C, R
is generally 1.5x the
DS(ON)
value at 25°C.)
Thermal Considerations
When operating from the 5V supply, the power
dissipation in the SC1531(A) is approximately equal to
the product of the output current and the input to
output voltage differential:
()
IVVP•−≈
OUTOUTIND
The absolute worst-case dissipation is given by:
Note that the VAUX
(MAX)
x I
IVAUXIVOVINP•+•−=
term does not apply if
Q(AUX)
)MAX)(AUX(Q)MAX()MAX(O)MIN()MAX()MAX(D
VAUX is not available or not connected.
Inserting VIN = 5.5V, VO = 3.234V, IO = 200mA,
VAUX = 3.6V and I
W46.0P
=
)MAX(D
= 2mA yields:
Q(AUX)
Using this figure, we can calculate the maximum thermal
impedance allowable to maintain TJ £ 125°C:
TT
R
−
=
)MAX)(AJ(TH
−
P
)MAX(D
()
70125
)MAX(A)MAX(J
−
=
46.0
)MAX)(AC(TH)MAX)(CJ(TH
−−
W/C120
°=
W/C73Rtherefore,W/C47R
°=°=
This is readily achievable using pcb copper area to aid in
conducting the heat away from the device (see Figure 1
on page 10). Heatsinking the bypass FET is not
necessary - its power dissipation is given by:
()
For IO = 200mA, and R
2
RIP•=
)MAX(O)MAX(D
)MAX)(ON(DS
= 0.6W, PD = 24mW.
DS(ON)
Layout Considerations
While layout for linear devices is generally not as critical
as for a switching application, careful attention to detail
will ensure reliable operation. See Figure 1 on page 10
for a sample layout.
1) Attaching the part to a larger copper footprint will
enable better heat transfer from the device, especially
on PCBs where there are internal ground and power
planes.
2) Place the bulk and decoupling capacitors close to the
device for optimal transient response.
3) If the SENSE lead is being used, route it to the load
using a seperate trace from the main VO path. If it is not
being used, connect to pin 7 as shown.
4) The external bypass FET is shown close to the device
for convenience only. Since it is not being switched, longer
gate drive traces can be used without problem.
9ã 2000 Semtech Corp.www.semtech.com
POWER MANAGEMENT
Application Information (Cont.)
SC1531(A)
Top Copper
Figure 1: Suggested pcb layout based upon Application Circuit on Page 1.