Semtech Corporation SC1452-1.8IMSTR, SC1452-2.5IMSTR, SC1452-2.8IMSTR, SC1452-3.0IMSTR, SC1452-3.3IMSTR Datasheet

SC1452

© 2000 SEMTECH CORP. 652 MITCHELL ROAD NEWBURY PARK CA 91320

PRELIMINARY - August 7, 2000

1

DUAL 150mA LDO REGULATOR WITH
PROGRAMMABLE RESET

TYPICAL APPLICATION

FEATURES

•= Up to 150mA per regulator output

•= Low quiescent current

•= Low dropout voltage

•= Wide selection of output voltages

•= Stable operation with ceramic caps

•= Tight load and line regulation

•= Current and thermal limiting

•= Reverse input polarity protection

•= <1uA off-mode current

•= Logic controlled electronic enable

•= Programmable reset

•= Full industrial temperature range

APPLICATIONS

•= Cellular telephones

•= Palmtop/Laptop computers

•= Battery-powered equipment

•= Bar code scanners

•= SMPS post regulator/dc to dc modules

•= High efficiency linear power supplies

TEL:[phone] FAX:[phone] WEB:http://www.semtech.com

Part Numbers Package

SC1452XIMSTR

(1)(2)

MSOP-10

ORDERING INFORMATION

Notes:
(1) Where X denotes voltage options - see table on
page 5.
(2) Only available in tape and reel packaging. A reel
contains 2500 devices.

DESCRIPTION

The SC1452 is a state of the art device intended to
provide maximum perform ance and flexibility in battery
operated systems. It has been designed specifically to
fully support a single Li-Ion battery and its external
charger voltages.

The SC1452 contains two independently enabled, ultra
low dropout voltage regulators (ULDOs). It operates
from an input voltage range of 2.5V to 6.5V, and a wide
variety of output voltage options are available which are
designed to provide an initial tolerance of ±1% and
±2% over temperature.

Each regulator has an associated active-low reset s ig­nal which is asserted when the voltage output declines
below the preset threshold. Once the output recovers,
the reset continues to be asserted (delayed) for a
predetermined time, 50m s for reset A and 150ms for
reset B. In the case of regulator B, the delay time may
be reduced by the addition of an external capacitor.

The SC1452 has a bypass pin to enable the user to
capacitively decouple the bandgap reference for very
low output noise (down to 50µVrms).

The devices utilize CMOS technology to achieve very
low operating currents (typically 150µA with both out­puts supplying 150mA). The dropout voltage is typically
165mV at 150mA, helping to prolong battery life. In
addition, the devices are guaranteed to provide 400m A
of peak current for applications which require high initial
inrush current. They have been designed to be used
with low ESR ceramic capacitors to save cost and PCB
area.

The SC1452 comes in the low profile 10-lead MSOP
package.

3.3V IN
ENABLE OUTPUT A

ENABLE OUTPUT B

RESET B

RESET A

2.5V OUT

3.3V OUT

U1

SC1452JIMS

1
2
3
4
5 6

7

8

9

10

OUTA
OUTB
GND
RSTA
RSTB DLYB

ENB

BYP

ENA

IN

COUTA
1uF

CBYP
10nF

CDLYB
10nF

CIN
1uF

COUTB
1uF

SC1452

© 2000 SEMTECH CORP. 652 MITCHELL ROAD NEWBURY PARK CA 91320

PRELIMINARY - August 7, 2000

2

DUAL 150mA LDO REGULATOR WITH
PROGRAMMABLE RESET

ABSOLUTE MAXIMUM RATINGS

Parameter Symbol Maximum Units

Input Supply Voltage V

IN

-5 to +7 V

Enable Input Voltage V

EN

-5 to +V

IN

V

Operating Ambient Temperature Range T

A

-40 to +85 °C

Operating Junction Temperature Range T

J

-40 to +125 °C

Storage Temperature T

STG

-60 to +150 °C

Thermal Resistance Junction to Ambient

θ

JA

113 °C/W

Thermal Resistance Junction to Case

θ

JC

42 °C/W

ESD Rating (Human Body Model) ESD 2 kV

ELECTRICAL CHARACTERISTICS

Unless specified: TA = 25°C, VIN = V

OUT

+ 1V, I

OUTA

= I

OUTB

= 1mA, C

OUT

= 1.0 µF, V

ENA

= V

ENB

= VIN. Values in bold apply over full operati ng

temperature range.

Parameter Symbol Condition Min Typ Max Units
IN

Input Supply Voltage V

IN

2.5 6.5

V

Quiescent Current I

Q

V

ENA

= 0V, V

ENB

= VIN, I

OUTB

= 150mA or 90 150 µA

V

ENB

= 0V, V

ENA

= VIN, I

OUTA

= 150mA

200

V

ENA

= V

ENB

= VIN, I

OUTA

= I

OUTB

= 150mA 150 240 µA

300

V

ENA

= V

ENB

= 0V (OFF) 0.5 1 µA

2

OUTA, OUTB

Output Voltage V

OUT

I

OUT

= 1mA -1% V

OUT

+1% V

0mA ≤ I

OUT

=≤ 150mA, V

OUT

+1V ≤=V

IN

≤=5.5V

-2% +2%

Line Regulation REG

(LINE)

V

OUT

+ 1V ≤ V

IN

≤ 5.5V, I

OUT

= 1mA

510mV

12

Load Regulation REG

(LOAD)

0.1mA ≤=I

OUT

≤=150mA

-5 -15 mV

-30

Dropout Voltage V

D

I

OUT

= 1mA 1.1 mV

I

OUT

= 50mA 55 75 mV

120

I

OUT

=150mA 165 250 mV

300

Current Limit I

LIM

400

mA

SC1452

© 2000 SEMTECH CORP. 652 MITCHELL ROAD NEWBURY PARK CA 91320

PRELIMINARY - August 7, 2000

3

DUAL 150mA LDO REGULATOR WITH
PROGRAMMABLE RESET

ELECTRICAL CHARACTERISTICS (Cont.)

Unless specified: TA = 25°C, VIN = V

OUT

+ 1V, I

OUTA

= I

OUTB

= 1mA, C

OUT

= 1.0 µF, V

ENA

= V

ENB

= VIN. Values in bold apply over full operati ng

temperature range.

Parameter Symbol Condition Min Typ Max Units

OUTA, OUTB (Cont.)

Ripple Rejection PSRR f = 120Hz, C

BYP

= 10nF 60 dB

Output Voltage Noise e

n

f = 10Hz to 99kHz, I

OUT

= 50mA,

C

BYP

= 10nF, C

OUT

= 2.2µF

50 µV

RMS

BYP

Start-up Rise Time t

r

C

BYP

= 10nF 1.5 ms

ENABLE (ENA, ENB)

Enable Input Threshold V

IH

1.6

V

V

IL

0.4

Enable Input Current I

EN

0.2

µA

RSTA, RSTB

Reset Threshold V

TH

V

OUT

falling

88

90

92

%V

OUT

V

OUT

rising

90

92

94

Reset A Delay t

RSTA

30

50

70

ms

Reset B Delay t

RSTB

V

DLYB

= 0V

90

150

210

ms

Reset A, B Output Voltage

(1)

V

OH

I

SOURCE

= 0.5mA

80

%V

OUT

V

OL

I

SINK

= 1.2mA

0.3

V

DLYB

Delay Voltage Threshold V

DLYB

1.225

1.250

1.275

V

Delay Source Current I

DLYB

V

OUTB

< V

TH

2.1

3.0

3.9

µA

OVER TEMPERATURE PROTECTION

High Trip Level T

HI

150

°C

Hysteresis T

HYST

20

°C

NOTE:

(1) V

OHA

will be a percentage of V

OUTA

, and V

OHB

will be a percentage of V

OUTB

.

SC1452

© 2000 SEMTECH CORP. 652 MITCHELL ROAD NEWBURY PARK CA 91320

PRELIMINARY - August 7, 2000

4

DUAL 150mA LDO REGULATOR WITH
PROGRAMMABLE RESET

BLOCK DIAGRAM

SC1452

© 2000 SEMTECH CORP. 652 MITCHELL ROAD NEWBURY PARK CA 91320

PRELIMINARY - August 7, 2000

5

DUAL 150mA LDO REGULATOR WITH
PROGRAMMABLE RESET

PIN DESCRIPTIONS

Pin # Pin Name Pin Function

1 OUTA Regulator A output.
2 OUTB Regulator B output.
3 GND Ground pin.
4 RSTA Power on reset for regulator A. Active low when OUTA is below the reset threshold.
5 RSTB Power on reset for regulator B. Active low when OUTB is below the reset threshold.
6 DLYB Programmable delay for RESETB. Delay time can be set by connecting a capacitor, C

DLYB

, be-

tween this pin and ground. Ground this pin if using the default delay time.
7 ENB Active high enable pin for output B. CMOS compatible input. Connect to IN if not being used.
8 BYP Bypass pin for bandgap reference. Connect a 10nF capacitor, C

BYP

, between this pin and

ground for low noise operation.
9 ENA Active high enable pin for output A. CMOS compatible input. Connect to IN if not being used.

10 IN Input pin for both regulators.

MSOP-10

(Top View)

PIN CONFIGURATION VOLTAGE OPTIONS

Replace X in the part number (SC1452XIMS) by the letter s hown
below for the corresponding voltage option:

XV

OUTA

(V) V

OUTB

(V)

A1.81.8
B2.52.5
C2.82.8
D3.03.0
E3.33.3
F3.02.5
G3.01.8
H3.02.8

J3.32.5

K3.32.8

MARKING INFORMATION

# = Voltage options (Example: 452F)
yyww = Datecode (Example: 0008)
XXXX = Lot Number (Example: E01102)

SC1452

© 2000 SEMTECH CORP. 652 MITCHELL ROAD NEWBURY PARK CA 91320

PRELIMINARY - August 7, 2000

6

DUAL 150mA LDO REGULATOR WITH
PROGRAMMABLE RESET

voltage is reached. The delay time can be calculated by
rearranging the above equation, solving for t:

Note that the maximum delay time is 150ms, as RST B
goes high when either the internal timer or externally
set timer times out, so if t

RSTB

is set externally for
200ms, the reset delay will still be 150ms . Thus for a
150ms delay, DLYB should be grounded, and for a
delay time less than 150ms, C

DLYB

can be calculated

using the equation above, or read from the chart below.

APPLICATIONS INFORMATION

Adjusting RSTB Delay Time

RSTB, the power on reset for regulator B, can be
reduced externally by connecting a capacitor to the
delay time set pin DLYB. If DLYB is connected to
ground, the internally controlled delay time of 150ms
(typ.) will apply.

Referring to the block diagram, as the output of r egula­tor B (V

OUTB

) rises and reaches the reset threshold

voltage (92% V

OUTB(NOM)

), two things happen:

1) the internal 150ms timer starts;

2) the 3µA current source turns on, charging C

DLYB

(if

connected).
If DLYB is connected to ground, RSTB goes high

150ms after V

OUTB

crosses the threshold voltage. If a
capacitor is connected between DLYB and ground, the
voltage at DLYB can be described by the following
equation:

An internal comparator compares this voltage to a

1.25V reference, and triggers the r eset high once this

DLYB

6

DLYB

C

t103

V••=

−

DLYB

6

DLYB

RSTB

C667,416

103

25.1C

t •=

•

•

=

−

0.01

0.1

1

10

100

1000

0.1 1 10 100 1000

C

DLYB

(nF)

t

RSTB

(ms)

t

RSTB

= 150ms max.

SC1452

© 2000 SEMTECH CORP. 652 MITCHELL ROAD NEWBURY PARK CA 91320

PRELIMINARY - August 7, 2000

7

DUAL 150mA LDO REGULATOR WITH
PROGRAMMABLE RESET

DEVICE OUTLINE - MSOP-10

LAND PATTERN - MSOP- 10 - DRAWING PENDING

ECN 00-1247