The SC1110 is a low-cost, full featured, synchronous
voltage-mode controller designed to generate termination voltage in double data rate (DDR) memory systems and other applications where wide data bus need
to be actively terminated. Synchronous control of the
MOSFET half bridge allows power flowing bidirectionally. The termination voltage can be tightly
regulated to track the chipset voltage, i.e. to be exactly
50% of that at all times.
The SC1110 is ideal for low cost implementation of termination voltage supplies. SC1110 features include
temperature compensated voltage reference, triangle
wave oscillator and current sense comparator circuitry,
and allows the use of inexpensive N-channel power
switches.
The SC1110 operates at a fixed 250kHz, providing an
optimum compromise between efficiency, transient
performance, external component size, and cost.
FEATURES
•= Generates termination voltages for active termina-
tion schemes
•= 1% set point accuracy
•= For ±7A output current, transient regulation is bet-
ter than ±80mV
•= V
•= Buffered V
•= R
pin available
REFIN
sensing for over current protection in hiccup
DSON
for system usage
REFOUT
mode
•= Soft start and logic input enabling
•= 250kHz switching for best transient and efficiency
performance
•= Gate drive capable for 0.5A sourcing and sinking
APPLICATIONS
•= For DDR memory systems
•= For active termination schemes in high speed logic
PGND to GND± 0.5V
PHASE to GND-0.5 to 18V
BSTH to PHASE14V
-0.5 to 14V
Thermal Resistance Junction to Case
Thermal Resistance Junction to Ambient
Operating Temperature RangeT
Storage Temperature RangeT
Lead Temperature (Soldering) 10 secT
θ
JC
θ
JA
STG
LEAD
A
45°C/W
115°C/W
0 to 70°C
-65 to +150°C
300°C
ELECTRICAL CHARACTERISTICS
Unless specified: VCC = 4.75V to 12.6V; GND = PGND = 0V; FB = VO; V
PARAMETERCONDITIONSMINTYPMAXUNITS
POWER SUPPLY
Supply VoltageV
Supply CurrentEN = V
Line RegulationV
SINK AND SOURCE DC/DC CONTROLLER FOR
TERMINATION POWER SUPPLY APPLICATIONS
PRELIMINARY - October 9, 2000
THEORY OF OPERATION
Synchronous Buck Converter
V
TERMINATION
voltage-mode pulse width modulated (PWM) controller.
This section has all the features required to build a
high efficiency synchronous buck converter for termination of power application.
The output voltage of the synchronous converter is set
and controlled by the output of the error amplifier. The
resistive divider generates reference voltage for the
error amplifier from an external chipset voltage which
is usually 2.5V. The inverting input of the error amplifier
receives its voltage from the SENSE pin.
power is provided by a synchronous,
SC1110
R
Current Limiting
DS(ON)
The current limit threshold is set by connecting an external resistor from the V
age drop across this resistor is due to the 200µA internal sink sets the voltage at the pin. This voltage is
compared to the voltage at the PHASE node. This
comparison is made only when the high-side drive is
high to avoid false current limit triggering due to uncontributing measurements from the MOSFET’s offvoltage. When the voltage at PHASE is less than the
voltage at OCSET, an overcurrent condition occurs
and the soft start cycle is initiated. The synchronous
switcher turns off and SS/ENABLE starts to sink 2µA.
When SS/ENABLE reaches 0.8V, it then starts to
source 10µA and a new cycle begins.
supply to OCSET. The volt-
CC
The internal oscillator uses an on-chip capacitor and
trimmed precision current sources to set the oscillation
frequency to 250kHz. The triangular output of the oscillator sets the reference voltage at the inverting input
of the PWM comparator. The non-inverting input of the
comparator receives it’s input voltage from the error
amplifier. When the oscillator output voltage drops below the error amplifier output voltage, the comparator
output goes high. This pulls DL low, turning off the lowside FET, and DH is pulled high, turning on the highside FET (once the cross-current control allows it).
When the oscillator voltage rises back above the error
amplifier output voltage, the comparator output goes
low. This pulls DH low, turning off the high-side FET,
and DL is pulled high, turning on the low-side FET
(once the cross-current control allows it).
As SENSE increases, the output voltage of the error
amplifier decreases. This causes a reduction in the ontime of the high-side MOSFET connected to DH,
hence lowering the output voltage.
Under Voltage Lockout
The under voltage lockout circuit of the SC1110 assures that both the high-side MOSFET driver outputs
remain in the off state whenever the supply voltage
CC
falls
CC
rises
drops below set parameters. Lockout occurs if V
below 4.0V. Normal operation resumes once V
above 4.2V.
Soft Start
Initially, SS/ENABLE sources 10µA of current to
charge an external capacitor. The outputs of the error
amplifiers are clamped to a voltage proportional to the
voltage on SS/ENABLE. This limits the on-time of the
high-side MOSFETs, thus leading to a controlled rampup of the output voltages.
Hiccup Mode
During power up, the SS/ENABLE pin is internally
pulled low until VCC reaches the undervoltage lockout
level of 4.2V. Once V
has reached 4.2V, the SS/EN-
CC
ABLE pin is released and begins to source 10µA of
current to the external soft-start capacitor. As the softstart voltage rises, the output of the internal error amplifier is clamped to this voltage. When the error signal
reaches the level of the internal triangular oscillator,
which swings from 1V to 2V at a fixed frequency of 250
kHz, switching occurs. As the error signal crosses
over the oscillator signal, the duty cycle of the PWM
signal continues to increase until the output comes into
regulation. If an over-current condition has not occurred the soft-start voltage will continue to rise and
level off at about 2.2V.
An over-current condition occurs when the high-side
drive is turned on, but the PHASE node does not
reach the voltage level set at the OCSET pin. The
PHASE node is sampled only once per cycle during the
valley of the triangular oscillator. Once an over-current
occurs, both the high-side and low-side drivers turn off
and the SS/ENABLE pin begins to sink 2uA. The softstart voltage will begin to decrease as the 2uA of current discharges the external capacitor. When the softstart voltage reaches 0.8V, the SS/ENABLE pin will begin to source 10uA and begin to charge the external
capacitor causing the soft-start voltage to rise again.
Again, when the soft-start voltage reaches the level of
the internal oscillator, switching will occur.
If the over-current condition is no longer present, normal operation will continue. If the over-current condition is still present, the SS/ENABLE pin will again begin
to sink 2uA. This cycle will continue indefinitely until
the over-current condition is removed.