Datasheet UR8HC007-001-FQ Datasheet (Semtech)

1

80

61

20

21

40

41

60

GIO30/AD0

GIO17/SW17

GIO16/SW16

EX1CLK

EX0CLK

IPCLK

EX1DAT

EX0DAT

IPDAT

EPX5

DA

GIO21/SW1/±INT1

GIO20/SW0/±INT0

GIO13/SW13

GIO12/SW12

GIO11/SW11

GIO10/SW10

ATN/CTS

SCLK/ISEL

MISO/TXD

PWM1 PWM0

R7 R6 R5 R4 R3 R2 R1 R0

VDD

AVREF

AVSS

EPX10

EPX9 EPX1

EPX0 GIO33/AD3 GIO32/AD2 GIO31/AD1

SS/RTS

WKUP

EPX6

EPX7

EPX8

EPX4C0C1C2C3C4C5C6C7C8C9

C10

C11

C12

C13

UR8HC007-001-FQ

C14 C15 EPX3 EPX2 GIO14/SW14 GIO15/SW15 GIO00/LED0 GIO01/LED1 GIO02/LED2 GIO03/LED3 VSS OSCO OSCI PS2EN HSUS RESET VSS1 LID PWROK MOSI/RXD

JunoTMUR8HC007-001

Input Device and Power Management

Companion IC for Jupiter Devices

Juno is a trademark of Semtech Corporation. All other trademarks belong to their respective companies.

Copyright @1998-2001 Semtech Corporation DOC8-007-001-DS-108

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1

HID & SYSTEM MANAGEMENT PRODUCTS, H/PC IC FAMILY

DESCRIPTION FEATURES

• Typically consumes less than 1 µA

• Scans a fully programmable 8 X 16 matrix that supports Japanese, English and European keyboards

• Operates continuously between 3 and 5 Volts

• Offers unique power management capabilities that work in harmony with Windows

®

CE’s power modes

• Always runs in “Stop” mode without data or event loss

• Provides three Zero-Power

TM

PS/2 ports for the hot-plug connection of external keyboards/mice & internal mouse, including MouseWheels

• Uses proprietary circuitry, so “Stop” mode is entered even when PS/2 devices are connected and active

• Available in 1.7mm high package to accommodate slim designs

• GPIO pins provide interrupt at both falling and rising edge of signals, ideal for lid functions, power, ring indicators, docking signals, battery measurement, etc.

• Has additional GPIO available for LEDs, switches, etc.

• Offers internal control of LCD brightness/contrast, audio, etc. as well as four 10-bit A/D channels for power management monitoring

• Cost-effective, reducing overall system costs by integrating features that would typically require multiple additional components

• Provides programmable features that allow for maximum design differentiation without customization

• Other JunoTMversions offer control of internal pointing device

• Jupiter devices/Professional PCs • H/PCs, Web Phones, & G3 Terminals

JunoTM01 is a member of a series of multi-functional companion ICs for Jupiter and other devices running Microsoft®Windows®CE and utilizing RISC-based processors. The IC interfaces the system via either asynchronous serial or the Serial Peripheral Interface (SPI) and provides keyboard scanning, special general purpose I/O (GPIO) and unique system power management capabilities.

The Zero-Power

TM

JunoTMwill power down even between key presses. Semtech’s proprietary circuitry (patent pending) allows the IC to power down even when PS/2 devices are connected and active. Typical power consumption is less than 1 µA, a first for embedded ICs.

The JunoTMprovides continuous operation between 3 and 5V and scans a fully programmable 8 X 16 keyboard matrix. The IC is equipped with three Zero-PowerTMPS/2 ports for the hot-plug connection of an external PS/2 keyboard and mouse as well as an internal PS/2 mouse, including those with MouseWheels.

In addition, the JunoTMoffers special general purpose I/O (GPIO), ideal for use for lid functions, power switches, ring indicators, docking signals, battery measurement, LEDs, etc.

The integration of features, many of them programmable, on one IC increases flexibility and reduces component count and cost.

PIN ASSIGNMENTS

APPLICATIONS

FUNCTIONAL DIAGRAM

ORDERING CODE

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Package options

80-pin, Plastic LQFP

Other materials

Technical Reference Manual JunoTMEvaluation Kit

Pitch in mm’s

0.5

Type

Document Evaluation Kit

TA = 0°C to +75°C

UR8HC007-001-XX-FQ

Part number

DOC8-007-001-TR-XXX EVK8-007-001-XXX

XX = Optional for customization XXX = Denotes revision number

GIO30-33 / A/D0-3

Analog Outputs

14 bit PWM0 14 bit PWM1 8 bit D/A

Power Management Unit

Configuration Status and Control Registers

Dual Mode Serial Communications Port

Analog Inputs

10 bit A/D (Shared with GI03)

GIO00-03 / LED0-3

GIO10-17 / SW / INT

GIO20-21 /

±INT0-1

Internal PS/2 Pointer

External PS/2 Port 1

External PS/2 Port 2

Keyboard Matrix Scanner

SCLK / ISEL

MOSI/RxD

MISO/TxD

SS/RTS

ATN/CTS

PWROK

LID

HSUS

Clock

Data

Clock

Data

Clock

Data

44

3

4

COL 0-15

ROW 0-7

8 2

Embedded Pointer

10

HID Manager

GPIO

PIN DEFINITIONS

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Pin Numbers Mnemonic QFP Type Name and Function Power Supply

VDD 71 PWR Positive Supply Voltage AVREF 72 AI Positive analog reference voltage AVSS 73 PWR Ground: analog signal VSS 30 PWR Ground: negative supply voltage VSS1 24 PWR Auxiliary Ground; must be tied to

pin 30

Reset

_RESET 25 I Controller hardware reset pin:

when at Low-level, this pin holds the UR8HC007in a reset state. This pin must be held at a logic-low until Power Supply voltage (VDD) reaches the minimum operating level (2.7V).

Oscillator pins

OSCI 28 I Oscillator input: connect ceramic

resonator with built-in load capacitors or CMOS clock from external oscillator 4 MHz operating frequency

_OSCO 29 O Oscillator Output: connect ceramic

resonator with built-in load capacitors or keep open if external oscillator is used

Keyboard / Event Wake-up

_WKUP 59 I/pD Wake-up: wakes up the chip if

there is a key press in the scanned keyboard matrix (Active-Low) or drives the pin High when running

Scanned matrix pins

ROW0-ROW7 62-55 I Row matrix outputs COL0-COL7 54-47 O Column matrix outputs COL8-COL11 38-35 COL12-COL13 27-26 COL14-COL15 79-78

PS/2 ports

PS2EN 27 O Control output: when Low, disables

PS/2 communications by holding the PS/2 Clock lines low

IPDAT 9 I5V/nD5V PS/2 Data line for Internal Pointing

Device

IPCLK 6 I5V/nD5V PS/2 Clock line for Internal Pointing

Device EX0DAT 8 I5V/nD5V PS/2 Data line for External Device 0 EX0CLK 5 I5V/nD5V PS/2 Clock line for External Device 0 EX1DAT 7 I5V/nD5V PS/2 Data line for External Device 1 EX1CLK 4 I5V/nD5V PS/2 Clock line for External Device 1

PIN DEFINITIONS (CON’T)

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Pin Numbers Mnemonic QFP Type Name and Function General Purpose Input/Ouput GIO0

GIO00/LED0-GIO3/LED3 34-31 I/O General purpose input/output pin,

LED driver

GIO1

GIO10/SW10-GIO15/SW15 17-14 I/O General purpose input/output pin,

36-35 Switch input

GIO16/SW16-GIO17/SW17 3-2 I5V/nD5V General purpose input/output pin,

Switch input Note: In order to have a Negative Edge Interrupt capability for SW10 - SW17, the corresponding Switch Inputs should also be connected to the extended resistive network acting on the _WKUP pin. Switch closure must be tied to Ground; the IC will remain in high power consumption mode until all the switches are released.

GIO2

GIO20/SW0/±INT0 13-12 I/O, I±Int General purpose input/output pin, GIO20/SW0/±INT0 Switch Input. Capable of Interrupt on

both Positive and Negative edges

GIO3 - analog input

GIO30/AD0 1 I/O/Ai General purpose input/output pin,

A/D input 0 GIO31/AD1 80 I/O/Ai General purpose input/output pin,

A/D input 1 GIO32/AD2 79 I/O/Ai General purpose input/output pin,

A/D input 2 GIO33/AD3 78 I/O/Ai General purpose input/output pin,

A/D input 3

Analog output

PWM0 62 O Channel 0 of Pulse Width Modulator PWM1 61 O Channel 1 of Pulse Width Modulator DA 11 Ao D/A output (Range: AVSS to AVREF)

Reserved for embedded pointing device

EPX0 77 I/O/Ai Driver, A/D EPX1 76 I/O/Ai Driver, A/D EPX2 37 I/O Control, Driver EPX3 38 I/O Control, Driver EPX4 55 I/O Control, Driver EPX5 10 I/O/Ao Control, Driver, Analog Adjustment EPX6 58 I/Ipup/O Left Button EPX7 57 I/Ipup/O Middle Button EPX8 56 I/Ipup/O Right Button EPX9 75 I/O/Ai Driver, A/D EPX10 74 I/O/Ai Driver, A/D

System status monitoring

_LID 23 I±Int Lid closed signal from the lid switch

(Active-Low). Capable of Interrupt on

both Positive and Negative edges PWROK 22 I±Int Power OK signal. Capable of Interrupt

on both Positive and Negative edges

PIN DEFINITIONS (CON’T)

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Pin Numbers

Mnemonic QFP Type Name and Function

_HSUS 26 I Host_Suspended signal

(Active-Low). When Low, indicates

that Host Computer System is in

Power-reduced or Stop mode.

Communication interface

_SS/_RTS 60 I_Int Slave_Select (SPI Mode) or

Ready_To_Send (Asynchronous

Serial Mode). Active-Low signal Input.

Low-level indicates that the Host

System has data for the UR8HC007-

001 peripheral device or the Host

System is ready to accept data from

the UR8HC007-001 peripheral device.

Capable of Interrupt on Negative edge.

Pin 60 and pin 18 should both be "Low"

for data exchange to occur. _ATN/_CTS 18 O Attention (SPI Mode) or

Clear_To_Send (Asynchronous

Serial Mode ). Active-Low signal

Output. Low-level indicates that the

UR8HC007-001 peripheral device has

data for the Host System or the

UR8HC007 peripheral device is ready

to accept data from the Host System.

Pin 18 and pin 60 should both be "Low"

for data exchange to occur. MISO/TXD 20 I/O / O Master-In-Slave-Out (SPI Mode) or

Transmit Data (Asynchronous Serial

Mode, Idle = "High" = 1) MOSI/RXD 21 I Master-Out-Slave-In (SPI Mode) or

Receive Data (Asynchronous

Serial Mode) SCLK/ISEL 19 I Serial Clock (SPI Mode) or Interface

Select (Asynchronous Serial Mode).

Tie "Low" to select Asynchronous

Serial Mode. In SPI Mode, use the

following Clock sequence: Idle-High /

Negative-Edge (Shift Data) \ Positive-

Edge (Latch Data), Idle-High.

Note 1: An underscore in front of the pin mnemonic denotes an active low signal.

JUNOTMFAMILY COMMUNICATIONS INTERFACE

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The Juno™ family of controllers implements two modes of serial communications: The "Synchronous Peripheral Interface" (SPI) mode and the "Asynchronous Serial Interface" (ASI).

The SPI is a synchronous bidirectional, multi-slave interface that supports bit rates up to 500 Kb/s. Several Hosts and companion chips implement the SPI protocol in order to communicate with a wide range of peripherals such as EEPROMs, A/D converters, MCUs and other system components. Alternatively, the SPI may be implemented through software on the Host side.

The Juno™ family implements the _ATN as an additional hand-shake signal in order to support low power operation of the bus.

The ASI is an asynchronous interface (UART type) that operates at a fixed baud rate of 62.5 Kb/s.

Both interfaces are implemented through the same set of four pins.

The IC determines the mode of communication with the Host during power-up by reading the value of the SCLK/ISEL pin. If the pin is tied low, the ASI mode is enabled. If it is high, the SPI interface is enabled.

Please refer to the Juno

TM

Technical Reference Manual for a description of handshake and critical timing parameters for each interface.

The diagrams below describe the SPI and ASI communications interfaces, respectively.

SPI Communications Interface

Host

(master)

MOSI

MISO

SCLK

_SS

_ATN

USAR Juno™

(slave)

SLAVE 2

_SS

ASI Communications Interface

Host UR8HC007

CTS

RTS

RxD

TxD

GND

CTS

RTS

RxD

TxD

ISEL

PROTOCOLS, COMMANDS AND REPORTS

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Overview

The Juno™ UR8HC007 implements and supports four types of transaction messages.

1. Commands from the UR8HC007 to the Host system

2. Commands from the Host system to the UR8HC007

3. Human Input Device (HID) reports to the system

4. Event Alert messages to the system

The protocol is fundamentally implemented through a set of general packet commands that allow handling and reporting of each individual controller register and each bit within each register. In this manner, the system achieves maximum flexibility in manipulating the operation of the UR8HC007 controller.

General Message Structure

Communications between the Juno™ UR8HC007 and the Host processor are implemented using a set of packet protocols and commands. The general structure of a message is shown in the following diagram:

General Message Format

The Protocol Header identifies the type of transaction. The following table lists the available protocols.

Protocol Headers

Protocols used in commands issued by the Host Protocol Header

Simple Commands 80H Write Register bit 81H Read Register bit 82H Write Register 83H Read Register 84H Write Block 85H Read Block 86H

Protocols used in responses, reports and alerts issued by the controller Protocol Header

Simple Commands 80H Report Register bit & Event Alerts 81H Report Register 83H Report Block 85H Pointing Device Data Report 87H Keyboard Device Data Report 88H

Protocol Header Command/Report Identifier Message Body (if applicable)

LRC

PROTOCOLS, COMMANDS AND REPORTS, (CON’T)

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HID Data Report

The Pointing Device Data Reports format covers both absolute (where applicable) and relative positioning devices. In addition, it provides support for MouseWheel-type of input devices.

Keyboard Data Report

The Keyboard Data Reports return changes on the keyboard matrix or the External PS/2 keyboard device. Keys are uniquely identified according to the Key Number table listed in Appendix A of the Juno

TM

Technical Reference Manual. The Key Up or Key Release numbers comprise the logic OR of the Key Number and 80H.

LRC (Longitudinal Redundancy Check)

The LRC is calculated for the whole packet, including the Protocol Header. The LRC is calculated by first taking the bitwise exclusive OR of all bytes from the message. If the most significant bit (MSB) of the LRC is set, the LRC is modified by clearing the MSB and changing the state of the next most significant bit. Thus, the Packet Check Byte will never consist of a valid LRC with the most significant bit set.

General Commands Format

For protocols used by either the host or the UR8HC007, a set of simple commands is implemented. These support the basic communication protocol and handle reset and errors in transmission.

A simple command would have the following structure:

Simple Command Structure

Following is a summary of the simple commands used by both the Host and the UR8HC007:

Simple Commands Summary

Command Protocol Cmd Code Description

Initialize Simple 20H Forces the recipient to enter the

known default power-on state

Initialization Complete Simple 21H Issued as a hand-shake response

only to the "Initialize" command.

Resend Request Simple 25H Issued upon error in the reception

of a package. The recipient will resend the last transmitted packet

Header (80H) Command Code LRC

REGISTERS

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The Juno™ implements a set of internal registers that can be used to control and monitor the operation of the various functional units of the controller IC. These registers can be accessed through the Read/Write Register commands described in the Commands chapter of the

Juno™ Technical

Reference Manual

. The register architecture of the Juno™ allows for maximum flexibility and expandability of the controller operation. At the same time, by using the default values for each register, a system can utilize all the basic functionality of the IC controller with minimum Host driver intervention.

Registers’ Page Organization

Registers’ Page 0

Control and Status

Registers

Page Number Register

0001255

Register Offset

Registers’ Page 1

Scanned Matrix and

Alternate Layout Keys

Registers

Page Number Register

00

01

255

Register Offset

0

1

Page Number Register

Figure 1: Registers’ Page Organization

POWER MANAGEMENT MODES OF OPERATION

POWER MANAGEMENT

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The UR8HC007 has three modes of operation relating to its power consumption.

The "Stop" mode is the lowest power consumption mode. In this mode, the crystal is stopped and the IC consumes only 1 µA of leakage current. This is the default mode to which the IC will revert any time an event or a signal condition does not force it to exit this mode.

The "Wait" mode is entered each time it is necessary for a timer to be running in order to perform a system function. Such functions include the LED blinking mode and the use of one of the PWM channels. Typical power consumption in this mode is several hundred µAs.

The "Run" mode is entered briefly, only to process an event or while an interrupt-generating signal condition persists. The controller IC will remain in this mode only for as long a signal prohibits it from reentering a lower power consumption mode or for as long as it is necessary to process a Host-related transaction (a few milliseconds).

The Juno™ UR8HC007 family of controllers implements two power management methods: system-coordinated power management and Self Power Management™ (SPM).

System-coordinated power management primarily determines the tasks performed and the type of reports communicated to the Host. The Juno™ monitors the system states through the PWROK (Power OK), _LID (Lid closed) and _HSUS (Host suspended) lines. In addition to these signal inputs, the UR8HC007 family provides a set of registers, described in the "Registers" chapter of the

JunoTMTechnical Reference Manual

, that can be used by the host to control the PM-related performance of the controller through software. According to the status of these lines (or register settings), the Juno™ will enable or disable specific tasks and reports suited to the current power and system management state of the Host.

Self Power Management™ describes a method implemented by the Juno™ controller that, independently of any system intervention, results in the lowest power consumption possible within the given parameters of its operation. Through Self Power Management™, the Juno™ controllers are capable of typically operating at only 1 µA, independent of the state of the system. Self Power Management™ primarily determines the actual power consumption of the controller IC.

The Juno™ implements the Semtech-patented Self Power Management™ method to achieve the minimum power consumption possible, independent of the Host power management state.

Even when the Host is in the active state, the IC can still operate most of the time at only 1 µA, even with external PS/2 devices attached to it.

Figure 2: USAR JunoTMState Diagram

Critical

Suspend

PWROK=0

PWROK=1

AND _LID=0

Host

Suspend

Lid

Closed*

PWROK=1 AND _LID=1

AND _HSUS=0

PWROK=1 AND _LID=0

AND _LID=0

PWROK=0

PWROK=1 AND _LID=1 AND _HSUS=0

PWROK=1 AND _LID=1 AND _HSUS=1

PWROK=1

PWROK=0

PWROK=1 AND _LID=1 AND _HSUS=1

SPM

ZERO-POWERTMOPERATION OF PS/2 PORTS

PS/2 PORTS

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The Juno™ implements the Semtech-patented "Message lossless wake-up™" method to operate all three PS/2 ports. This method enables the controller to interface with devices attached to its PS/2 ports while still operating in the "Stop" mode. Typical power consumption of the PS/2 ports is therefore 1 µA.

If a PS/2 device reports a data packet, the controller will exit the "Stop" mode for as long as it takes to process the device message and relay the information, if necessary, to the Host system. This operation is done transparently to the Host, without any message loss or any response delays from the input devices.

This unique technology allows computers to operate at their minimum power consumption state even with PS/2 devices attached. Systems that employ an internal pointing device, such as a touch pad or a force stick, can benefit the most from this feature, since the pointing device will force the controller to exit its "Stop" mode only when there is data to be reported.

The UR8HC007-001 provides three PS/2 ports for the hot-plug connection of an external keyboard, an external mouse and an internal mouse.

All of the internal and external devices are active at all times. Data from both the external and internal keyboards and mice are merged and seamlessly presented to the system.

5-Volt Tolerant PS/2 ports

The UR8HC007 controller can be powered by a power supply between 3 and 5 Volts (+/- 10%). Even when the USAR controller is powered by a 3Volt supply, the three PS/2 ports can directly interface with 5-Volt powered devices — without the need of any external level-shifting circuitry. The Host can enable or disable all the external PS/2 ports simultaneously, in sync with the 5-Volt power plane that powers them. Alternatively, it can select any PS/2 port selectively, through the "HID enable/disable control" register.

PS/2 Mouse Handling

The JunoTMprovides a port for the connection of an internal PS/2 mouse. This port supports MouseWheel functionality.

An internal mouse connected to a system’s PS/2 port consumes a significant amount of power as it must always be “on.” A mouse connected to one of Juno’s™ PS/2 ports consumes minimal power because the Juno™ will

power down even when the internal mouse is connected and active.

HID MANAGER KEYBOARD ENCODING

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The UR8HC007 Human Input Device (HID) Manager is responsible for the configuration and handling of HID devices that are embedded or attached to the controller. The HID Manager has the following responsibilities:

1. Enabling and disabling embedded and attached input devices through the "HID enable/disable control" register

2. Formatting and relaying input device reports to the Host

3. Controlling the configuration and operation of both embedded and attached input devices

The HID Manager consists of the four functional blocks: the PS/2 Port Manager; the Keyboard Manager; the Pointing Device Manager; and the Direct Port Manager.

The function of each Manager is explained in full in the

Juno

TM

Technical Reference Manual

.

The UR8HC007-001 will encode an 8-row by 16-column keyboard matrix. OEMs may reprogram the matrix by sending commands to the IC from the system. The JunoTMsupports English, Japanese and European keyboards. In addition, the IC supports both sticky keys and notebook-style keyboards.

The keyboard below, the Fujitsu FKB7654, is the default keyboard for the UR8HC007-001.

The JunoTMprovides many GPIO pins which enable OEMs to easily differentiate their products.

Four GPIO ports provide interrupt at both falling and rising edge of signals. Two of these pins are dedicated for use as a Lid indicator and Digital power monitor. The other two may be used for a ring indicator, docking signal, soft power button, etc.

Three GPIO pins provide A/D input and are ideal for battery measurement.

Three GPIO pins provide two Pulse Width Modulation (PWM) channels and one D/A channel and may be used for analog control functions such as LCD brightness/contrast or audio volume control.

Four GPIO pins with high drive ability are set aside as LED drivers or I/O.

Eight GPIO pins can be used as system control outputs or inputs, for example, for switches.

Fujitsu FKB7654

OTHER JUNOTMSERIES MEMBERS

GENERAL PURPOSE INPUT OUTPUT

Other members of the JunoTMseries of companion ICs offers advanced, ergonomic control of an internal pointing device. Enabled pointing devices include touch pads, touch screens or force sticks. If the application requires an internal pointing device, using a pointingenabled JunoTMwill eliminate the need for a dedicated mouse encoder IC.

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SAMPLE SCHEMATIC FOR THE UR8HC007-001-FQ

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RESERVED FO EMBEDD POINTER

TO / FROM

BOARD

MATRIX

TO PAGE 2

PS/2 I/O

INTERNAL PS/2 POINTE

V+

+5V

Q2

TD_NPN

TD_PNP

RN1

Y1

4.00 MHz

SW1

SPDT

U3

VOLT_DET

U2

74HCT4053

X0

12

X1

13

Y0

Y1

Z0

Z1

INH

11

10

14

15

VDD

16

VSS

VEE

47pF

UR8HC007-001-FQ

GIO21/SW1/

INT1

12

GIO20/SW0/

INT0

13

GIO15/SW15

35

GIO14/SW14

36

EPx2

37

EPx3

38

GIO00/LED0

34

GIO01/LED1

33

GIO02/LED2

32

GIO03/LED3

31

GIO32/AD2

79

GIO31/AD1

80

GIO30/AD0

GIO33/AD3

78

EPx1

76

EPx0

77

EPx9

75

R2

68

EPx10

74

R3

67

R7

63

EPx6

58

R6

64

EPx7

57

R5

65

EPx8

56

R4

66

R1

69

EX0CLK

R0

70

EX1CLK

EPx4

55

EX1DAT

EX0DAT

PWROK

22

23

HSUS

26

GIO16/SW16

GIO17/SW17

PWM1

61

EPx5

10

PWM0

62

DA

11

GIO12/SW12

15

SS/RTS

60

GIO11/SW11

16

ATN/CTS

18

GIO10/SW10

17

GIO13/SW13

14

PS2EN

27

MOSI/RXD

21

MISO/TXD

20

SCLK/ISEL

19

OSCI

28

OSCO

29

VSS1

24

VSS

30

AVSS

73

C15

39

IPCLK

C14

40

C13

41

VDD

71

AVREF

72

C12

42

C11

43

C10

44

C9

45

C8

46

C7

47

IPDAT

C6

48

C5

49

C4

50

C3

51

C2

52

C1

53

C0

54

RESET

25

WKUP

59

4

15

14

GIO PORT 0 GIO PORT 1 GIO PORT 2 GIO PORT 3ANALOG OUT

7

VEE

U2

Z

Y

X

+5V

GIO03 GIO02 GIO01 GIO00

GIO17 GIO16 GIO15 GIO14 GIO13 GIO12 GIO11 GIO10

GIO21 GIO20

GIO33 GIO32 GIO31 GIO30

PWM1

PWM0

DA

8

9

C

10

VSS

B

11

A

6

INH

3

Z1

5

Z0

74HCT4053

1

Y1

2

Y0

13

X1

12

X0

VDD

16

31 32 33 34

2

3 35 36 14 15 16 17

12 13

78 79 80

1

61 62 11

PS/2 I/O TO PAGE 2

EX1CLK

EX1DAT

EX0CLK

EX0DAT

5

4

GIO03/LED3 GIO02/LED2 GIO01/LED1 GIO00/LED0

GIO17/SW17 GIO16/SW16 GIO15/SW15 GIO14/SW14 GIO13/SW13 GIO12/SW12 GIO11/SW11 GIO10/SW10

GIO21/SW1/ GIO20/SW0/

GIO33/AD3 GIO32/AD2 GIO31/AD1 GIO30/AD0

PWM1 PWM0 DA

7

8

EX0CLK

EX1CLK

EX1DAT

74

6

EX0DAT

± INT1 ± INT0

EPx9

EPx10

75

RESERVED FO EMBEDD POINTER

R

IPCLK

IPDAT

IPPWR

R3R310k

+5V

R2R210k

39

40

27

9

C15

IPCLK

IPDAT

EPx8

57

56

C14

PS2EN

EPx3

EPx6

EPx7

EPx4

EPx5

38

58

55

10

R

ED

41

42

43

C13

C12

EPx2

EPx1

37

76

77

44

45

C11

C10

EPx0

V+

C9

GND

C3C347pF

C2C247pF

46

47

C8

SW1

2

INTERNAL PS/2 POINTE

TO / FROM

K E Y BOARD

MATRIX

68

67

63

64

65

66

69

48

49

50

51

52

53

54

C7

C6

C5

C4

UR8HC007-001-FQ

1

SPDT

3

LID OPEN

LID CLOSED

R7

C3

C2

C1

C0

PWROK

LID

HSUS

22

23

26

POWER_OK

NO T _HOST_SUSPENDED

70

R2

R3

R6

R5

R4

R1

SS/RTS

ATN/CTS

MOSI/RXD

MISO/TXD

21

20

19

60

18

POWER SUPPLY

FROM CHIPSET AND/OR

R0

RESET

AVREF

SCLK/ISEL

ASYNCRONOUS INTERFACE

SYNCR INTER

59

WKUP

OSCO

OSCI

VSS1

VSS

AVSS

VDD

V+

29

28

24 30 73

25

72 71

ONOUS

FACE

RN1

10k

9

8

7

6

5

4

3

2

1

Q1Q1TD_PNP

4.00 MHz

Y1

C1C1.1µ F

V+

_WKUP

R1R110k

Q2

TD_NPN

1

2 3

U3

VOLT_DET

SYNCRONOUS S ERIAL CLOCK

MASTER_OUT / SLAVE_IN or RxD

MASTER_IN / SLAVE_OUT or TxD

_ATTENTION or _CTS

ELECT or _RTS

_SLAVE_S

COMMUNICATION INTERFACE

JUNOTMELECTRICAL CHARACTERISTICS

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14

Absolute maximum ratings

(VSS = 0V, Ambient Temperature T

A is in the range T

LOW

to THIGH)

Parameter Symbol Value Unit

Supply Voltage VDD

-0.3 to +7.0 V

Input voltage

All pins except 2-9 VIN -0.3 to VDD+0.3 V Pins 2-9 (PS/2 ports XXXDAT, XXXCLK, GIO16/SW16, GIO17/SW17) VIN -0.3 to +5.8 V

Output current

Total peak for all pins ΣIOH (Peak) -80

ΣIOL

(Peak) 80 mA

Total average for all pins ΣI

OH (Avg) -40

ΣI

OL (Avg) 40 mA

All pins except 31-34 Peak for each pin I

OH (Peak) -10

IOL (Peak) 10 mA

Average for each pin IOH (Avg) -5

IOL (Avg) 5 mA Pins 31-34 (GIO00/LED0 - GIO03/LED3) Peak for each pin IOH (Peak) -10

IOL (Peak) 20 mA Average for each pin IOH

(Avg) -5

IOL (Avg) 15 mA

Temperature range

Operating Temperature TLOW

to THIGH -20 to 85 ºC

Storage Temperature TSTG -40 to 125 ºC

Recommended Operating Conditions, Digital Section

(VSS = 0V, Ambient Temperature T

A is in the range TLOW to THIGH)

Parameter Symbol Min Typ Max Unit

Supply voltage V

DD 2.7 3.0 5.5 V

Input logic high voltage

All pins except 2-9 V

IH 0.8VDD

VDD V Pins 2-9 (PS/2 ports xxxDAT, xxxCLK, GIO16/SW16, GIO17/SW17) VIH 0.8VDD 5.5 V

Input logic low

voltage

All pins except 28 V

IL 0 0.2VDD V

Pin 28 (OSCI) VIL 0 0.16VDD V

Input current

VI

= VSS, V

DD)IIL / IIL -5.0 0 5.0 µA

Input Pull-up Current (pins 56-58 / IP6-IP8, V

I = VSS)I

PUP -120 -10 µA

Output voltage

IOH

= -1.0 mA VOH

VDD-1.0 V

IOL

= 1.6 mA VOL 0.4 V

Current Consumption

(see note 1 below) Full Speed Mode (Fosc=4MHz) IDD 3.5 7.0 mA Reduced Power Mode (Fosc=4MHz) I

DD 750 µA

Stop Mode (Interrupts active, Fosc=0) 1.0 (T

A = 25ºC)

IDD .1 10(TA = 85ºC ) µA

Recommended operating conditions, analog section

(VSS = 0V, Ambient Temperature TA is in the range TLOW to THIGH)

Parameter Symbol Min Typ Max Unit

Analog Signal Ground AVSS 0V Analog Reference Voltage AVREF 2.7 VDD VDD V A/D Resolution- 10 Bits A/D Absolute Accuracy ± 4 LSb A/D Analog Input Voltage Range VIA AV SS AVREF V A/D Analog Input Current IIA 5.0 µA Analog Reference Current (see note 2) (A/D is active) IAVREF 200 µA D/A Resolution- 8 Bits D/A Absolute Accuracy - 2.5 % D/A Output Impedance RO 1 2.5 4.0 KOhms Analog Reference Current (see note 3) (D/A is active, Output = Full Scale) IAVREF 3.2 mA

Note 1: please see left Note 2: please see left Note 3: please see left

POWER CONSUMPTION WHILE OPERATING THE PWM CHANNELS

JUNOTMELECTRICAL CHARACTERISTICS, (CON’T)

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15

Users should consider the built-in PWM channels for generating slowly changing DC control voltages. Since continuous clocking is necessary for the PWM operations, the only penalty for using the built-in PWM channels is the requirement for the chip to operate at least in the Reduced Power Mode, with typical Current Consumption of 750 µA.

Note1:

Current Consumption values do not include any loading on the Output pins or Analog Reference Current for the built-in A/D or D/A modules.

Note 2:

Since the built-in A/D module consumes current only during short periods of time (when A/D conversion is actually requested), the Analog Reference Current for the built-in A/D module is not a significant contributor to the overall power consumption.

Note 3:

The Analog Reference Current for the built-in D/A module correlates linearly to the Output Voltage. For D/A output of 0V, the Analog Reference Current is null. For D/A outputs approaching Full Scale (AVREF), the maximum Analog Reference Current is indicated in this Table. This current is a significant contributor to the overall power consumption.

NOTES FOR ELECTRICALS

MECHANICALS FOR THE UR8HC007 LQFP PACKAGE

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16

H

D

80 61

1

20

21 40

e

b

D

M

e

2

b

I

2

Recommended Mount Pad

60

E

H

41

A

L

1

F

2

A

c

1

A

L

Detail F

y

Symbol

A A

E

M

H

H L

b

M M

Dimension in Millimeters

Min Nom Max

A

1 2

–

0

––

b

c D E e

D E

–

L

1

y

2

I

2

D E

–– –

1.0

0.1

1.4

0.5

1.0

0.225

12.4

–

1.7

0.2

0.280.180.13

0.1750.1250.105

12.112.011.9

12.112.011.9 –

14.214.013.8

0.70.50.3

– –

0.1

10˚0˚

–– –– –– ––

BILL OF MATERIALS FOR THE UR8HC007-001-FQ

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17

Quantity Manufacturer Part# Description

1 Generic C1296-104-X50 .1uF Ceramic Chip Cap, Z5U, SMT, 1206 2 Generic C1206-470-N50 47 pF Ceramic Chip Cap, NPO orX7R, SMT, Size:1206 1 Harris CD74HCT4053M SMT Triple 2-ch Ana Mult/Dem 3 Generic R1206-103-TF-5 10K Resistor, 5% Thick Film, SMT, 1206 1 CTS 745-101-R103CT-ND 10K, 8 resistors, bussed, 10 pins, SMT 1 AVX PBRC-4.00BR 4.00MHz Ceramic Resonator w/Caps, SMT 2 ALCO ADE-03 Switch, 3 Position Dip, THD

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18

For sales information and product literature, contact:

HID & System Mgmt Division Semtech Corporation 568 Broadway New York, NY 10012

hidinfo@semtech.com http://www.semtech.com

212 226 2042 Telephone 212 226 3215 Telefax

Semtech Western Regional Sales 805-498-2111 Telephone 805-498-3804 Telefax

Semtech Central Regional Sales 972-437-0380 Telephone 972-437-0381 Telefax

Semtech Eastern Regional Sales 203-964-1766 Telephone 203-964-1755 Telefax

Semtech Asia-Pacific Sales Office +886-2-2748-3380 Telephone +886-2-2748-3390 Telefax

Semtech Japan Sales Office +81-45-948-5925 Telephone +81-45-948-5930 Telefax

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Northern European Sales Office +44 (0)2380-769008 Telephone +44 (0)2380-768612 Telefax

Southern European Sales Office +33 (0)1 69-28-22-00 Telephone +33 (0)1 69-28-12-98 Telefax

Central European Sales Office +49 (0)8161 140 123 Telephone +49 (0)8161 140 124 Telefax

Copyright ©1998-2001 Semtech Corporation. All rights reserved. Juno is a trademark of Semtech Corporation. Semtech is a registered trademark of Semtech Corporation. All other trademarks belong to their respective companies.

INTELLECTUAL PROPERTY DISCLAIMER This specification is provided "as is" with no warranties whatsoever including any warranty of merchantability, fitness for any particular purpose, or any warranty otherwise arising out of any proposal, specification or sample. A license is hereby granted to reproduce and distribute this specification for internal use only. No other license, expressed or implied to any other intellectual property rights is granted or intended hereby. Authors of this specification disclaim any liability, including liability for infringement of proprietary rights, relating to the implementation of information in this specification. Authors of this specification also do not warrant or represent that such implementation(s) will not infringe such rights.

Datasheet UR8HC007-001-FQ Datasheet (Semtech)

Specifications and Main Features

Frequently Asked Questions

User Manual