SEMTECH SC1103 Technical data

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VOLTAGE MODE PWM CONTROL LER

PRELIMINA RY - February 29, 2000

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DESCRIPTION

The SC1103 is a versatile, low-cost, voltage­mode PWM contr oller designed for use in single
ended DC/DC power supply appli c ations. A sim­ple, fixed- vol tage buck regulat or c an be impl e­mented using the SC1103 with a minim um of ex­ternal components. Int er nal level shift and drive
circuitry eliminates the need for an expensive p­channel, hi gh-side switch. The sm all device foot­print al lows for com pac t circuit design.

SC1103 features include a temperature compen­sated voltage ref er ence, triangle wave oscillator,
current l imi t comparat or , frequency shi ft over­current prot ec tion, and an i nternally c ompensated
error amplif ier. Pul se by pulse current limi ting is
implemented by sensing the differential voltage
across an external r esi stor , or an appropriately
sized PC board trac e.

The SC1103 operates at a fixed frequency of
200kHz, providi ng an optimum compr omise be­tween eff iciency, external component size, and
cost.

SC1103

FEATURES

•

Low cost / small size

•

Switch m ode efficiency (90%)

•

1% referenc e voltage accuracy

•

Ov er c urrent protection

•

500mA output drive

•

5V to 12V Input power source

APPLICATIONS

•

Pentium® P55 Core Suppl y

•

Low Cost Microprocessor Supplies

•

Peripheral Card Supplies

•

Industrial Power Supplies

•

High Density DC/ DC Conversion

ORDERING INFORMATION

DEVICE

SC1103CS SO-8 0° to 125°C
Note:

(1) Add suffix ‘TR’ for t ape and r eel.

(1)

PACKAGE TEMP RANGE ( TJ)

PIN CONFIGURATION

Top View

(SO-8)

BLOCK DIAGRAM

Pentium is a registered trademark of Intel Corporation

© 2000 SEMTECH CORP. 652 MITCHELL ROA D NE WBURY P A RK CA

1

VOLTAGE MODE PWM CONTROL LER

PRELIMINA RY - February 29, 2000

PIN DESCRIPTION

Pin # Pin Name Pin Function

1V
2C
3C
4P

CC

s(-)

s(+)

GND

5 DH High Side Driv er Output

Device Input Voltage
Current Sense Input ( Negative)
Current Sense Input ( P osi tive)
Device Power Ground

SC1103

6 BST High Side Driv er V

BST

(Boost)
7 FB Error Amplifier Input (-)
8 GND Small Signal Ground

ABSOLU TE MAXIMUM RATINGS

Parameter Symbol Maximum Units

Input Voltage V
Ground Differential P

Boost Input Voltage BST to GN D -0.3 to +26 V
Operating Temperat ur e T
Storage Temperature T
Lead Temperature (Soldering) 10 seconds T
Thermal Resistance, Junction to Ambient
Thermal Resistance, Junction to Case

to GND -0.3 to 14 V

CC

to GND ± 1 V

GND

A

S

L

θ JA

θ JC

0 to +70 °C

-45 to +125 °C
300 °C
165 °C/W

40 °C/W

2

© 2000 SEMTECH CORP. 652 MITCHELL ROA D NE WBURY P A RK CA

PRELIMINA RY - February 29, 2000

ELECTRICAL CHARACTERISTICS

VOLTAGE MODE PWM CONTROL LER

SC1103

VCC = 11.50V to 12.50V; GND = P

= 0V; VO = 3.3V; TA = 25°C; BST = 24+ 1V; Output current = 2A .

GND

Per test ci r c uit, unl ess otherwise specified.

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

Reference V

REF

1.238 1.250 1.263 V

Ov er Temp 1.225 1.250 1.275 V
Feedback Bi as Current I
Quiescent Curr ent I
Regulation Load REG
Regulation Line REG

FB

Q

LOAD

LINE

Current i nto VCC pin 5.0 8.0 mA

IO = 1A to 10A 0.5 1.0 %

IO = 10A 0.5 %

2.0 8.0 uA

Current Limit T hr eshold CLT CS(+) to CS ( - ) 60 70 80 mV
Oscillator Frequency OSC 180 200 220 kHz
Oscillator Frequency Shift O FS V

FB

< V

/2 50 kHz

REF

Max Duty Cycle d.c. 90 95 %
DH Sink/Sour c e Current I

UVLO Threshold V

O

UVLO

V

- VDH = 4.5V

BST

- V

(V

DH

PGND

= 2V)

500 mA

3.8 V

TEST CIRCUIT

C1

0.1

GND

R1
10

R2
1k

C5

0.1

+ 20 to 24V

R3

C2
820/16V

1k

Q1

IRL3103S

C4

C3

820/16V

820/16V

U1

SC1103

1

VCC

2

Cs(-)

C6

0.1
3

Cs(+)

4

PGND

GND

BST

8

7

FB

6

5

DH

D1

MBRB1530CT

R4

2.7

C7

0.01

C8

0.1

L1

5.6uH

* NOTE: R6 = 124 x (Vout/1.25 - 1) rounded to nearest 1%value

R5

0.01

C9
1500/6.3

C10
1500/6.3

C11
1500/6.3V

C12

0.1

R6
*see note

R7
124

Vout(+)+12V

Vout(-)

3

© 2000 SEMTECH CORP. 652 MITCHELL ROA D NE WBURY P A RK CA

PRELIMINA RY - February 29, 2000

VOLTAGE MODE PWM CONTROL LER

SC1103

40
35
30
25
20
15

Gain (dB)

10

5
0

-5

-10

100.0E+0 1.0E+3 10.0E+3 100.0E+3 1.0E+6 10.0E+6

Gain
Phase

Frequency (Hz)

Fig.1: Error Am plifier, Gain and Phase

180

135

90

45

0

-45

0.050

0.040

0.030

0.020

Phase (deg)

0.010

Voltage Change (V)

0.000

Normalized to 0 at Io=2A.

-0.010

-0.020
0246810

Current (Amps)

Fig. 2: Load Regulation @ VO = 3.3V, VIN = 12V

1.0%

0.8%

0.6%

0.4%

0.2%

0.0%

-0.2%

Load Regulation

-0.4%

-0.6%

-0.8%

-1.0%

02468101214

Output Current, (A)

Vo=

1.8V

2.5V

3.3V

5.0V

Fig. 3: V

100%

90%

80%

70%

Efficiency

60%

50%

40%

@ VIN = 12V, VO = 3.3V, IO = 10A

RIPPLE

0 2 4 6 8 10 12 14

Output Current, (A)

Fig. 5: Efficienc y @ VIN = 12V

1.8V

2.5V

3.3V
5V

Fig. 4: Load Regulation @ V

0.5%

0.4%

0.3%

0.2%

0.1%

0.0%

-0.1%

Line Regulation

-0.2%

-0.3%

-0.4%

-0.5%

11.4 11.6 11.8 12.0 12.2 12.4 12.6

Fig. 6: Line Regulation @ VO = 3.3V, IO = 10A

= 12V

IN

Input Voltage, (V)

4

© 2000 SEMTECH CORP. 652 MITCHELL ROA D NE WBURY P A RK CA

PRELIMINA RY - February 29, 2000

VOLTAGE MODE PWM CONTROL LER

SC1103

LAYOUT GUIDELINES

Careful attention to layout requirement s are nec essary
for successful im plementation of the SC1103 PWM
controller. High cur rents switching at 200kHz ar e pr e­sent in the appl ication and their ef fect on ground plane
voltage differentials m ust be under stood and mini ­mized.

1). The hi gh power part s of the cir c uit should be laid
out first. A ground plane should be used, the number
and position of ground plane i nterrupti ons should be
such as to not unnecessarily compromise ground
plane integr ity. I solated or semi - isolated areas of the
ground plane may be deliberately int roduced to con­strain ground curr ents to particular areas, f or example
the input capacitor and bottom Schot tky ground.

2). The l oop formed by the Input Capacitor(s) (Ci n) ,
the Top FET (Q1) and the Sc hottky (D1) must be kept
as small as possible. This loop contains all the high
current, fast transition switching. Connections should
be as wide and as short as possible to minimiz e loop
inductance. Minimizi ng this loop area will reduce EMI,
lower ground inj ec tion current s, r esul ting in electric ally
“cleaner” gr ounds for the rest of the system and mini­mize sourc e r inging, resul ting in more reliable gate
switching signal s.

3). The connection between the junc tion of Q1, D1

and the output i nductor should be a wide trac e or c op­per region. It should be as short as practic al. Sinc e
this connection has fast voltage transitions, k eeping
this connection short will minimize EMI. The connec­tion between the out put inductor and the sense resis­tor should be a wide trac e or c opper ar ea, there are no
fast voltage or c urrent transitions in this connection
and length is not so i mportant, however addi ng unnec ­essary impedance will reduce efficiency.

4) The Output Capacitor( s) (Cout) should be locat ed
as close to the load as possible, fast tr ansi ent load
currents are suppli ed by Cout only, and connec tions
between Cout and the load must be short, wide copper
areas to mi nimi z e inductance and resistanc e.

5) The SC1103 is best pl ac ed over an isolated ground
plane area. GND and P GND should be returned t o this
isolated ground. This isolated ground area should be
connected to t he main ground by a trace that runs
from the GND pin to the ground side of (one of) the
output capaci tor(s). If this i s not possible, the GND pin
may be connected to the ground path between the
Output Capacitor(s) and the Cin, Q1, D1 l oop. Under
no circumstances should GND be returned to a ground
inside the Ci n, Q1, D1 loop.

6) Vcc for the SC1103 should be supplied from the
VIN supply thr ough a 10Ω resistor, the V c c pin should

10

0.1uF

0.1uF

SC1103CS

1

VCC

2

CS(-)

3

CS(+)
PGND4DH

GND

BST

8
7

FB

6
5

Heavy lines indicate
high current paths.

Fig. 7 Layout diagram for the SC1103

24V IN

12V

Cin

+

1.00kQ1

Rb

D1

Ra

4uH

2.32k

5mOhm

Vout

+

Cout

5

© 2000 SEMTECH CORP. 652 MITCHELL ROA D NE WBURY P A RK CA

PRELIMINA RY - February 29, 2000

VOLTAGE MODE PWM CONTROL LER

SC1103

be decoupled direc tly to G ND by a 0.1µF ceramic ca­pacitor, trace lengths should be as short as possible.

7) The Current S ense resistor and the divider across it
should form as small a loop as possible, the tr ac es run­ning back to CS(+) and CS(-) on the SC1103 shoul d
run parallel and close to each other. The 0.1µF capaci­tor should be m ounted as close to the CS(+ ) and CS ( - )
pins as possible.

8) To minimize noise pickup at the sensiti ve FB pin,
the feedback resistors should both be close to the
SC1103 with the bottom resistor ( Rb) r eturned to
ground at the GND pin.

TYPICAL APPLICATIONS

+5V

GND

C1

0.1

C2
1500/6.3V

C3
1500/6.3V

Q1

IRL3103S

Under Voltage Lockout

The under voltage l oc k out circuit of the SC1103 as­sures that the high-si de M OSFET driv er outputs remai n
in the off state whenever the supply vol tage drops be­low set parameter s. Loc k out occurs if V

3.8V. Normal operation resumes once V

falls below

CC

rises above

CC

3.8V.

L1

5.6uH

D1

MBRB1530CT

R5

0.012

C9
1500/6.3

C10
1500/6.3

C11
1500/6.3V

+3.3V

R6
205

C12

0.1
R7

124

GND

R1
10

R2

R3

1k

1k

C5

0.1

C6

0.1

+12V

Fig. 8: 5V to 3.3V @ 8A

U1

SC1103

1

VCC

2

Cs(-)

3

Cs(+)

4

PGND

GND

BST

8

7

FB

6

5

DH

R4

2.7

C7

0.01

C8

0.1

6

© 2000 SEMTECH CORP. 652 MITCHELL ROA D NE WBURY P A RK CA

PRELIMINA RY - February 29, 2000

TYPICAL APPLICATIONS (cont.)

VOLTAGE MODE PWM CONTROL LER

SC1103

D2

LL42

Si4420DY

C1

0.1

1500/6.3V

C6

0.1

Q1

D1

MBRD340

GND

R1
10

1

R2
1k

C3

0.1

2

C4

0.1
3

4

VCC

Cs(-)

Cs(+)

PGND

U1

SC1103

GND

BST

R4

C5

0.01

2.7

8

7

FB

6

5

DH

Fig. 9: 5V to 2.5V @ 4A with “flying capacitor” boost voltage.

L1

6.8uH

R5

0.012

+2.5V+5V

R6
124

C8

C7

0.1

1500/6.3VC2

R7
124

GND

D2
LL42

C1

C2

0.1
820/16V

C3
820/16V

C4
820/16V

C8

0.1

Q1

IRL3103S

D1

MBRB1530CT

L1

5.6uH

GND

R1
10

R2

R3

1k

1k

C5

1.0

C6

0.1

U1

SC1103

1

VCC

2

Cs(-)

3

Cs(+)

4

PGND

GND

8

7

FB

6

BST

5

DH

R4

2.7

C7

0.01

Fig. 10: 12V to 3.3V @ 10A with “flying capacitor” boost voltage.

R5

0.01

C9
1500/6.3

C10
1500/6.3

C11
1500/6.3V

C12

0.1

Vout(+)+12V

R6
205

3.3V

R7
124

Vout(-)

7

© 2000 SEMTECH CORP. 652 MITCHELL ROA D NE WBURY P A RK CA

PRELIMINA RY - February 29, 2000

OUTLINE DRAWING

VOLTAGE MODE PWM CONTROL LER

JEDEC

REF: MS-012A A

SC1103

LAND PATTERN SO-8

ECN00-899

8

© 2000 SEMTECH CORP. 652 MITCHELL ROA D NE WBURY P A RK CA