Semiconductor NC7SZ38 Datasheet

Page 1

TinyLogic UHS 2-Input NAND Gate, Open Drain Output

NC7SZ38

Description

The NC7SZ38 is a single 2−Input NAND gate with open drain output stage from ON Semiconductor’s Ultra−High Speed Series of TinyLogic. The device is fabricated with advanced CMOS technology to achieve ultra−high speed with high output drive while maintaining low static power dissipation over a very broad V The device is specified to operate over the 1.65 V to 5.5 V V The inputs and output are high impedance when V tolerate voltages up to 5.5 V, independent of V

operating range.

is 0 V. Inputs

when in the high

range.

impedance state. The open drain output stage tolerates voltages up to 6 V independent of V

Features

• Ultra−High Speed: t

when in the high impedance state.

= 2.2 ns (Typical) into 50 pF at 5 V V

• Open Drain Output Stage for OR Tied Applications

• High Output Sink Drive: ±24 mA at 3 V V

• Broad V

Operating Range: 1.65 V to 5.5 V

• Matches Performance of LCX Operated at 3.3 V V

• Power Down High−Impedance Inputs / Outputs

• Over−Voltage Tolerance Inputs Facilitate 5 V to 3 V Translation

• Proprietary Noise / EMI Reduction Circuitry

• Ultra−Small MicroPak Packages

• Space−Saving SC−74A and SC−88A Packages

• These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS

Compliant

IEEC / IEC

A B

Figure 1. Logic Symbol

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MARKING

DIAGRAMS

SIP6 1.45x1.0

CASE 127EB

Pin 1

UDFN6

1.0X1.0, 0.35P CASE 517DP

Pin 1

SC−74A

CASE 318BQ

SC−88A

CASE 419A−02

A6, 7Z38, Z38 = Specific Device Code KK = 2−Digit Lot Run Traceability Code XY = 2−Digit Date Code Format Z = Assembly Plant Code M = Data Code* G = Pb−Free Package

(Note: Microdot may be in either location)

*Date Code orientation and/or position may

vary depending upon manufacturing location.

A6KK

XYZ

A6KK

XYZ

7Z38 MG

Z38MG

 Semiconductor Components Industries, LLC, 1996

January, 2021 − Rev. 3

ORDERING INFORMATION

See detailed ordering, marking and shipping information in the package dimensions section on page 5 of this data sheet.

1 Publication Order Number:

NC7SZ38/D

Page 2

Pin Configurations

NC7SZ38

GND Y

Figure 2. SC−88A and SC−74A (Top

View)

PIN DEFINITIONS

Pin # SC−88A /

SC−74A

1 1 A Input

2 2 B Input

3 3 GND Ground

4 4 Y Output

5 6 V

Pin # MicroPak Name Description

5 NC No Connect

Supply Voltage

A 1 6 V

B 2 5 NC

GND 3 4 Y

Figure 3. MicroPak (Top Through View)

FUNCTION TABLE

Inputs Output

A B Y

L L *H

L H *H

H L *H

H H L

H = HIGH Logic Level L = LOW Logic Level *H = High Impedance Output State, Open Drain

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Page 3

NC7SZ38

ABSOLUTE MAXIMUM RATINGS

Symbol Parameter Min Max Unit

OUT

ICC or I

STG

ESD

Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected.

Supply Voltage −0.5 6.5 V

DC Input Voltage −0.5 6.5 V

DC Output Voltage −0.5 6.5 V

DC Input Diode Current VIN < 0 V − −50 mA

DC Output Diode Current V

< 0 V − −50 mA

OUT

DC Output Current − ±50 mA

DC VCC or Ground Current − ±50 mA

GND

Storage Temperature Range −65 +150 °C

Junction Temperature Under Bias − +150 °C

Junction Lead Temperature (Soldering, 10 Seconds) − +260 °C

Power Dissipation in Still Air

SC−74A − 390

SC−88A − 332

MicroPak−6 − 812

MicroPak2−6 − 812

Human Body Model, JEDEC: JESD22−A114 − 4000

Charge Device Model, JEDEC: JESD22−C101 − 2000

RECOMMENDED OPERATING CONDITIONS

Symbol Parameter Conditions Min Max Unit

Supply Voltage Operating 1.65 5.5

Supply Voltage Data Retention 1.50 5.5

OUT

tr, t

Input Voltage 0 5.5 V

Output Voltage 0 5.5 V

Operating Temperature −40 +85 °C

Input Rise and Fall Times

VCC = 1.8 V, 2.5 V ±0.2 V 0 20

VCC = 3.3 V ±0.3 V 0 10

VCC = 5.0 V ±0.5 V 0 5

Thermal Resistance

SC−74A − 320

SC−88A − 377

MicroPak−6 − 154

MicroPak2−6 − 154

Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond the Recommended Operating Ranges limits may affect device reliability.

1. Unused inputs must be held HIGH or LOW. They may not float.

ns/V

°C/W

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Page 4

DC ELECTICAL CHARACTERISTICS

Symbol

LKG

OFF

HIGH Level Input Voltage

LOW Level Input Voltage

HIGH Level Output Leakage 5.50 V

LOW Level Output Voltage

Input Leakage Current 5.50 V

Power Off Leakage Current 0 V

Quiescent Supply Current 5.50 V

Parameter V

1.65 to 1.95 0.65 V

2.30 to 5.50 0.70 V

1.65 to 1.95 − − 0.35 V

2.30 to 5.50 − − 0.30 V

NC7SZ38

TA = +25°C TA = −40 to +85°C

(V) Conditions

= VIL,

= VCC or GND

OUT

= V

= 100 mA

or VIL,

1.65

1.80 − 0.00 0.10 − 0.10

V I

2.30 − 0.00 0.10 − 0.10

3.00 − 0.00 0.10 − 0.10

4.50 − 0.00 0.10 − 0.10

1.65 I

2.30 I

3.00 I

4.50 I

= 4 mA − 0.80 0.24 − 0.24

= 8 mA − 0.10 0.30 − 0.30

= 16 mA − 0.15 0.40 − 0.40

= 24 mA − 0.22 0.55 − 0.55

= 32 mA − 0.22 0.55 − 0.55

= 5.5 V, GND − − ±1 − ±10

or V

= 5.5 V − − 1 − 10

OUT

= 5.5 V, GND − − 2 − 20

Min Ty p Max Min Max

− − 0.65 V

− − 0.70 V

− 0.35 V

− 0.30 V

−

− − ±5 − ±10

− 0.00 0.10 − 0.10

Unit

AC ELECTRICAL CHARACTERISTICS

TA = +25°C TA = −40 to +85°C

Symbol Parameter V

PZL

PLZ

OUT

Propagation Delay (Figure 4, 5)

Input Capacitance 0.00 − 4.0 − − − pF

Output Capacitance 0.00 − 5.0 − − − pF

Power Dissipation Capacitance

(Note 2)

(Figure 6)

2. CPD is defined as the value of the internal equivalent capacitance which is derived from dynamic operating current consumption (I no output loading and operating at 50% duty cycle. C

= (CPD) (VCC) (fIN) + (ICCstatic).

CCD

(V) Conditions Min Typ Max Min Max Unit

1.65

1.80 − 5.4 10.5 − 11.0

2.50 ±0.20 − 3.5 7.0 − 7.5

= 50 pF,

= 500 W,

= 2 · V

− 6.5 12.7 − 13.2

3.30 ±0.30 − 2.8 5.0 − 5.2

5.00 ±0.50 − 2.2 4.3 − 4.5

1.65

1.80 − 4.6 10.5 − 11.0

2.50 ±0.20 − 3.0 7.0 − 7.5

= 50 pF,

= 500 W,

RD V

= 2 · V

− 5.5 12.7 − 13.2

3.30 ±0.30 − 2.1 6.0 − 5.2

5.00 ±0.50 − 1.3 4.3 − 4.5

3.30 − 5.1 − − −

5.00 − 7.3 − − −

is related to I

dynamic operating current by the expression:

CCD

) at

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Page 5

NC7SZ38

INPUT

NOTE:

L includes load and stray capacitance.

3. C Input PRR = 10 MHz t

Figure 4. AC Test Circuit Figure 5. AC Waveforms

INPUT

NOTE:

4. Input = AC Waveform; t PRR = 10 MHz; Duty Cycle = 50%.

Figure 6. Test Circuit

= 500 ns.

= t

OUTPUT

= 1.8 ns;

DEVICE ORDERING INFORMATION

Device Top Mark Packages Shipping

NC7SZ38M5X 7Z38 5−Lead SC−74A, 1.6mm 3000 / Tape & Reel

NC7SZ38P5X Z38 5−Lead SC70, EIAJ SC−88a, 1.25 mm Wide 3000 / Tape & Reel

NC7SZ38L6X A6 6−Lead MicroPak, 1.00 mm Wide 5000 / Tape & Reel

NC7SZ38FHX A6 6−Lead, MicroPak2, 1 x 1 mm Body, 0.35 mm Pitch 5000 / Tape & Reel

†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging

Specifications Brochure, BRD8011/D.

†

MicroPak is trademark of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or other countries.

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Page 6

MECHANICAL CASE OUTLINE

PACKAGE DIMENSIONS

SIP6 1.45X1.0

CASE 127EB

ISSUE O

DATE 31 AUG 2016

DOCUMENT NUMBER:

DESCRIPTION:

ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the rights of others.

98AON13590G

SIP6 1.45X1.0

Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.

PAGE 1 OF 1

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Page 7

MECHANICAL CASE OUTLINE

PACKAGE DIMENSIONS

SCALE 2:1

0.20

C AB

123

TOP VIEW

SIDE VIEW

RECOMMENDED

SOLDERING FOOTPRINT*

0.95

PITCH

SEATING

PLANE

0.05

SC−74A

CASE 318BQ

ISSUE B

DETAIL A

END VIEW

DETAIL A

DATE 18 JAN 2018

NOTES:

1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994.

2. CONTROLLING DIMENSION: MILLIMETERS.

3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH

THICKNESS. MINIMUM LEAD THICKNESS IS THE MINIMUM THICKNESS OF BASE MATERIAL.

4. DIMENSIONS A AND B DO NOT INCLUDE MOLD FLASH, PROTRUSIONS, OR GATE BURRS. MOLD FLASH, PROTRUSIONS, OR GATE BURRS SHALL NOT EXCEED 0.15 PER SIDE.

MILLIMETERS

DIM MIN MAX

A 0.90 1.10

A1 0.01 0.10

b 0.25 0.50 c 0.10 0.26 D

2.85 3.15

E 2.50 3.00

1.35 1.65

e 0.95 BSC L 0.20 0.60 M 0 10

GENERIC

MARKING DIAGRAM*

XXX MG

2.40

1.00

0.70

DIMENSIONS: MILLIMETERS

*For additional information on our Pb−Free strategy and soldering

details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.

DOCUMENT NUMBER:

DESCRIPTION:

98AON66279G

SC−74A

XXX = Specific Device Code M = Date Code G = Pb−Free Package

(Note: Microdot may be in either location)

*This information is generic. Please refer to

device data sheet for actual part marking. Pb−Free indicator, “G” or microdot “ G”, may or may not be present. Some products may not follow the Generic Marking.

Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.

PAGE 1 OF 1

ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the rights of others.

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Page 8

MECHANICAL CASE OUTLINE

PACKAGE DIMENSIONS

SC−88A (SC−70−5/SOT−353)

SCALE 2:1

CASE 419A−02

ISSUE L

DATE 17 JAN 2013

0.40

0.0157

12 3

SOLDER FOOTPRINT

0.50

0.0197

NOTES:

1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.

2. CONTROLLING DIMENSION: INCH.

3. 419A−01 OBSOLETE. NEW STANDARD 419A−02.

4. DIMENSIONS A AND B DO NOT INCLUDE

−B−

5 PL

B0.2 (0.008)

MOLD FLASH, PROTRUSIONS, OR GATE BURRS.

INCHES

DIMAMIN MAX MIN MAX

B 1.15 1.350.045 0.053 C 0.80 1.100.031 0.043 D 0.10 0.300.004 0.012 G 0.65 BSC0.026 BSC H --- 0.10---0.004 J 0.10 0.250.004 0.010 K 0.10 0.300.004 0.012 N 0.20 REF0.008 REF S 2.00 2.200.079 0.087

MILLIMETERS

1.80 2.200.071 0.087

GENERIC MARKING

DIAGRAM*

XXXMG

XXX = Specific Device Code M = Date Code G = Pb−Free Package

0.65

0.025

0.65

0.025

(Note: Microdot may be in either location)

*This information is generic. Please refer to

device data sheet for actual part marking. Pb−Free indicator, “G” or microdot “G”, may or may not be present. Some products may not follow the Generic Marking.

1.9

0.0748

STYLE 1:

PIN 1. BASE

2. EMITTER

3. BASE

4. COLLECTOR

5. COLLECTOR

STYLE 6:

PIN 1. EMITTER 2

2. BASE 2

3. EMITTER 1

4. COLLECTOR

5. COLLECTOR 2/BASE 1

DOCUMENT NUMBER:

DESCRIPTION:

ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the rights of others.

STYLE 2:

PIN 1. ANODE

2. EMITTER

3. BASE

4. COLLECTOR

5. CATHODE

STYLE 7:

PIN 1. BASE

2. EMITTER

3. BASE

4. COLLECTOR

5. COLLECTOR

98ASB42984B

SC−88A (SC−70−5/SOT−353)

SCALE 20:1

STYLE 3:

PIN 1. ANODE 1

STYLE 8:

PIN 1. CATHODE

inches

STYLE 4:

2. N/C

3. ANODE 2

4. CATHODE 2

5. CATHODE 1

2. COLLECTOR

3. N/C

4. BASE

5. EMITTER

Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.

PIN 1. SOURCE 1

2. DRAIN 1/2

3. SOURCE 1

4. GATE 1

5. GATE 2

STYLE 9:

PIN 1. ANODE

2. CATHODE

3. ANODE

4. ANODE

5. ANODE

STYLE 5:

PIN 1. CATHODE

2. COMMON ANODE

3. CATHODE 2

4. CATHODE 3

5. CATHODE 4

Note: Please refer to datasheet for style callout. If style type is not called out in the datasheet refer to the device datasheet pinout or pin assignment.

PAGE 1 OF 1

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Page 9

MECHANICAL CASE OUTLINE

PACKAGE DIMENSIONS

UDFN6 1.0X1.0, 0.35P

CASE 517DP

ISSUE O

DATE 31 AUG 2016

DOCUMENT NUMBER:

DESCRIPTION:

ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the rights of others.

98AON13593G

UDFN6 1.0X1.0, 0.35P

Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.

PAGE 1 OF 1

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Page 10

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