, Seagate Technology®, and the Seagate logo are registered
trademarks of Seagate Technology, Inc. Other product names are registered trademarks or trademarks of their owners.
Seagate reserves the right to change, without notice, product offerings
or specifications. No part of this publication may be reproduced in any
form without written permission from Seagate Technology, Inc.
Guaranteed Mbytes85.8
Guaranteed sectors167,552
Bytes per sector512
1.2Physical organization
Read/Write heads2
Discs1
1.3Logical organization
Sectors per track (max)64
Read/Write heads (max)16
Cylinders (max)Unrestricted
Note. All head, cylinder, and sector geometries are supported subject
to the maximums specified and to the following condition:
sectors
(
) ×
(heads) × (cylinders) ≤ total sectors per drive
1.4Default logical geometry
Sectors per track16
Read/Write heads14
Cylinders748
2ST9100A Product Manual, Rev. A
1.5Functional specifications
InterfaceAT
Recording methodRLL (1,7)
Recording density (BPI)58,200
Flux density (FCI)43,760
Track density (TPI)2,650
Spindle speed (RPM)
Internal data transfer rateup to 22.4 Mbits/sec (6 zones)—ZBR
I/O data transfer rateup to 4 Mbytes/sec
Interleave1:1
Buffer120 Kbytes
3,545 ± 0.5%
1.6Physical dimensions
Height (max)0.504 inches (12.80 mm)
Width (max)2.760 inches (70.10 mm)
Depth (max)4.001 inches (101.85 mm)
Weight (max)4.8 oz (0.136 Kg)
1.7Seek time
Seek time is a true statistical average (at least 5,000 measurements) of
seek time, less controller overhead. All measurements are made with
nominal power at sea level and 25°C ambient temperature. Track-totrack seek time is an average of all possible single-track seeks in both
directions. Average seek time is measured by executing seek commands
between random sector addresses. Full-stroke seek time is one-half the
time needed to seek from the first data sector to the maximum data sector
and back to the first sector. Host overhead varies between systems and
cannot be specified.
Track-to-track
typical avg. (msec)
maximum avg. (msec)
5
7
ST9100A Product Manual, Rev. A3
Average
typical avg. (msec)
maximum avg. (msec)
Full-stroke
typical avg. (msec)
maximum avg. (msec)
Average latency (msec)8.46
16
19
26
28
1.8Spinup times (typical)
Spinup time from Power-on to Ready is 10 seconds (typical).
Spinup time from Standby to Ready is 3 seconds (typical).
1.9Reliability
Nonrecoverable read errors1 per 1013 bits read
Mean time between failures300,000 power-on hours
(nominal power, at sea level,
25°C ambient temperature)
Preventative maintenanceNone required
Mean time to repair10 minutes
Service life5 years
1.10 Environment
1.10.1 Acoustics
30 dBA maximum (sound pressure) in Idle mode, at 1 meter.
1.10.2 Ambient temperature
Operating5° to 55°C (41° to 131°F)
Nonoperating–40° to 70°C (–40° to 158°F)
1.10.3 Temperature gradient
Operating30°C/hr max (54°F/hr), without condensation
Nonoperating30°C/hr max (54°F/hr), without condensation
4ST9100A Product Manual, Rev. A
1.10.4 Relative humidity
Operating8% to 80% noncondensing;
Max. wet bulb temperature: 40°C (78.8°F)
Nonoperating8% to 90% noncondensing
Max. wet bulb temperature: 56°C (132°F)
1.10.5 Altitude
Operating–1,000 ft to 10,000 ft (–304.8 m to 3,048 m)
Nonoperating–1,000 ft to 40,000 ft (–304.8 m to 12,192 m)
1.10.6 Shock
All shock specifications assume that the drive is mounted in an approved
orientation with the shock input levels measured at the drive mounting
screws. The nonoperating specifications assume that the read/write
heads are positioned in the shipping zone.
Note. At power-down and during Idle and Standby modes, the read/write
heads automatically move to the shipping zone. The head and
slider assembly park inside of the maximum data cylinder. When
power is applied, the heads recalibrate to track 0.
1.10.6.1 Operating shock
The maximum shock the ST9100A can experience during operation
without incurring nonrecoverable data errors is 10 Gs (based on half
sine-wave shock pulses of 11 msec).
1.10.6.2 Nonoperating shock
The maximum shock the ST9100A can experience without incurring drive
damage or degradation in performance when the drive is subsequent ly
put into operation is 150 Gs (based on half-sine shock pulses of 11
msec).
1.10.7 Vibration
All vibration specifications assume that the drive is mounted in an
approved orientation with the vibration input levels measured at the drive
mounting screws. The nonoperating specifications assume that the
read/write heads are positioned in the shipping zone.
ST9100A Product Manual, Rev. A5
1.10.7.1 Operating vibration
Maximum vibration without drive damage or degradation in performance:
5–22 Hz0.020-inch displacement (double amplitude)
22–500 Hz0.5 G acceleration (peak)
500–22 Hz0.5 G acceleration (peak)
22–5 Hz0.020-inch displacement (double amplitude)
1.10.7.2 Nonoperating vibration
Maximum vibration without causing physical damage or degradation in
performance when the device is subsequently put into operation:
The ST9100A receives DC power (+5V), through pin 41 and pin 42 of
the AT interface connector; pin 43 is ground.
1.11.1 Power management modes
Power management is required for low-power, portable computer systems. In most systems, you can control power management through the
system setup program. The ST9100A features several power management modes, which are described briefly below:
Active mode. The drive is in Active mode during the read/write and seek
operations.
Idle-Ready mode. In Idle-Ready mode, the spindle is up to speed and
the heads are on track at the last sector accessed. The drive accepts all
commands, and returns to Active mode when disc access is necessary.
Idle mode. At power-on, the drive sets the idle timer to enter Idle mode
after 5 seconds of inactivity. You can set the idle timer delay using the
system setup utility. In Idle mode, the spindle remains up to speed. The
heads are parked and latched away from the data zones for maximum
6ST9100A Product Manual, Rev. A
data safety. The buffer remains enabled, and the drive accepts all
commands and returns to Active mode any time disc access is necessary.
Standby mode. The drive enters Standby mode when the host sends a
Standby Immediate command. The drive can also enter Standby mode
after a specifiable length of time has elapsed with the drive in Idle mode.
The standby timer delay is system dependent, and is usually established
using the system setup utility. In Standby mode, the buffer remains
enabled, the heads are parked and the spindle is at rest. The drive
accepts all commands, and returns to Active mode any time disc access
is necessary.
Sleep mode. The drive enters Sleep mode when a Sleep Immediate
command has been received from the host. The heads are parked and
the spindle is at rest. The drive leaves Sleep mode when a Hard Reset
or Soft Reset command is sent from the host. After a soft reset has been
received, the drive exits Sleep mode and enters Standby mode with all
current emulation and translation parameters intact.
Rest mode. Some host systems reduce drive power consumption by
removing all power from the drive, using a state known as Rest mode.
In entering Rest mode, the host saves drive state information (including
current logical geometry, set feature parameters, cache status and task
file registers) prior to powering down the drive, then restores the drive to
its prerest condition once power is restored. Rest mode is implemented
using three commands: Rest, Read Drive State, and Restore Drive State.
The Rest command prepares the drive for a subsequent Read Drive
State command. The Read Drive State command captures the state of
the I/O registers and transfers this data to nonvolatile memory within the
host. The Restore Drive State command reads the drive state data from
memory and restores the drive state based on these data.
Idle and standby timers. The drive sets default time delays for both the
idle timer and the standby timer at power-on. In most systems, you can
set these delays using the system setup utility. Each time the drive
performs an Active function (read, write or seek), the idle timer is
reinitialized, and begins the countdown from the specified delay time to
zero. If the idle timer reaches zero before any drive activity is required,
the drive makes a transition to Idle mode. After making the transition to
Idle mode, the drive begins the standby timer countdown. If the standby
timer reaches zero before any drive activity is required, the drive makes
a transition to Standby mode. In both Idle and Standby mode, the drive
accepts all commands, and returns to Active mode when disc access is
necessary.
ST9100A Product Manual, Rev. A7
1.11.2 Power consumption
Power requirements for the ST9100A are listed below. All typical measurements are taken at 5V and zero ripple on a 10 MHz AT system.
Maximums are measured at 5.25V.
Typical Active mode current and power specifications assume nominal
voltages applied, 25°C ambient temperature at sea level, with the spindle
rotating (two spindle rotations between each operation) and the drive in
default logical geometry. Maximum seek currents and power usage are
measured on repetitive one-third-stroke buffered seeks with one-half
spindle rotation between each seek. Maximum read/write currents and
power are measured with one-half spindle rotation between each operation. Transient state changes may cause current peaks above the
maximum levels.
A typical startup and operation current profile for the ST9100A is shown
in Figure 1 on page 8.
1.11.4 Input power noise
Voltage tolerance (including ripple): + 10% – 8%
Maximum permitted input noise ripple is 150 mV (peak-to-peak).
Maximum permitted input noise is 10 MHz.
Active mode
Spinup
Upload
code
Idle
mode
Standby
mode
Ready
Time (seconds)
100
200
300
400
0
12
345
6
7
89
10
500
Current
(mA)
8ST9100A Product Manual, Rev. A
Figure 1. Startup and operation current profile for the ST9100A
1.12 UL/CSA listing
The ST9100A is listed in accordance with UL 1950 and CSA C22.2
(950-M89), and meets all applicable sections of IEC 380, IEC 435,
IEC 950, VDE 0806/08.81 and EN 60950 as tested by TUV-Rheinland,
North America.
1.13 FCC verification
The ST9100A is intended to be contained solely within a personal
computer or similar enclosure (not attached to an external device). As
such, the drive is considered to be a subassembly even when it is
individually marketed to the customer. As a subassembly, no Federal
Communications Commission verification or certification of the device is
required.
Seagate Technology, Inc. has tested this device in enclosures as described above to ensure that the total assembly (enclosure, disc drive,
motherboard, power supply, etc.) does comply with the limits for a Class
B computing device, pursuant to Subpart J, Part 15 of the FCC rules.
Operation with noncertified assemblies is likely to result in interference
to radio and television reception.
Radio and Television Interference. This equipment generates and
uses radio frequency energy and if not installed and used in strict
ST9100A Product Manual, Rev. A9
accordance with the manufacturer’s instructions, may cause interference
to radio and television reception.
This equipment is designed to provide reasonable protection against
such interference in a residential installation. However, there is no
guarantee that interference will not occur in a particular installation. If this
equipment does cause interference to radio or television, which can be
determined by turning the equipment on and off, you are encouraged to
try one or more of the following corrective measures:
• Reorient the receiving antenna.
• Move the device to one side or the other of the radio or TV.
• Move the device farther away from the radio or TV.
• Plug the computer into a different outlet so that the receiver and
computer are on different branch outlets.
If necessary you should consult your dealer or an experienced radio/television technician for additional suggestions. You may find helpful the
following booklet prepared by the Federal Communications Commission:
How to Identify and Resolve Radio-Television Interference Problems
This booklet is available from the Superintendent of Documents,
U.S. Government Printing Office, Washington, DC 20402. Refer to publication number 004-000-00345-4.
.
ST9100A Product Manual, Rev. A11
2.0 Drive handling and mounting
2.1Handling and static-discharge precautions
After unpacking, and prior to system integration, the drive may be
exposed to potential handling and ESD hazards. It is mandatory that you
observe standard static-discharge precautions. A grounded wrist-strap
is preferred.
Handle the drive only by the sides of the head/disc assembly. Avoid
contact with the printed circuit board, all electronic components, and the
interface connector. Do not apply pressure to the top cover. Always rest
the drive on a padded antistatic surface until you mount it in the host
system.
2.2Mounting the ST9100A
You can mount the ST9100A in any orientation, as long as the drive is
securely fastened to a rigid frame using four side-mounting screws or
four bottom-mounting screws. Allow a minimum clearance of 0.030
inches (0.762 mm) around the entire perimeter of the drive for cooling
airflow.
Figure 2 on page 12 provides mounting dimensions for the ST9100A.
These drives are designed in accordance with industry-standard MCC
direct-mounting specifications, and require the use of MCC-compatible
connectors in fixed-mounting applications.
Caution. To avoid damaging the drive:
metric
• Use M3X0.5
• Do not insert mounting screws more than 0.150 inches (3.81 mm) into
the mounting holes.
not
• Do
overtighten the screws (maximum torque: 3 inch-lb).
mounting screws
only
.
4X 3 mm × 0.5 mm,
0.15 in (3.81mm)
min. full thread
0.000
2.430 ± 0.010
(61.72 ± 0.25)
0.000
1.227 ± 0.025
(31.17 ± 0.61)
3.986 ± 0.015
(101.24 ± 0.38)
1.500 ± 0.010
(38.10 ± 0.25)
4X 3 mm × 0.5 mm,
0.15 in (3.81 mm)
min. full thread
0.079 (2.00)
Pin 1
Pin 20 removed
for keying
0.079 (2.00)
2.740 ± 0.020
(69.60 ± 0.51)
1.375 ± 0.015
(34.93 ± 0.38)
0.000 in (mm)
0.489 ± 0.015
(12.42 ± 0.38)
0.155 ± 0.020
(3.94 ± 0.51)
0.039 ± 0.020
(0.99 ± 0.51)
0.118 ± 0.010
(3.00 ± 0.25)
0.157 ± 0.015
(3.99 ± 0.38)
0.239 ± 0.035
(6.07 ± 0.89)
Dimensions are in inches (mm)
0.152 ± 0.005
(3.86 ± 0.12)
12ST9100A Product Manual, Rev. A
Figure 2. ST9100A mounting dimensions
ST9100A Product Manual, Rev. A13
3.0 AT interface
The ST9100A uses the industry-standard ATA task file interface. The
drives support both 8-bit and 16-bit data transfer and have no DMA
capability. All data transfers are completed through programmed I/O. Up
to two drives can be daisy-chained (as master and slave) on the same
host bus.
3.1Drive configuration
3.1.1 Master/slave selection
A master/slave relationship must be established between drives on the
AT bus. Drive 1 is configured as the master and Drive 2 is configured as
the slave. Refer to the table below and Figure 3 on page 14 for jumper
settings used to configure the drive as a master or a slave.
Jumper
for pins
A and B
RemovedRemovedDrive is master; no slave drive present
RemovedInstalledDrive is master; Seagate slave drive present
InstalledRemovedDrive is slave; Seagate master drive present
InstalledInstalledReserved configuration (do not use)
Jumper
for pins
C and DConfiguration
3.1.2 Remote LED
The drive indicates activity to the host through the DASP– line (pin 39)
on the AT interface. This line can be connected to a drive status indicator
driving an LED at 5V. The line has a 30 mA nominal current limit.
Master/slave
configuration jumpers
Pin 1
Pin 20 removed
for keying
Circuit board
B D
A C
Drive is master; no slave drive present
Drive is master; Seagate slave drive present
Drive is slave; Seagate master drive present
Reserved position (Do not use)
14ST9100A Product Manual, Rev. A
Figure 3. ST9100A connector setup
ST9100A Product Manual, Rev. A15
3.2Onboard drive diagnostics
At power-on, the drive executes a series of diagnostic tests. A series of
LED flashes on the system panel indicate a failure.
Signals driven by the drive must have the following output characteristics
at the drive connector:
Logic Low0.0V to 0.4V
Logic High2.5V to 5.25V
Signals received by the drive must have the following input characteristics, measured at the drive connector:
Logic Low0.0V to 0.8V
Logic High2.0V to 5.25V
3.4AT interface connector
The drive connector is a 44-conductor connector with 2 rows of 22 male
pins on 0.079 inch (2 mm) centers (see Figure 4 on page 16).
The mating-cable connector is a 44-conductor nonshielded connector
with 2 rows of 22 female contacts on 0.079 inch (2 mm) centers. It is
recommended that the connectors be keyed by inserting a plug into the
pin 20 location of each interface connector. Strain relief is recommended.
Use MCC-compatible connectors, such as Molex part number 87368-
x
, for fixed-mounting applications. For applications involving flexible
442
cables or printed circuit cables (PCCs), use Molex part number 872594413 or equivalent to connect the system to the drive. Select a connector
that provides adequate clearance for the master/slave configuration
Do not scale
1.654
0.158 ± 0.003
0.152 ± 0.005
0.079 ± 0.003
0.020 ± 0.002
sq. typ.
0.079 ± 0.003
drive circuit board
44 signal/power pins
(22 rows)
Configuration jumpers
(2 rows)
Note. Tolerances are noncumulative over entire range
16ST9100A Product Manual, Rev. A
jumpers (if the application requires the use of such jumpers). See Figure
4 for details.
3.5AT interface cable
Maximum cable length is 18 inches (457 mm). It is recommended that
the connectors be keyed by the use of a plug in the pin 20 location of
each interface connector.
Host Reset
Ground
Host Data Bus Bit 7
Host Data Bus Bit 8
Host Data Bus Bit 6
Host Data Bus Bit 9
Host Data Bus Bit 5
Host Data Bus Bit 10
Host Data Bus Bit 4
Host Data Bus Bit 11
Host Data Bus Bit 3
Host Data Bus Bit 12
Host Data Bus Bit 2
Host Data Bus Bit 13
Host Data Bus Bit 1
Host Data Bus Bit 14
Host Data Bus Bit 0
Host Data Bus Bit 15
Ground
(No Pin)
Reserved
Ground
Host I/O Write
Ground
Host I/O Read
Ground
Reserved
Reserved
Reserved
Ground
Host Interrupt Request
Host 16 Bit I/O
Host Address Bus Bit 1
Passed Diagnostics
Host Address Bus Bit 0
Host Address Bus Bit 2
Host Chip Select 0
Host Chip Select 1
Drive Active / Slave Present
Ground
+5V (logic)
+5V (motor)
Ground for power pins
Reserved
The following diagram summarizes the signal pin assignments for the
ST9100A AT interface connector.
–
Reset
Ground
DD7
DD8
DD6
DD9
DD5
DD10
DD4
DD11
DD3
DD12
DD2
DD13
DD1
DD14
DD0
DD15
Ground
(removed)
Reserved
Ground
–
DIOW
Ground
–
DIOR
Ground
Reserved
Reserved
Reserved
Ground
INTRQ
IOCS16
DA1
–
PDIAG
DA0
DA2
CS1FX
CS3FX
–
DASP
Ground
Power
Power
Ground
Reserved
–
–
–
18ST9100A Product Manual, Rev. A
3.7AT interface commands for the ST9100A
The following commands are specific to the ST9100A. For a description
of any AT interface commands not found in this manual and Seagate’s
implementation of the AT interface, refer to the
Specification
, publication number 36111-001.
Seagate ATA Interface
For maximum compatibility, there may be more than one opcode for
some commands. In such instances, all opcodes perform in an equivalent
manner and are treated identically by the drive.
In all of the following tables, D/S designates the drive select bit and an “X”
designates that the register is not used for the particular command.
Notations for special register functions are listed in the command table
and explained in the command descriptions.
3.7.1 Standby Immediate (E0H / 94H)
When the drive receives this command, it enters Standby mode immediately. The drive sets BSY, initiates a shutdown sequence, enters
Standby mode, clears BSY, and generates an interrupt. If the drive is
already in Standby mode when this command is received, it sets BSY,
clears BSY and generates an interrupt.
E0
H
Command
)
(1F7
H
Cyl. High
)
(1F5
H
Cyl. Low
)
(1F4
H
Drv. Head
)
(1F6
H
Sec. Num.
)
(1F3
H
Sec. Cnt.
)
(1F2
H
Bit 7Bit 6Bit 5Bit 4Bit 3 Bit 2Bit 1Bit 0
11100000
X
X
101D/SX
X
X
ST9100A Product Manual, Rev. A19
94
Command
(1F7
Cyl. High
(1F5
Cyl. Low
(1F4
Drv. Head
(1F6
Sec. Num.
(1F3
Sec. Cnt.
(1F2
Bit 7Bit 6Bit 5Bit 4Bit 3 Bit 2Bit 1Bit 0
H
10010100
)
H
)
H
)
H
101D/SX
)
H
)
H
)
H
X
X
X
X
3.7.2 Idle Immediate (E1H / 95H / F8H)
When the drive receives this command, it sets BSY and enters Idle mode.
If the drive is in Standby mode, the spinup routine is executed. If the drive
is in either Active or Idle mode, the spindle is already up to speed, and
the spinup routine is skipped. Next, the drive clears BSY and generates
an interrupt.
E1
H
Command
)
(1F7
H
Cyl. High
)
(1F5
H
Cyl. Low
)
(1F4
H
Drv. Head
)
(1F6
H
Sec. Num.
)
(1F3
H
Sec. Cnt.
)
(1F2
H
Bit 7Bit 6Bit 5Bit 4Bit 3 Bit 2Bit 1Bit 0
11100001
X
X
101D/SX
X
X
20ST9100A Product Manual, Rev. A
95
H
Command
)
(1F7
H
Cyl. High
)
(1F5
H
Cyl. Low
)
(1F4
H
Drv. Head
)
(1F6
H
Sec. Num.
)
(1F3
H
Sec. Cnt.
)
(1F2
H
F8
H
Command
)
(1F7
H
Cyl. High
)
(1F5
H
Cyl. Low
)
(1F4
H
Bit 7Bit 6Bit 5Bit 4Bit 3Bit 2Bit 1Bit 0
10010101
X
X
101D/SX
X
X
Bit 7Bit 6Bit 5Bit 4Bit 3 Bit 2Bit 1Bit 0
11111000
X
X
Drv. Head
(1F6
H
Sec. Num.
(1F3
H
Sec. Cnt.
(1F2
H
101D/SX
)
)
)
X
X
3.7.3 Standby (E2H / 96H)
When the drive receives this command, it sets BSY and makes a
transition to Standby mode. Depending on the value placed in the Sector
Count register, the drive either enables or disables the standby
timer. The drive then clears BSY and generates an interrupt. Placing a
zero value in the Sector Count register disables automatic Standby.
Placing a nonzero value in the Sector Count register enables the standby
timer to count down in 5-second increments. A value of 12 sets the
ST9100A Product Manual, Rev. A21
standby timer for sixty seconds before the Standby routine is initiated. A
value of 13 sets the timer for sixty-five seconds. The minimum amount
of time allowed for the standby timer is sixty seconds. Consequently, all
values from 1−11 have an equivalent effect to a value of 12 for the
standby timer. The delay timer is reinitialized by the drive whenever the
drive enters Active mode. If the drive is already in Standby mode, this
command has no effect. The default power-on condition for this drive has
automatic power-down disabled.
E2
H
Command
)
(1F7
H
Cyl. High
)
(1F5
H
Cyl. Low
)
(1F4
H
Drv. Head
)
(1F6
H
Sec. Num.
)
(1F3
H
Sec. Cnt.
)
(1F2
H
96
H
Command
)
(1F7
H
Cyl. High
)
(1F5
H
Cyl. Low
)
(1F4
H
Bit 7Bit 6Bit 5Bit 4Bit 3 Bit 2Bit 1Bit 0
11100010
X
X
101D/SX
X
standby timer delay (in 5-second increments)
Bit 7Bit 6Bit 5Bit 4Bit 3 Bit 2Bit 1Bit 0
10010110
X
X
Drv. Head
)
(1F6
H
Sec. Num.
)
(1F3
H
Sec. Cnt.
)
(1F2
H
101D/SX
X
standby timer delay (in 5-second increments)
22ST9100A Product Manual, Rev. A
3.7.4 Idle (E3H / 97H)
When the drive receives this command, it sets BSY, makes a transition
to Idle mode, sets the standby timer if necessary, clears BSY and
generates an interrupt. The minimum amount of time allowed for the idle
timer is sixty seconds. Consequently, all values from 1 to 11 have an
equivalent effect to a value of 12 for the standby timer.
E3
H
Command
)
(1F7
H
Cyl. High
)
(1F5
H
Cyl. Low
)
(1F4
H
Drv. Head
)
(1F6
H
Sec. Num.
)
(1F3
H
Sec. Cnt.
)
(1F2
H
97
H
Command
)
(1F7
H
Cyl. High
)
(1F5
H
Cyl. Low
)
(1F4
H
Bit 7Bit 6Bit 5Bit 4Bit 3 Bit 2Bit 1Bit 0
11100011
X
X
101D/SX
X
standby timer delay (in 5-second increments)
Bit 7Bit 6Bit 5Bit 4Bit 3 Bit 2Bit 1Bit 0
10010111
X
X
Drv. Head
)
(1F6
H
Sec. Num.
)
(1F3
H
Sec. Cnt.
)
(1F2
H
101D/SX
X
idle timer delay (in 5-second increments)
ST9100A Product Manual, Rev. A23
3.7.5 Check Power Mode (E5H / 98H)
This command returns a code for the power mode the drive is currently
in or making a transition to. When the drive receives this command, it
sets BSY, returns a value representing the current mode through the
Sector Count register, clears BSY and generates an interrupt.
The return values are as follows:
= The drive is in, or entering, Standby mode.
00
H
= The drive is in, or entering, either Idle or Active mode.
FF
H
E5
H
Command
)
(1F7
H
Cyl. High
)
(1F5
H
Cyl. Low
)
(1F4
H
Drv. Head
)
(1F6
H
Sec. Num.
)
(1F3
H
Sec. Cnt.
)
(1F2
H
98
H
Command
)
(1F7
H
Cyl. High
)
(1F5
H
Cyl. Low
)
(1F4
H
Bit 7Bit 6Bit 5Bit 4Bit 3 Bit 2Bit 1Bit 0
11100101
X
X
101D/SX
X
X
Bit 7Bit 6Bit 5Bit 4Bit 3 Bit 2Bit 1Bit 0
10011000
X
X
Drv. Head
)
(1F6
H
Sec. Num.
)
(1F3
H
Sec. Cnt.
)
(1F2
H
101D/SX
X
X
24ST9100A Product Manual, Rev. A
3.7.6 Set Sleep Mode (E6H / 99H)
This command tells the drive to enter Sleep mode immediately. When the
drive receives this command, it sets BSY, enters Sleep mode, clears BSY
and generates an interrupt. When a soft reset is sent from the host, the drive
leaves Sleep mode and makes a transition to Standby mode. After a soft
reset has been received, the drive exits Sleep mode and enters Standby
mode with all emulation and translation parameters intact. After a hard reset
has been received, the drive returns to Active mode.
E6
H
Command
)
(1F7
H
Cyl. High
)
(1F5
H
Cyl. Low
)
(1F4
H
Drv. Head
)
(1F6
H
Sec. Num.
)
(1F3
H
Sec. Cnt.
)
(1F2
H
98
H
Command
)
(1F7
H
Cyl. High
)
(1F5
H
Cyl. Low
)
(1F4
H
Bit 7Bit 6Bit 5Bit 4Bit 3 Bit 2Bit 1Bit 0
11100110
X
X
101D/SX
X
X
Bit 7Bit 6Bit 5Bit 4Bit 3 Bit 2Bit 1Bit 0
10011000
X
X
Drv. Head
)
(1F6
H
Sec. Num.
)
(1F3
H
Sec. Cnt.
)
(1F2
H
101D/SX
X
X
ST9100A Product Manual, Rev. A25
3.7.7 Identify Drive (ECH)
The drive sends this command to system ROM during the system startup
process. ROM clears the BUSY status within 100 nsec from power-on,
but does not indicate the DRIVE READY status until after the upload of
external RAM is complete. This command can be executed before the
DRIVE READY status has been asserted.
EC
Command
(1F7
Cyl. High
(1F5
Cyl. Low
(1F4
Drv. Head
(1F6
Sec. Num.
(1F3
Sec. Cnt.
(1F2
Bit 7Bit 6Bit 5Bit 4Bit 3 Bit 2Bit 1Bit 0
H
11101100
)
H
)
H
)
H
101D/SX
)
H
)
H
)
H
X
X
X
X
The Identify Drive command causes 512 bytes (256 words) of information to be returned to the host. When the drive receives this command,
it sets BSY, stores the information in the sector buffer, sets DRQ, and
generates an interrupt.
26ST9100A Product Manual, Rev. A
The following table summarizes the information transferred through the
x
Identify Drive command. Parameters listed with an “
” are variable. See
Section 1 of this manual for default parameter settings for the ST9100A.
WordDescriptionValue
Configuration information:
Bit 10: disc transfer ≤ 10 Mbits/sec
Bit 6: fixed drive
0
Bit 4: head switch time > 15 µsec
045A
H
Bit 3: not MFM encoded
Bit 1: hard sectored disc
Number of fixed cylinders
1
(default logical emulation): 748
02EC
H
2Reserved0000
3Number of heads (default): 14000E
4Number of unformatted bytes per track: 36,2408D90
5Number of unformatted bytes per sector: 584 0248
Number of sectors per track
6
(default logical emulation): 16
0010
7–9Reserved0000
10–19
20
Serial Number:
(20 ASCII characters, 0000
= none)
H
Controller type = dual-ported multisector buffer
with caching
ASCII
0003
21Buffer size (120 Kbytes)00F0
22Number of ECC bytes0010
23–26
27–46
Firmware revision (8 ASCII character string):
xx
= ROM ver., ss = RAM ver., tt = RAM ver.
Drive model number:
(40 ASCII characters, padded to end of string)
xx.ss.tt
ST9
47Read Multiple command supported0000
H
H
H
H
H
H
H
H
H
xxx
H
48Cannot perform double word I/O0000
49Capabilities: DMA not supported0000
50Reserved0000
H
H
H
ST9100A Product Manual, Rev. A27
WordDescriptionValue
51Minimum PIO data transfer cycle time0000
52
Minimum DMA transfer cycle time
(not supported)
53The fields in translation mode may be valid0001
54Number of cylinders (current emulation mode)
55Number of heads (current emulation mode)
This command controls the implementation of various features supported
by the drive. When the drive receives this command, it sets BSY, checks
the contents of the Features register, clears BSY, and generates an
interrupt. If the value in the register does not represent a feature supported by the drive, the command is aborted. Power-on default has the
read look-ahead feature enabled, and 4 bytes of ECC. The acceptable
values for the Features register are defined as follows:
Enable write cache (
02
H
44
Sixteen bytes of ECC apply on read long and write long
4 bytes of ECC apply on read long and write long commands
H
default
(
CC
Enable reverting to power-on defaults (
H
)
default
default
)
)
At power-on, or after a hardware reset, the default values of the features
are as indicated above (except for write cache, which is enabled or
disabled at power-on). A software reset also changes the features to
default values unless a 66
command has been received.
H
28ST9100A Product Manual, Rev. A
Bit settings for the Set Features command are shown below.
EF
Command
(1F7
Cyl. High
(1F5
Cyl. Low
(1F4
Drv. Head
(1F6
Sec. Num.
(1F3
Sec. Cnt.
(1F2
Features
(1F1
Bit 7Bit 6Bit 5Bit 4Bit 3 Bit 2Bit 1Bit 0
H
11101111
)
H
)
H
)
H
101D/SX
)
H
)
H
)
H
)
H
Set Features parameter
X
X
X
X
3.7.9 Active Immediate (F9H)
This command causes the drive to enter Active mode immediately. When
the drive receives this command, it sets BSY, makes a transition to Active
mode, clears BSY and generates an interrupt.
F9
H
Command
)
(1F7
H
Cyl. High
)
(1F5
H
Cyl. Low
)
(1F4
H
Drv. Head
)
(1F6
H
Sec. Num.
)
(1F3
H
Sec. Cnt.
)
(1F2
H
Bit 7Bit 6Bit 5Bit 4Bit 3 Bit 2Bit 1Bit 0
11111001
X
X
101D/SX
X
X
ST9100A Product Manual, Rev. A29
3.7.10 Idle and Set Idle Timer (FAH)
This command enables and disables the automatic Idle feature of the
drive. When the drive receives this command, it sets BSY, switches to
Idle mode, and enables or disables the idle timer according to the value
placed in the Sector Count register. The drive then clears BSY and
generates an interrupt.
If the value in the sector count is zero, the idle timer is disabled and the
drive does not automatically switch to Idle mode. If the value is not zero,
the drive switches to Idle mode after the specified delay time has elapsed.
The delay time is specified in the Sector Count register in 100-msec
increments. The delay is reinitialized whenever the drive enters Active
mode.
Note. The factory set default for the Idle timer is five seconds.
FA
H
Command
)
(1F7
H
Cyl. High
)
(1F5
H
Cyl. Low
)
(1F4
H
Drv. Head
)
(1F6
H
Sec. Num.
)
(1F3
H
Sec. Cnt.
)
(1F2
H
Bit 7Bit 6Bit 5Bit 4Bit 3 Bit 2Bit 1Bit 0
11111010
X
X
101D/SX
X
idle timer delay (in 100-msec increments)
30ST9100A Product Manual, Rev. A
3.7.11 Active and Set Idle Timer (FBH)
This command enables and disables the automatic Idle feature of the
drive. When the drive receives this command, it sets BSY, switches to
Active mode, and enables or disables the idle timer according to the value
placed in the Sector Count register. The drive then clears BSY and
generates an interrupt.
If the value in the Sector Count register is zero, the idle timer is disabled
and the drive does not automatically switch to Idle mode. If the value is
not zero, the drive switches to Idle mode after the specified delay time
has elapsed.
The delay time is specified in the Sector Count register in 100-msec
increments. The delay is reinitialized whenever the drive enters Active
mode.
Note. The factory-set default for the idle timer is five seconds.
FB
H
Command
)
(1F7
H
Cyl. High
)
(1F5
H
Cyl. Low
)
(1F4
H
Drv. Head
)
(1F6
H
Sec. Num.
)
(1F3
H
Sec. Cnt.
)
(1F2
H
Bit 7Bit 6Bit 5Bit 4Bit 3 Bit 2Bit 1Bit 0
11111011
X
X
101D/SX
X
idle timer delay (in 100-msec increments)
ST9100A Product Manual, Rev. A31
3.7.12 Check Idle Mode (FDH)
This command reports whether the drive is currently in or making a
transition to Idle or Active mode. When the drive receives this command,
it sets BSY, loads the appropriate code information into the Sector Count
register, clears BSY and generates an interrupt. The default time delay
before the drive enters Idle mode is five seconds.
Depending on what state the drive is in or making a transition to, one of
the following values is sent:
= The drive is in, or entering, Idle mode.
00
H
= The drive is in, or entering, Active or Standby mode.
FF
H
FD
H
Command
)
(1F7
H
Cyl. High
)
(1F5
H
Cyl. Low
)
(1F4
H
Drv. Head
)
(1F6
H
Sec. Num.
)
(1F3
H
Sec. Cnt.
)
(1F2
H
Bit 7Bit 6Bit 5Bit 4Bit 3 Bit 2Bit 1Bit 0
11111101
X
X
101D/SX
X
X
32ST9100A Product Manual, Rev. A
3.7.13 Rest/Resume commands
Some host systems reduce overall power consumption by temporarily
removing power from the disc drive. The Rest/Resume process allows
drive-state information to be saved to disc prior to powering down the
drive. Once power is restored, the drive-state information is retrieved and
used to return the drive to its prerest condition. The drive-state information is saved in a single 512-byte data block that includes current logical
geometry, set feature parameters, cache status and task file registers.
The Rest/Resume process involves three commands: Rest, Read Drive
State and Restore Drive State. The drive will not recognize and execute
these commands unless the Features register contains the value 0AC
Any other value in the Features register causes the drive to reject the
command with a command abort error.
Note. The Rest/Resume process does not save the contents of data
buffers or caches.
H.
3.7.13.1 Rest (E7H)
The host prepares the drive for a subsequent Read Drive State command
by issuing a Rest command. If two drives (master and slave) are present,
the host must issue the Rest and Read Drive State commands to the
slave prior to issuing them to the master.
Because the Rest mode can be used in addition to the other power
management modes, if the BSY or DRQ bits are set, the host should wait
up to 30 seconds for these bits to clear after the completion of any prior
command. If either the DRQ or BSY bits are set, the host may use the
DASP– signal to determine when to initiate Rest mode. The drive asserts
DASP– when a Rest command is received and negate it upon completion
of the Rest command. After the Rest command is issued, the host should
wait up to 10 seconds for the drive to assert INTRQ.
When the drive receives a Rest command, it captures the state of the I/O
registers as they existed upon completion of the previous command, then
enters Rest mode. After entering Rest mode, the drive rejects any
command other than a Read Drive State command with an aborted
command error. The Rest mode can only be cleared by power off or reset.
After issuing the Rest command, the host should poll the Alternate Status
register to monitor for completion status without clearing the interrupt flag
that may have been set for an application program.
ST9100A Product Manual, Rev. A33
Bit 7Bit 6Bit 5Bit 4Bit 3 Bit 2Bit 1Bit 0
Command
)
(1F7
H
Cyl. High
)
(1F5
H
Cyl. Low
)
(1F4
H
Drv. Head
)
(1F6
H
Sec. Num.
)
(1F3
H
Sec. Cnt.
)
(1F2
H
Features
)
(1F1
H
11100111
X
X
101D/SX
X
X
0AC
H
34ST9100A Product Manual, Rev. A
3.7.13.2 Read Drive State (E9H)
The Read Drive State command allows the host system to save certain
drive parameters to nonvolatile system memory before shutting down
power to the drive. The host should only issue this command following a
successful Rest command. If any command other than a Read Drive
State command follows a Rest command, the Rest command is aborted.
If a Read Drive State command follows any command other than a Rest
command, the Read Drive State command is aborted.
If the drive receives a Read Drive State command while in Rest mode,
it transfers essential drive-state information to disc, where the Restore
Drive State command can recover it following power-on.
Bit 7Bit 6Bit 5Bit 4Bit 3 Bit 2Bit 1Bit 0
Command
)
(1F7
H
Cyl. High
)
(1F5
H
Cyl. Low
)
(1F4
H
Drv. Head
)
(1F6
H
Sec. Num.
)
(1F3
H
Sec. Cnt.
)
(1F2
H
Features
)
(1F1
H
11101001
X
X
101D/SX
X
X
0AC
H
ST9100A Product Manual, Rev. A35
3.7.13.3 Restore Drive State (EAH)
This command allows the host system to restore the drive to the state it
was in at the time of the power-down in Rest mode. If the host has
previously caused a Rest mode, it must ensure that the first command
issued to the drive (after the drive powers up and is ready to accept
commands) is not one that will interfere with the intended resume
operation.
The host should only issue a Restore Drive State command when
powering up the drive after a successful Read Drive State command.
Otherwise the Restore Drive State command is aborted. When the drive
receives a Restore Drive State command, it reads the 256 bytes of
drive-state information that were saved with the Read Drive State command. This drive-state information is checked for validity. If there is a
problem with the data, the drive hangs busy with the trap code set to F5
in all of the AT interface registers. If bit zero of the last word transferred
(reset to 0), INTRQ is not asserted at the completion of this
is 0
H
command. If bit zero of the last word transferred is set to 1, INTRQ is
asserted following the command.
After issuing the Restore Drive State command, the host should poll the
Alternate Status register to monitor for completion status without clearing
any interrupt flag that may have been set for an application program.
H
Command
)
(1F7
H
Cyl. High
)
(1F5
H
Cyl. Low
)
(1F4
H
Drv. Head
)
(1F6
H
Sec. Num.
)
(1F3
H
Sec. Cnt.
)
(1F2
H
Features
)
(1F1
H
Bit 7Bit 6Bit 5Bit 4Bit 3 Bit 2Bit 1Bit 0
11101010
X
X
101D/SX
X
X
0AC
H
Seagate Technology, Inc.
920 Disc Drive, Scotts Valley, California 95066, USA
Publication Number: 36211-001, Rev. A, Printed in USA
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