SDI Technologies SDIO Card User Manual

SD Specifications

Part E1

SDIO Simplified Specification

Version 2.00

February 8, 2007

Technical Committee

SD Card Association

SDIO Simplified Specification Version 2.00

Revision History

Date Version Changes compared to previous issue

April 3, 2006 1.10 Simplified Version Initial Release

February 8, 2007 2.00 (1) Added method to change bus speed (Normal Speed up to 25MHz

and High Speed up to 50 MHz) (2) Operational Voltage Requirement is extended to 2.7-3.6V (3) Combine sections 12 (Physical Properties) and 13 (Mechanical

Extensions) and add miniSDIO to the new section 13 (Physical

Properties) (4) Add Embedded SDIO ATA Standard Function Interface Code (5) Reference of Physical Ver2.00 supports SDHC combo card. (6) Some typos in Ver1.10 are fixed.

SDIO Simplified Specification Version 2.00

Release of SD Simplified Specification

The following conditions apply to the release of the SD simplified specification ("Simplified Specification") by the SD Card Association. The Simplified Specification is a subset of the complete SD Specification which is owned by the SD Card Association.

Publisher:

SD Association 2400 Camino Ramon, Suite 375 San Ramon, CA 94583 USA Telephone: +1 (925) 275-6615 Fax: +1 (925) 886-4870 E-mail: office@sdcard.org

The SD Card Association

Notes:

This Simplified Specification is provided on a non-confidential basis subject to the disclaimers below. Any implementation of the Simplified Specification may require a license from the SD Card Association or other third parties.

Disclaimers:

The information contained in the Simplified Specification is presented only as a standard specification for SD Cards and SD Host/Ancillary products and is provided "AS-IS" without any representations or warranties of any kind. No responsibility is assumed by the SD Card Association for any damages, any infringements of patents or other right of the SD Card Association or any third parties, which may result from its use. No license is granted by implication, estoppel or otherwise under any patent or other rights of the SD Card Association or any third party. Nothing herein shall be construed as an obligation by the SD Card Association to disclose or distribute any technical information, know-how or other confidential information to any third party.

SDIO Simplified Specification Version 2.00

Conventions Used in This Document

Naming Conventions

Some terms are capitalized to distinguish their definition from their common English meaning. Words not capitalized have their common English meaning.

Numbers and Number Bases

Hexadecimal numbers are written with a lower case “h” suffix, e.g., FFFFh and 80h. Binary numbers are written with a lower case “b” suffix (e.g., 10b). Binary numbers larger than four digits are written with a space dividing each group of four digits, as in 1000 0101 0010b. All other numbers are decimal.

Key Words

May: Indicates flexibility of choice with no implied recommendation or requirement. Shall: Indicates a mandatory requirement. Designers shall implement such mandatory requirements to ensure interchangeability and to claim conformance with the specification. Should: Indicates a strong recommendation but not a mandatory requirement. Designers should give strong consideration to such recommendations, but there is still a choice in implementation.

Application Notes

Some sections of this document provide guidance to the host implementers as follows:

Application Note: This is an example of an application note.

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SDIO Simplified Specification Version 2.00

Table of Contents

1. General Description ................................................................................................................................. 1

1.1 SDIO Features .................................................................................................................................... 1

1.2 Primary Reference Document ............................................................................................................. 1

1.3 Standard SDIO Functions.................................................................................................................... 1

2. SDIO Signaling Definition........................................................................................................................ 2

2.1 SDIO Card Types ................................................................................................................................ 2

2.2 SDIO Card modes............................................................................................................................... 2

2.2.1 SPI (Card mandatory support) ..................................................................................................... 2

2.2.2 1-bit SD Data Transfer Mode (Card Mandatory Support) ............................................................. 2

2.2.3 4-bit SD Data Transfer Mode (Mandatory for High-Speed Cards, Optional for Low-Speed)......... 2

2.3 SDIO Host Modes ............................................................................................................................... 2

2.4 Signal Pins .......................................................................................................................................... 3

3. SDIO Card Initialization............................................................................................................................ 4

3.1 Differences in I/O card Initialization..................................................................................................... 4

3.2 The IO_SEND_OP_COND Command (CMD5)................................................................................. 10

3.3 The IO_SEND_OP_COND Response (R4)........................................................................................11

3.4 Special Initialization considerations for Combo Cards....................................................................... 12

3.4.1 Re-initialize both I/O and Memory .............................................................................................. 12

3.4.2 Using a Combo Card as SDIO only or SD Memory only after Combo Initialization.................... 12

3.4.3 Acceptable Commands after Initialization .................................................................................. 12

3.4.4 Recommendations for RCA after Reset ..................................................................................... 12

3.4.5 Enabling CRC in SPI Combo Card............................................................................................. 14

4. Differences with SD Memory Specification.......................................................................................... 15

4.1 SDIO Command List ......................................................................................................................... 15

4.2 Unsupported SD Memory Commands............................................................................................... 15

4.3 Modified R6 Response ...................................................................................................................... 16

4.4 Reset for SDIO.................................................................................................................................. 16

4.5 Bus Width.......................................................................................................................................... 16

4.6 Card Detect Resistor......................................................................................................................... 17

4.7 Timings.............................................................................................................................................. 17

4.8 Data Transfer Block Sizes................................................................................................................. 18

4.9 Data Transfer Abort ............................................................................................................

4.9.1 Read Abort ................................................................................................................................. 18

4.9.2 Write Abort ................................................................................................................................. 18

4.10 Changes to SD Memory Fixed Registers .......................................................................................... 18

4.10.1 OCR Register............................................................................................................................. 19

4.10.2 CID Register............................................................................................................................... 19

4.10.3 CSD Register ............................................................................................................................. 19

4.10.4 RCA Register ............................................................................................................................. 19

4.10.5 DSR Register ............................................................................................................................. 19

4.10.6 SCR Register ............................................................................................................................. 19

4.10.7 SD Status ................................................................................................................................... 19

4.10.8 Card Status Register .................................................................................................................. 19

5. New I/O Read/Write Commands............................................................................................................ 21

5.1 IO_RW_DIRECT Command (CMD52) .............................................................................................. 21

5.2 IO_RW_DIRECT Response (R5) ......................................................................................................22

5.2.1 CMD52 Response (SD modes).................................................................................................. 22

5.2.2 R5, IO_RW_DIRECT Response (SPI mode) ............................................................................. 23

5.3 IO_RW_EXTENDED Command (CMD53) ........................................................................................ 24

5.3.1 CMD53 Data Transfer Format.................................................................................................... 25

............... 18

SDIO Simplified Specification Version 2.00

5.3.2 Special Timing for CMD53 Multi-Block Read.............................................................................. 25

6. SDIO Card Internal Operation................................................................................................................ 26

6.1 Overview ........................................................................................................................................... 26

6.2 Register Access Time........................................................................................................................ 26

6.3 Interrupts ........................................................................................................................................... 26

6.4 Suspend/Resume.............................................................................................................................. 27

6.5 Read Wait.......................................................................................................................................... 27

6.6 CMD52 During Data Transfer............................................................................................................ 27

6.7 SDIO Fixed Internal Map................................................................................................................... 27

6.8 Common I/O Area (CIA) .................................................................................................................... 28

6.9 Card Common Control Registers (CCCR)......................................................................................... 28

6.10 Function Basic Registers (FBR) ........................................................................................................ 35

6.11 Card Information Structure (CIS)....................................................................................................... 37

6.12 Multiple Function SDIO Cards........................................................................................................... 37

6.13 Setting Block Size with CMD53......................................................................................................... 37

6.14 Bus State Diagram ............................................................................................................................ 38

7. Embedded I/O Code Storage Area (CSA) ............................................................................................. 39

7.1 CSA Access....................................................................................................................................... 39

7.2 CSA Data Format .............................................................................................................................. 39

8. SDIO Interrupts....................................................................................................................................... 40

8.1 Interrupt Timing ................................................................................................................................. 40

8.1.1 SPI and SD 1-bit Mode Interrupts .............................................................................................. 40

8.1.2 SD 4-bit Mode ............................................................................................................................ 40

8.1.3 Interrupt Period Definition .......................................................................................................... 40

8.1.4 Interrupt Period at the Data Block Gap in 4-bit SD Mode (Optional) .......................................... 40

8.1.5 Inhibited Interrupts (Removed Section)...................................................................................... 40

8.1.6 End of Interrupt Cycles............................................................................................................... 40

8.1.7 Terminated Data Transfer Interrupt Cycle .................................................................................. 41

8.1.8 Interrupt Clear Timing................................................................................................................. 41

9. SDIO Suspend/Resume Operation........................................................................................................ 42

10. SDIO Read Wait Operation..................................................................................................................... 43

11. Power Control..................................................................................................................

11.1 Power Control Overview.................................................................................................................... 44

11.2 Power Control support for SDIO Cards ............................................................................................. 44

11.2.1 Master Power Control ................................................................................................................ 44

11.2.2 Power Selection ......................................................................................................................... 45

11.2.3 High-Power Tuples..................................................................................................................... 45

11.3 Power Control Support for the SDIO Host.........................................................................................45

11.3.1 Version 1.10 Host....................................................................................................................... 45

11.3.2 Power Control Operation............................................................................................................ 46

12. High-Speed Mode ................................................................................................................................... 47

12.1 SDIO High-Speed Mode.................................................................................................................... 47

12.2 Switching Bus Speed Mode in a Combo Card................................................................................... 47

13. SDIO Physical Properties ...................................................................................................................... 48

13.1 SDIO Form Factors ........................................................................................................................... 48

13.2 Full-Size SDIO .................................................................................................................................. 48

13.3 miniSDIO........................................................................................................................................... 48

14. SDIO Power............................................................................................................................................. 48

14.1 SDIO Card Initialization Voltages ...................................................................................................... 48

14.2 SDIO Power Consumption ................................................................................................................ 48

15. Inrush Current Limiting.......................................................................................................................... 50

16. CIS Formats ............................................................................................................................................ 51

16.1 CIS Reference Document ................................................................................................................. 51

....................... 44

SDIO Simplified Specification Version 2.00

16.2 Basic Tuple Format and Tuple Chain Structure ................................................................................. 51

16.3 Byte Order Within Tuples .................................................................................................................. 51

16.4 Tuple Version .................................................................................................................................... 52

16.5 SDIO Card Metaformat...................................................................................................................... 52

16.6 CISTPL_MANFID: Manufacturer Identification String Tuple .............................................................. 53

16.7 SDIO Specific Extensions.................................................................................................................. 53

16.7.1 CISTPL_FUNCID: Function Identification Tuple......................................................................... 53

16.7.2 CISTPL_FUNCE: Function Extension Tuple .............................................................................. 54

16.7.3 CISTPL_FUNCE Tuple for Function 0 (common)....................................................................... 54

16.7.4 CISTPL_FUNCE Tuple for Function 1-7 .................................................................................... 55

16.7.5 CISTPL_SDIO_STD: Function is a Standard SDIO Function..................................................... 58

16.7.6 CISTPL_SDIO_EXT: Tuple Reserved for SDIO Cards............................................................... 58

Appendix A..................................................................................................................................................... 59

A.1 SD and SPI Command List.................................................................................................................... 59

Appendix B..................................................................................................................................................... 61

B.1 Normative References........................................................................................................................... 61

Appendix C..................................................................................................................................................... 62

Abbreviations and Terms................................................................................................................... 62

C.1

Appendix D..................................................................................................................................................... 64

SDIO Simplified Specification Version 2.00

Table of Tables

Table 3-1 OCR Values for CMD5 ..................................................................................................................... 10

Table 4-1 Unsupported SD Memory Commands ............................................................................................. 16

Table 4-2 R6 response to CMD3 ..................................................................................................................... 16

Table 4-3 SDIO R6 Status Bits......................................................................................................................... 16

Table 4-4 Combo Card 4-bit Control ................................................................................................................ 17

Table 4-5 Card Detect Resistor States............................................................................................................. 17

Table 4-6 is blanked......................................................................................................................................... 17

Table 4-7 SDIO Status Register Structure ....................................................................................................... 20

Table 5-1 Flag data for IO_RW_DIRECT SD Response.................................................................................. 23

Table 5-2 IO_RW_ EXTENDED command Op Code Definition....................................................................... 24

Table 5-3 Byte Count Values ........................................................................................................................... 25

Table 6-1 Card Common Control Registers (CCCR) ....................................................................................... 29

Table 6-2 CCCR bit Definitions ........................................................................................................................ 34

Table 6-3 Function Basic Information Registers (FBR).................................................................................... 35

Table 6-4 FBR bit and field definitions ............................................................................................................. 36

Table 6-5 Card Information Structure (CIS) and reserved area of CIA.............................................................37

Table 11-1 Reference Tuples by Master Power Control and Power Select...................................................... 45

Table 16-1 Basic Tuple Format........................................................................................................................ 51

Table 16-2 Tuples Supported by SDIO Cards.................................................................................................. 52

Table 16-3 CISTPL_MANFID: Manufacturer Identification Tuple.....................................................................53

Table 16-4 CISTPL_FUNCID Tuple................................................................................................................. 53

Table 16-5 CISTPL_FUNCE Tuple General Structure ..................................................................................... 54

Table 16-6 TPLFID_FUNCTION Tuple for Function 0 (common) .................................................................... 54

Table 16-7 TPLFID_FUNCTION Field Descriptions for Function 0 (common)................................................. 54

Table 16-8 TPLFID_FUNCTION Tuple for Function 1-7 .................................................................................. 55

Table 16-9 TPLFID_FUNCTION Field Descriptions for Functions 1-7............................................................. 57

Table 16-10 TPLFE_FUNCTION_INFO Definition........................................................................................... 57

Table 16-11 TPLFE_CSA_PROPERTY Definition ........................................................................................... 57

Table 16-12 CISTPL_SDIO_STD: Tuple Reserved for SDIO Cards................................................................ 58

Table 16-13 CISTPL_SDIO_EXT: Tuple Reserved for SDIO Cards................................................................. 58

Table A-14 SD Mode Command List................................................................................................................ 59

Table A-15 SPI Mode Command List............................................................................................................... 60

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SDIO Simplified Specification Version 2.00

Table of Figures

Figure 2-1 Signal connection to two 4-bit SDIO cards ....................................................................................... 3

Figure 3-1 SDIO response to non-I/O aware initialization.................................................................................. 4

Figure 3-2 Card initialization flow in SD mode (SDIO aware host) .................................................................... 7

Figure 3-3 Card initialization flow in SPI mode (SDIO aware host).................................................................... 9

Figure 3-4 IO_SEND_OP_COND Command (CMD5)..................................................................................... 10

Figure 3-5 Response R4 in SD mode...............................................................................................................11

Figure 3-6 Response R4 in SPI mode ..............................................................................................................11

Figure 3-7 Modified R1 Response ....................................................................................................................11

Figure 3-8 Re-Initialization Flow for I/O Controller........................................................................................... 13

Figure 3-9 Re-Initialization Flow for Memory controller ................................................................................... 13

Figure 5-1 IO_RW_DIRECT Command........................................................................................................... 21

Figure 5-2 R5 IO_RW_DIRECT Response (SD modes)..................................................................................22

Figure 5-3 IO_RW_DIRECT Response in SPI Mode....................................................................................... 23

Figure 5-4 IO_RW_EXTENDED Command..................................................................................................... 24

Figure 6-1 SDIO Internal Map.......................................................................................................................... 28

Figure 6-2 State Diagram for Bus State Machine............................................................................................. 38

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SDIO Simplified Specification Version 2.00

1. General Description

The SDIO (SD Input/Output) card is based on and compatible with the SD memory card. This compatibility includes mechanical, electrical, power, signaling and software. The intent of the SDIO card is to provide high-speed data I/O with low power consumption for mobile electronic devices. A primary goal is that an SDIO card inserted into a non-SDIO aware host shall cause no physical damage or disruption of that host or it’s software. In this case, the SDIO card should simply be ignored. Once inserted into an SDIO aware host, the detection of the card proceeds via the normal means described in this specification with some extensions. In this state, the SDIO card is idle and draws a small amount of power (15 mA averaged over 1 second). During the normal initialization and interrogation of the card by the host, the card identifies itself as an SDIO card. The host software then obtains the card information in a tuple (linked list) format and determines if that card’s I/O function(s) are acceptable to activate. This decision is based on such parameters as power requirements or the availability of appropriate software drivers. If the card is acceptable, it is allowed to power up fully and start the I/O function(s) built into it.

1.1 SDIO Features

• Targeted for portable and stationary applications

• Minimal or no modification to SD Physical bus is required

• Minimal change to memory driver software

• Extended physical form factor available for specialized applications

• Plug and play (PnP) support

• Multi-function support including multiple I/O and combined I/O and memory

• Up to 7 I/O functions plus one memory supported on one card.

• Allows card to interrupt host

• Operational Voltage range: 2.7-3.6V (Operational Voltage is used for Initialization)

• Application Specifications for Standard SDIO Functions.

• Multiple Form Factors:

• Full-Size SDIO

• miniSDIO

1.2 Primary Reference Document

This specification is based on and refers extensively to the SDA document:

SD Memory Card Specifications Part 1 PHYSICAL LAYER SPECIFICATION Version 2.00 May 9, 2006

The reader is directed to this document for more information on the basic operation of SD cards. In addition, other documents are referenced in this specification. A complete list can be found in appendix B.1.

This specification can apply to any released versions of Physical Layer Specification after Version 2.00.

1.3 Standard SDIO Functions

Associated with the base SDIO specification, there are several Application Specifications for Standard SDIO Functions. These common functions such as cameras, Bluetooth cards and GPS receivers have a standard register interface, a common operation method and a standard CIS extension. Implementation of the standard interfaces are optional for any card vendor, but compliance with the standard allows the use of standard drivers and applications which will increase the appeal of these cards to the consumer. Full information on these standard interfaces can be found in the Application Specifications for Standard SDIO Functions maintained by the SDA.

SDIO Simplified Specification Version 2.00

2. SDIO Signaling Definition

2.1 SDIO Card Types

This specification defines two types of SDIO cards. The Full-Speed card supports SPI, 1-bit SD and the 4-bit SD transfer modes at the full clock range of 0-25MHz. The Full-Speed SDIO cards have a data transfer rate of over 100 Mb/second (10 MB/Sec). A second version of the SDIO card is the Low-Speed SDIO card. This card requires only the SPI and 1-bit SD transfer modes. 4-bit support is optional. In addition, Low-Speed SDIO cards shall support a full clock range of 0-400 KHz. The intended use of Low-Speed cards is to support low-speed I/O capabilities with a minimum of hardware. The Low-Speed cards support such functions as modems, bar-code scanners, GPS receivers etc. If a card is a ‘Combo card’ (memory plus SDIO) then Full-Speed and 4-bit operation is mandatory for both the memory and SDIO portions of the card.

2.2 SDIO Card modes

There are 3 signaling modes defined for SD memory cards that also apply to SDIO Card:

2.2.1 SPI (Card mandatory support)

The SPI bus topology is defined in section 3.5.2 and the protocol is defined in sections 3.6.2 and 7 of the SD Physical Specification Version 2.00. In this mode pin 8, which is undefined for memory, is used as the interrupt pin. All other pins and signaling protocols are identical to the SD Physical Specification.

2.2.2 1-bit SD Data Transfer Mode (Card Mandatory Support)

This mode is identical to the 1 data bit (narrow) mode defined for SD Memory in section 3.6.1 of the SD Physical Specification. In this mode, data is transferred on the DAT[0] pin only. In this mode pin 8, which is undefined for memory, is used as the interrupt pin. All other pins and signaling protocols are identical to the SD Memory specification.

2.2.3 4-bit SD Data Transfer Mode (Mandatory for High-Speed Cards, Optional for Low-Speed)

This mode is identical to the 4 data bit mode (wide) defined for SD Memory in section 3.6.1 of the SD Physical Specification. In this mode, data is transferred on all 4 data pins (DAT[3:0]). In this mode the interrupt pin is not available for exclusive use as it is utilized as a data transfer line. Thus, if the interrupt function is required, a special timing is required to provide interrupts. See section 8.1.2 for details of this operation. The 4-bit SD mode provides the highest data transfer possible, up to 100 Mb/sec.

2.3 SDIO Host Modes

If a SDIO aware host supports the SD transfer mode, it is recommended that both the 1-bit and 4-bit modes be

supported. While a SDIO host that supports only the 4-bit transfer mode is possible, its performance with a

Low-Speed SDIO card may be reduced. This is because the only means to transfer data to and from a Low-Speed card would be the single byte per command transfer (using the IO_RW_DIRECT command (CMD52) see 5.1).

SDIO Simplified Specification Version 2.00

2.4 Signal Pins

CLK

CMD

DAT[3:0]

SD Host

CLK

CMD

DAT[3:0]

Figure 2-1 Signal connection to two 4-bit SDIO cards

The rest of this chapter is not included in the Simplified Specification.

SD I/O Card

SDIO Simplified Specification Version 2.00

3. SDIO Card Initialization

3.1 Differences in I/O card Initialization

A requirement for the SDIO specification is that an SDIO card shall not cause non-I/O aware hosts to fail when inserted. In order to prevent operation of I/O functions in non-I/O aware hosts, a change to the SD card identification mode flowchart is needed. A new command (IO_SEND_OP_COND, CMD5) is added to replace the ACMD41 for SDIO initialization by I/O aware hosts (see 3.2).

After reset or power-up, all I/O functions on the card are disabled and the I/O portion of the card shall not execute any operation except CMD5 or CMD0 with CS=low. If there is SD memory installed on the card (also called a combo card), that memory shall respond normally to all normal mandatory memory commands.

An I/O only card shall not respond to the ACMD41 and thus appear initially as an MMC card (See appendix B.1 for information on the MMC specification). The I/O only card shall also not respond to the CMD1 used to initialize the MMC cards and appear as a non-responsive card. The host then gives up and disables this card. Thus, the non-aware host receives no response from an I/O only card and force it to the inactive state. The operation of an I/O card with a non-I/O aware host is shown in Figure 3-1 Note that the solid lines are the actual paths taken while the dashed lines are not executed.

Reset

SPI Mode Idle

State

CMD58

(optional)

Busy

CMD1 or ACMD41

Normal SPI

memory operation

Invalid

Cmd

Invalid

Cmd

CMD0 + CS asserted (0)

SDIO card is

Rejected

Inactive State

SPI

Response

Idle State

ACMD41

(arg = 00)

Busy

ACMD41

arg = working

voltage

Response

Normal SD

memory operation

Response

Card is MMC

CMD0

CMD1

Response

SDIO card is

Reject ed

Figure 3-1 SDIO response to non-I/O aware initialization

SDIO Simplified Specification Version 2.00

An SDIO aware host sends CMD5 prior to the CMD55/ACMD41 pair, and thus would receive a valid OCR in the R4 response to CMD5 and continue to initialize the card. Figure 3-2 shows the operation of an SDIO aware host operating in the SD modes and Figure 3-3 shows the same operation for a host that operates in the SPI mode.

If the I/O portion of a card has received no CMD5, the I/O section remains inactive and shall not respond to any command except CMD5. A combo card stays in the memory-only mode. If no memory is installed on the card (i.e. an I/O only card in a non-SDIO aware host) the card would not respond to any memory command. This satisfies the condition where a user uses some I/O function on the card such as Ethernet to load a music file to the memory function of that card. The card is then removed and inserted into a non-SDIO aware host. That host would not enable the I/O function (no CMD5) so would appear to the player as a memory-only card. If the host were I/O aware, it would send the CMD5 to the card and the card would respond with R4. The host reads that R4 value and knows the number of available I/O functions and about the existence of any SD memory.

After the host has initialized the I/O portion of the card, it then reads the Common Information Area (CIA) of the card (see 6.8). This is done by issuing a read command, starting with the byte at address 0x00, of I/O function 0. The CIA contains the Card Common Control Registers (CCCR) and the Function Basic Registers (FBR). Also included in the CIA are pointers to the card’s common Card Information Structure (CIS) and each individual function’s CIS. The CIS structure is defined in section 16. The CIS includes information on power, function, manufacturer and other things the host needs to determine if the I/O function(s) is appropriate to power-up. If the host determines that the card should be activated, a register in the CCCR area enables the card and each individual function. At this time, all functions of the I/O card are fully available. In addition, the host can control the power consumption and enable/disable interrupts on a function-by-function basis. This access to I/O does not interfere with memory access to the card if present.

Combo Cards can accept CMD15 with RCA=0000, as described in, but there is an exception for SD memory only cards. Memory only cards require a non-zero RCA before the host may issue CMD15. Thus, CMD15 shall be issued after CMD3 in the Standby state. In the case of ACMD41, it shall accept RCA=0x0000.

As shown in Figure 3-2 and Figure 3-3, an SDIO aware host shall send CMD5 arg=0 as part of the initialization sequence after either Power On or a CMD 52 with write to I/O Reset. Sending CMD5 arg=0 that has not been preceded by one of these two reset conditions shall not result in either the host or card entering the initialization sequence.

SDIO Simplified Specification Version 2.00

Re-init Memory

Power On

Re-init IO

MEM=0

IO=0IO=0, MEM=0

CMD0 Pin1=High

CMD52 IO Reset

CMD8

CMD8 is required to support

CMD8 is required to support High Capacity Memory.

High Capacity Memory.

No Response

Check Response

Error Response

Good Response

F8=1F8=0

Unusable card

Skip IO Initialize or IO=1

Test IO Flag

No Response

IORDY=0 1sec Timeout

No Response

Unusable card

(Inactive State)

Execute IO Initialize & IO=0

Get IO OCR

CMD5 Arg=0

Check Response

NF>0 & OCR valid

Set New Voltage (if needed)

CMD5 Arg=WV

Check Response

IORDY=1

IO=1

Test MP Flag

Get IO OCR

IO Initialized

NF=0 or OCR invalid

MP=0

MP=1

SDIO Simplified Specification Version 2.00

Test MEM Flag

Skip memory initialize or MEM=1

Execute memory initialize & MEM=0

ACMD41 Arg=0

Get memory OCR

No Response

Check Response

OCR valid

OCR invalid

Set New Voltage (if needed)

ACMD41 Arg=HCS, WV

High Capacity Support Host: HCS=1

MRDY=0 1sec Timeout

No Response

MRDY=0 1sec Timeout

Unusable card

(Inactive State)

Check Response

MRDY=1

MEM=1

CMD2

CMD3

Memory Initialized

Memory Initialized If F8=1, CCS is valid

If F8=1, CCS is valid

IO=1

Test IO Flag

IO=0

CMD15 RCA=0

IO=0, MEM=1

Test Flags

Not SD

Card

Only Card

Var iables NF: Number of I/O Functions (CMD5 Response) MP: Memory Present Flag (CMD5 Response) IORDY: I/O Power-up Status (C bit in the CMD5 response) MRDY: Memory Power-up Status (OCR Bit31) HCS: Host Capacity Support (ACMD41 Argument)

Test CCS Test CCS

CCS=0 CCS=1 CCS=0 CCS=1

Standard

Capacity

Memory

High

Capacity

Memory

Only Card

IO Only

Card

IO=1, MEM=0

IO=1,

IO=1, MEM=1

MEM=1

Standard

Capacity

Combo

High

Capacity

Combo

Card

CCS: Card Capacity Status (ACMD41 Response) Flags IO: I/O Functions Initialized Flag MEM: Memory Initialized Flag F8: CMD8 Flag

Card

CMD15 RCA=0

Unusable card

(Inactive State)

Figure 3-2 Card initialization flow in SD mode (SDIO aware host)

SDIO Simplified Specification Version 2.00

Re-init Memory

MEM=0

Illegal Command

Skip IO Initialize or IO=1

Execute IO Initialize & IO=0

Power On

CMD0 CS=Low

CMD8

Check Response

Good Response

F8=1F8=0

Test IO Flag

Re-init IO

IO=0IO=0, MEM=0

CMD52 IO Reset

CMD8 is required to support High Capacity Memory.

Error Response

Unusable card

Illegal Command

IORDY=0 1sec Timeout

CMD5 Arg=0

Get IO OCR

Check Response

NF>0 & OCR valid

Set New Voltage (if needed)

CMD5 Arg=WV

Check Response

IORDY=1

IO=1

IO Initialized

Test MP

MP=1

NF=0 or OCR invalid

MP=0

SDIO Simplified Specification Version 2.00

Test MEM Flag

Execute memory initialize & MEM=0

CMD58

Skip memory initialize or MEM=1

Get memory OCR

Illegal Command

Check Response

OCR valid

OCR invalid

Set New Voltage (if needed)

ACMD41 Arg= HC S, WV

High Capacity Support Host: HCS=1

IDLE=1 1sec Timeout

Check Response

IDLE=0

MEM=1

Memory Initialized

Illegal Command

CMD58

If F8=1, CMD58 is required to get CCS. If F8=0, CSS=0.

IO=0, MEM=1

Not SD

Card

Test CCS Test CCS

CCS=0 CCS=1 CCS=0 CCS=1

Standard

Capacity

Memory

Only Card

High

Capacity

Memory

Only Card

Test Flags

IO=1, MEM=0

IO Only

Card

IO=1, MEM=1

Standard

Capacity

Combo

Card

IO=0, MEM=0

Unusable card

High

Capacity

Combo

Card

CCS: Card Capacity Status (ACMD41 Response) Flags IO: I/O Functions Initialized Flag MEM: Memory Initialized Flag F8: CMD8 Flag

Figure 3-3 Card initialization flow in SPI mode (SDIO aware host)

SDIO Simplified Specification Version 2.00

3.2 The IO_SEND_OP_COND Command (CMD5)

Figure 3-4 shows the format of the IO_SEND_OP_COND command (CMD5). The function of CMD5 for SDIO cards is similar to the operation of ACMD41 for SD memory cards. It is used to inquire about the voltage range needed by the I/O card. The normal response to CMD5 is R4 in either SD or SPI format. The R4 response in SD mode is shown in Figure 3-5 and the SPI version is shown in Figure 3-6.

Command Index

000101b

1 1 6 8 24 7 1

Figure 3-4 IO_SEND_OP_COND Command (CMD5)

The IO_SEND_OP_COND Command contains the following fields:

S(tart bit): Start bit. Always 0 D(irection): Direction. Always1 indicates transfer from host to card. Command Index: Identifies the CMD5 command with a value of 000101b Stuff Bits: Not used, shall be set to 0. I/O OCR:

CRC7: 7 bits of CRC data E(nd bit): End bit, always 1

Stuff

Bits

I/O OCR CRC7 E

Operation Conditions Register. The supported minimum and maximum values

for VDD. The layout of the OCR is shown in Table 3-1. See section 4.10.1 for additional information.

I/O OCR bit

position

0-3 Reserved

4 Reserved 5 Reserved 6 Reserved 7 Reserved 8 2.0-2.1

9 2.1-2.2 10 2.2-2.3 11 2.3-2.4 12 2.4-2.5 13 2.5-2.6 14 2.6-2.7 15 2.7-2.8 16 2.8-2.9 17 2.9-3.0 18 3.0-3.1 19 3.1-3.2 20 3.2-3.3 21 3.3-3.4 22 3.4-3.5 23 3.5-3.6

VDD Voltage Window

(in Volts)

Table 3-1 OCR Values for CMD5

The SDIO Version 2.00 cards shall support the operational voltage range 2.7-3.6V and are not necessary to support the voltage range 2.0-2.7V for basic communication. The hosts, which support SDIO Version 2.00, shall not use voltage range 2.0-2.7V for basic communication.

SDIO Simplified Specification Version 2.00

3.3 The IO_SEND_OP_COND Response (R4)

An SDIO card receiving CMD5 shall respond with a SDIO unique response, R4. The format of R4 for both the SD and SPI modes is:

Reserved C Number

of I/O

functions

1 1 6 1 3 1 3 24 7 1

Figure 3-5 Response R4 in SD mode

Modified

Number

of I/O

functions

8 1 3 1 3 24

Figure 3-6 Response R4 in SPI mode

The Response, R4 contains the following data:

S(tart bit): Start bit. Always 0 D(irection): Direction. Always 0. Indicates transfer from card to host. Reserved: Bits reserved for future use. These bits shall be set to 1. C: Set to 1 if Card is ready to operate after initialization I/O OCR:

Operation Conditions Register. The supported minimum and maximum values

for VDD. The layout of the OCR is shown in Table 3-1. See section 4.10.1 for

additional information. Memory Present: Set to 1 if the card also contains SD memory. Set to 0 if the card is I/O only. Number of I/O Functions: Indicates the total number of I/O functions supported by this card. The range is 0-7.

Note that the common area present on all I/O cards at Function 0 is not included in this count. The I/O functions shall be implemented sequentially beginning at function 1.

Modified R1: The SPI R1 response byte as described in the SD Physical Specification modified

for I/O as follows:

Memory

Present

Memory Present

Stuff

I/O OCR Reserved E

Bits

Stuff Bits I/O OCR

00 0

1 = in idle state RFU (always 0) 1 = illegal command 1 = COM CRC error 1 = Function number error RFU (always 0) 1 = parameter error Start Bit (always 0)

Figure 3-7 Modified R1 Response

Stuff Bits: Not used, shall be set to 0.

SDIO Simplified Specification Version 2.00

Once an SDIO card has received a CMD5, the I/O portion of that card is enabled to respond normally to all further commands. This I/O enable of the functions within the I/O card shall remain set until a reset, power cycle

or CMD52 with write to I/O reset is received by the card. Note that a SD memory only card may respond to a CMD5. The proper response for a memory only card would be Memory Present = 1 and Number of I/O Functions = 0. A memory only card built to SD Memory Card specification version 1.01 would detect the CMD5

as an illegal command and not respond. Note that unlike the similar memory command ACMD41, The SPI response to CMD5 does contain the OCR value from the card.

The I/O aware host sends CMD5. If the card responds with response R4 within the timeout value of Ncr as defined in the SD Physical Specification, the host determines the card’s configuration based on the data contained within the R4.

3.4 Special Initialization considerations for Combo Cards

The host must be aware of some special situations when initializing a Combo card (SDIO plus SD Memory on the same card). This is caused because an implementation of the Combo card could actually use 2 separate controllers (Memory and I/O) in the same package and sharing the same bus lines. It important for the host to both detect and properly configure both parts (controllers) of a Combo card in order to prevent conflicts between the SDIO and the SD memory controller. These concerns are caused due to the different response to a reset (hard or soft) by the two controllers. Another concern is the value of the RCA (Relative Card Address) that exists within the Memory controller.

Note that this consideration is for the SD 1-bit and SD 4-bit modes only. In The SPI mode, card select/de-select is accomplished using the hardware CS line rather than the RCA.

3.4.1 Re-initialize both I/O and Memory

When the host re-initializes both I/O and Memory controllers, it is strongly recommended that the host either execute a power reset (power off then on) or issues a reset commands to both controllers prior to any other

operation. If the host chooses to use the reset commands, it shall issue CMD52 (I/O Reset) first, because it cannot issue CMD52 after CMD0 (see 4.4). After the reset, the host shall re-initialize both the I/O and Memory controller as defined in Figure 3-2.

3.4.2 Using a Combo Card as SDIO only or SD Memory only after Combo Initialization

If a host intends to use only the SDIO or the Memory portion of a Combo Card, it is strongly recommended that the host power reset (power off then on) or issues reset commands to both controllers prior to any other

operation. If the host chooses to use the reset commands, it shall issue CMD52 (I/O Reset) first, because it cannot issue CMD52 after CMD0 (see 4.4). After the resets, the host re-initializes either the I/O and Memory controller as defined in Figure 3-2.

3.4.3 Acceptable Commands after Initialization

When the host re-initializes a Combo card, the acceptable commands that the host can issue are restricted until the I/O controller is placed into the command state and memory controller enters the transfer state. The kinds of prohibited commands are identified in the next section. Combo cards may not work correctly when the host issues these prohibited commands. The proper command sequence for the I/O controller and the memory controller are shown below. Note that CMD15 (GO_INACTIVE_STATE) can be sent at any time after initialization in order to send any addressed memory controller to the inactive state.

3.4.4 Recommendations for RCA after Reset

Important Note: The RCA specification was not fully defined in SDIO Specification Ver1.0. There are two types of card (SDIO or Combo) with different responses to CMD0 or SDIO reset. The possible responses are:

SDIO Simplified Specification Version 2.00

The card clears RCA to 0x0000 The card keeps current RCA value

Command Sequence

Combo Init

(After CMD7 with the correct RCA)

Issue CMD52 (Reset I/O)

Re-initialize I/O (CMD5)

Issue CMD3

Issue CMD7 with the correct RCA

(and Data Transfer)

Figure 3-8 Re-Initialization Flow for I/O Controller

Figure 3-8 shows the re-initialization flow for the I/O controller of a Combo card. The flow of commands on the left side is matched with the RCA and controller states on the right side. The RCA value of xxxx denotes an RCA value of either 0x0000 or the prior RCA value. For new controller designs, a reset RCA value of 0x0000 is recommended. The host shall not issue any commands to the Combo Card except for CMD0, CMD5, CMD3 or CMD7 until the I/O controller has transitioned to the cmd state.

Command Sequence

Card RCA Select/Deselect Mem State I/O State

Select tran cmd

Sel Desel

Deselect

Desel Sel

tran

cmd idle

stby cmd

idle

RCA1

xxxx

RCA1

xxxx

RCA2

Card RCA Select/Deselect Mem State I/O State

stbyidle

Combo Init

(After CMD7 with the correct RCA)

Issue CMD0 (Reset Memory)

Re-initialize Memory (ACMD41)

Issue CMD2

Issue CMD3)

Issue CMD7 with the correct RCA

(and Data Transfer)

Figure 3-9 Re-Initialization Flow for Memory controller

RCA1 Select tran cmd

RCA1

xxxxh

RCA2

RCA2 Desel Sel

Sel Desel

Deselect

tran

idle

idle ready

ready ident

stbyident

stby tran

cmd

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