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SaRonix
Technical Data
ACTUAL SIZE
Description
A voltage controlled crystal oscillator
with a wide range of performance options to 125 MHz. The devices are packaged in either standard 14-pin or 8-pin
DIP compatible all metal, resistance
welded packages for commercial or industrial temperature range applications.
True SMD DIL14 versions for IR reflow
are available, select option "S" in part
number builder. See separate data sheet
for SMD package dimensions.
Applications & Features
•
Phase-locked loops encountered in
Telecom, LAN and Wireless data, and
in video processing applications
•
LVCMOS, LVTTL compatible
˜
Tri-state option available
Output Waveform
CMOS
1 Level
80% V
50% V
20% V
0 Level
DD
DD
DD
T
r
SYMMETRY
T
f
V
DD
GND
Voltage Controlled Crystal Oscillator
3.3 & 5V, LVCMOS/LVTTL
Sx1310 / Sx1319 / Sx1510 / Sx1519 Series
Frequency Range:
Frequency Stability: ±25 or ±50 ppm over all conditions: operating temperature,
Aging:
Temperature Range:
Operating:
Storage:
Supply Voltage:
Recommended Operating: 5 V ±5% or 3.3V ±10%
Supply Current:
32 to 70 MHz:
70+ to 125 MHz:
Output Drive:
Symmetry:
Rise & Fall Times:
Logic 0:
Logic 1:
Load:
Jitter:
Pull Characteristics:
Input Impedance:
Frequency Response (-3dB):
Pullability:
Control Voltage:
Transfer Function:
Linearity:
Center Control Voltage:
Phase noise: -95 dbc typ / Hz @ 100Hz
Mechanical:
Shock:
Solderability:
Terminal Strength:
Vibration:
Solvent Resistance:
Resistance to Soldering Heat:
Environmental:
Gross Leak Test:
Fine Leak Test:
Thermal Shock:
Moisture Resistance:
32 MHz to 125 MHz
voltage change, load change, calibration tolerance, with V
= 2.5V @ 5V, VC = 1.65V @ 3.3V
@ 40°C: ±10 ppm max for 5 years or ±12 ppm max for 10 years
0 to +70°C or -40 to +85°C
-55 to +125°C
50mA max, 35mA max @ 3.3V
65mA max, 35mA max @ 3.3V
3.3V: 45/55% max @ 50% VDD for 0 to 70°C,
3.3V: 40/60% max @ 50% VDD for -40 to +85°C
5.0V: 45/55% max @ 50% V
4ns max: 20% to 80% V
1.5ns max: 0.5V to 2.5V @ 5V TTL only
0.5V max @ 5V or 20% VDD max @ 3.3V
2.5V min @ 5V or 80% VDD min @ 3.3V
5V: 5TTL or 50pF, 32 to 50 MHz
5V: 5TTL or 30pF 50+ to 125 MHz
3.3V: 30pF up to 80 MHz, 95Ω AC up to 125 MHz
20ps max RMS period jitter
50KΩ min
50 kHz min
±25, ±50, ±75, ±100 ppm APR*
0.5 to 4.5 V @ 5V or 0.3 to 3.0V @ 3.3V
Frequency increases when Control Voltage increases
5% or 10% max
2.5V @ 5V, 1.65V @ 3.3V
-110 dbc typ / Hz @ 1kHz
-100 dbc typ / Hz @ 10kHz
MIL-STD-883, Method 2002, Condition B
MIL-STD-883, Method 2003
MIL-STD-202, Method 211, Conditions B2
MIL-STD-883, Method 2007, Condition A
MIL-STD-202, Method 215
MIL-STD-202, Method 210, Condition A, B or C
( I or J for Gull Wing )
MIL-STD-883, Method 1014, Condition C
MIL-STD-883, Method 1014, Condition A2
MIL-STD-883, Method 1011, Condition A
MIL-STD-883, Method 1004
DD
40/60% max @ 1.4V TTL level
DD or
C
SaRonix
* APR = (VCXO Pull relative to specified Output Frequency) – (VCXO Frequency Stability)
NOTE: APR is inclusive of Aging
DS-162 REV E
141 Jefferson Drive • Menlo Park, CA 94025 • USA • 650-470-7700 • 800-227-8974 • Fax 650-462-9894
SaRonix
141 Jefferson Drive • Menlo Park, CA 94025 • USA • 650-470-7700 • 800-227-8974 • Fax 650-462-9894
Technical Data
Package Details
FULL SIZE PACKAGE
21.0
max
.825
4.85±.25
.191±.01
Pin 3
Pin 1
4.57±.13
.18±.005
Pin 14
Pin Function:
Pin 1: Control Voltage
Pin 3: Tri-State control
(Tri-State version only)
Pin 7: GND / Case (VSS)
Includes Date Code, Frequency & Part Number
3.94±.25
.155±.010
15.24±.13
.600±.005
12.2±.13
.480±.005
(4) Glass
Insulators
Standard Marking Format
Pin 12
Pin 8
Pin 8: Output
Pin 12: N/C
(Tri-State version only)
Pin 14: VDC (VDD)
5.08
.200
.46±.05
.018±.002
7.62±.13
.300±.005
max
Pin 7
0.91
.036
13.0
.510
max
Voltage Controlled Crystal Oscillator
3.3 & 5V, LVCMOS/LVTTL
Sx1310 / Sx1319 / Sx1510 / Sx1519 Series
Part Numbering Guide
SaRonix
T = Tri-State
Blank = Non Tri-State
Series
131 = 3.3V
151 = 5.0V
Package Size
0 = Full Size
9 = Half Size
Stability Tolerance
A = ±25 ppm, 0 to 70°C
B = ±50 ppm, 0 to 70°C
E = ±50 ppm, -40 to +85°C
* APR = (VCXO Pull relative to specified Output Frequency) – (VCXO Frequency Stability)
NOTE: APR is inclusive of Aging
Tri-State Logic Table
S T 151 0 B A B J - 60.0000 (T)
Pullability (min APR*)
A = ±50 ppm
B = ±100 ppm
G = ±25 ppm
H = ±75 ppm
Packing Method
(T) = Tape & Reel for SMD versions,
full reel increments only, 200pcs (full
size) or 250pcs (half size)
Blank = Bulk
Frequency (MHz)
Lead Style
Blank = Thru-Hole
J = Gull Wing
S = True SMD Adaptor for Full Size
packages, see separate data sheet for
dimensions
Linearity
A = 5%
B = 10%
SARONIX
VCXO
Denotes Pin 1
HALF SIZE PACKAGE
13.0
max
.510
10.87
max
0.91
.036
.46±.08
.018±.003
Pin 1
Control Voltage
1.5
.059
13.0
.510
max
Pin 8
V
DD
Includes Date Code, Frequency & Part Number
.428
max
7.62±.20
.300±.008
120°
120°
120°
1.5
.059
Standard Marking Format
SARONIX
5.08
.200
6.86
.270
GND Case (VSS)
7.62±.20
.300±.008
6.0
.236
max
Pin 4
Pin 5
Output
Pin 3 Input
Logic 1 or NC
Logic 0 or GND
Test Circuits
Figure 1
30pF or 50pF Load
Figure 2
TTL Load
POWER
SUPPLY
POWER
SUPPLY
Pin 8 Output
Oscillation
High Impedance
mA
M
V M
mA
M
V M
Required Input Levels on Pin 3:
Logic 1 = 3.0 V min
Logic 0 = 0.3V max
TEST
POINT
Pin 14 (8) Pin 8 (5)
V
OUT
DD
OSCILLATOR
GND
Pin 1 (1)*
POINT
Pin 14 (8) Pin 8 (5)
DD
OSCILLATOR
Pin 1 (1)*
Pin 7 (4)
CONTROL VOLTAGE
TEST
OUTV
GNDN/C
Pin 7 (4)
CL = 30pF or 50pF
(Note A)
CL = 15pF
(Note A)
RL = 780Ω
MMDB7000
or Equiv
Denotes Pin 1
Scale: None (Dimensions in )
mm
inches
NOTE A: CL includes probe and fixture capacitance
*( ) Indicates pin numbers for half size package
All specifications are subject to change without notice.
CONTROL VOLTAGE
DS-162 REV E