Sanyo VPC SX 560, VPC-SX560EX, VPC-SX560E User Manual

SERVICE MANUAL

FILE NO.

Color Digital Camera

Contents

1. OUTLINE OF CIRCUIT DESCRIPTION ....................2

2. DISASSEMBLY........................................................13

3. ELECTRICAL ADJUSTMENT..................................16

4. USB STORAGE INFORMATION

REGISTRATION ......................................................21

5. TROUBLESHOOTING GUIDE.................................22

6. PARTS LIST.............................................................23

CABINET AND CHASSIS PARTS 1 ........................23

CABINET AND CHASSIS PARTS 2 ........................24

ELECTRICAL PARTS .............................................. 25

ACCESSORIES .......................................................32

PACKING MATERIALS............................................32

CIRCUIT DIAGRAM (Refer to the separate volume)

VPC-SX560EX

(Product Code : 126 279 01) (Europe) (PAL Genenral)

VPC-SX560E

(Product Code : 126 279 03) (U.K.)

VPC-SX560

(Product Code : 126 279 02) (U.S.A.) (Canada)

PRODUCT SAFETY NOTICE

The components designated by a symbol ( ! ) in this schematic diagram designates components whose value are of special significance to product safety. Should any component designated by a symbol need to be replaced, use only the part designated in the Parts List. Do not deviate from the resistance, wattage, and voltage ratings shown.

CAUTION : Danger of explosion if battery is incorrectly replaced.

Replace only with the same or equivalent type recommended by the manufacturer. Discard used batteries according to the manufacturer’s instructions.

NOTE : 1. Parts order must contain model number, part number, and description.

2. Substitute parts may be supplied as the service parts.

3. N. S. P. : Not available as service parts.

Design and specification are subject to change without notice.

SX114/EX, E, U

REFERENCE No. SM5310249

1. OUTLINE OF CIRCUIT DESCRIPTION

9 6 5 4 3 2 1

14 15 16 17

G R

G R G R

B G

B G B G

Vertical register

Horizontal register

Note

Note: Photo sensor

VOUT

GND

ø3

øSUB

SUB

øRG

GND

VDD

GND

ø2B

Vø2A

Vø1

Hø1

Hø2

1-1. CA1 CIRCUIT DESCRIPTION

Around CCD block

1. IC Configuration

IC903 (ICX267) CCD imager IC902, IC904, IC908 (74ACT04MTC) H driver IC907 (CXD3400N) V driver IC905 (AD9840) CDS, AGC, A/D converter

2. IC903 (CCD)

[Structure]

Interline type CCD image sensor

Optical size Diagonal 8 mm (1/2 type) Effective pixels 1392 (H) × 1040 (V) Pixels in total 1434 (H) ×1050 (V) Actual pixels 1360 (H) × 1024 (V)

Optical black

Horizontal (H) direction: Front 2 pixels, Rear 40 pixels Vertical (V) direction: Front 8 pixels, Rear 2 pixels

Dummy bit number Horizontal : 20 Vertical : 3

Pin 1

Pin 11

Fig. 1-1.Optical Black Location (Top View)

Pin No.

2, 3

5, 6, 8,

14, 16

7, 9, 12

10 11 13

Symbol

Vφ

φSUB

V φ

2A, Vφ2B

V φ3

GND

VOUT

VDD

CSUB

Pin Description

Vertical register transfer clock

GND Signal output Circuit power Substrate clock

Substrate bias

Waveform

GND

DC DC

Fig. 1-2. CCD Block Diagram

Voltage

-8.0 V, 0 V

-8.0 V, 0 V, 15 V

-8.0 V, 0 V

0 V Aprox. 7 V 15 V Different from every CCD

Different from every CCD

17 18

φRG

H φ

Protection transistor bias

Reset gate clock

Horizontal register transfer clock

-8 V 12 V, 17 V

0 V, 5 V

Table 1-1. CCD Pin Description

When sensor read-out

– 2 –

3. IC902, IC904, IC908 (H Driver) and IC907 (V Driver)

An H driver and V driver are necessary in order to generate the clocks (vertical transfer clock, horizontal transfer clock and electronic shutter clock) which driver the CCD. IC902, IC904 and IC908 are inverter IC which drives the horizontal CCDs (H1 and H2). In addition the XV1-XV3 signals which are output from IC102 are the vertical transfer clocks, and the XSG1 and XSG signal which is output from IC102 is superimposed onto XV2A and XV2B at IC907 in order to generate a ternary pulse. In addition, the XSUB signal which is output from IC102 is used as the sweep pulse for the electronic shutter, and the RG signal which is output from IC102 is the reset gate clock.

4. IC905 (CDS, AGC Circuit and A/D Converter)

The video signal which is output from the CCD is input to Pin (30) of IC905. There are S/H blocks inside IC905 generated from the XSHP and XSHD pulses, and it is here that CDS (correlated double sampling) is carried out. After passing through the CDS circuit, the signal passes through the AGC amplifier. It is A/C converted internally into a 10-bit signal, and is then input to IC102 of the CA2 circuit board. The gain of the AGC amplifier is controlled by serial data which is output from IC102 of the CA2 circuit board.

PBLK

CCDIN

CLPDM

AUX1IN

AUX2IN

AVDD

CDS

CLP

4 dB

MUX

AVSS

2~36 dB

2:1

VGA

MUX

BUF

2:1

CONTROL

REGISTERS

DIGITAL

INTERFACE

Offset

DAC

CLPOB

AD9840

CLP

10-BIT

ADC

BANDGAP

REFERENCE

INTERNAL

BIAS

INTERNAL

TIMING

DRVDD DRVSS

DOUT

VRT VRB

CML

DVDD

DVSS

GND

Fig. 1-3. IC902, IC904 and IC908 Block Diagram

Input

Buffer

XSHT

XV3

XSG3B

XSG3A

XV1

XSG1B



XSG1A

SDATA

SCK

SEN

Fig. 1-5. IC905 Block Diagram

SHT

V3B

V3A

V1B

V1A

DATA

SHDSHP

CLK

XV4

XV2

Fig. 1-4. IC907 Block Diagram

– 3 –

GND

5. Transfer of Electric Charge by the Horizontal CCD

The transfer system for the horizontal CCD emplays a 2-phase drive method. The electric charges sent to the final stage of the horizontal CCD are transferred to the floating diffusion, as shown in Fig. 1-6. RG is turned on by the timing in (1), and the floating diffusion is charged to the potential of PD. The RG is turned off by the timing in (2). In this condition, the floating diffusion is floated at high impedance. The H1 potential becomes shallow by the timing in (3), and the electric charge now moves to the floating diffusion. Here, the electric charges are converted into voltages at the rate of V = Q/C by the equivalent capacitance C of the floating diffusion. RG is then turned on again by the timing in (1) when the H1 potential becomes deep. Thus, the potential of the floating diffusion changes in proportion to the quantity of transferred electric charge, and becomes CCD output after being received by the source follower. The equivalent circuit for the output circuit is shown in Fig. 1-7.

(1)

H1 H2 H1 H2 H1 HOG RG

CCD OUT

Floating diffusion

(2)

H1 H2 H1 H2 H1 HOG RG

CCD OUT

(1) (2) (3)

3.5V 0V

15.5V 12V

(3)

H1 H2 H1 H2 H1 HOG RG

Reset gate pulse

Direction of transfer

H Register

Electric charge

Floating diffusion gate is floated at a high impedance.

CCD OUT

Fig. 1-6. Horizontal Transfer of CCD Imager and Extraction of Signal Voltage

6. Lens drive block

6-1. Shutter drive

The two control signals (SIN1, SIN2) which are output from

C is charged equivalently

12V Pre-charge drain bias（PD）

Voltage output

the ASIC expansion port (IC106) are converted into drive pulses(SOUT1, SOUT2) by the motor drive (IC951), and the shutter is opened and closed by regular current drive.

6-2. Iris drive

The two control signals (IIN1, IIN2) which are output from the ASIC expansion port (IC106) are converted into drive pulses (IOUT1, IOUT2) by the motor drive (IC952), and the iris is opened and closed.

6-3. Focus drive

The focusing motor drive clock (FCLK) which are output from the ASIC makes drive signal (FA1, FA2, FB1 and FB2) from drive drection signal (FCW) by driver (IC951) and is then used to drive the micro stepping motor for focusing motor. Detection of the standard focusing positions is carried out by means of the photointerruptor (FOCUS PI) inside the lens block.

RG pulse peak signal

Signal voltage

Black level

Fig. 1-7. Theory of Signal Extraction Operation

– 4 –

1-2. CA2 CIRCUIT DESCRIPTION

1. Circuit Description 1-1. Scannning converter (Interlace converter)

This circuit uses the function of a 64-Mbit SDRAMs to convert the non-interlaced signal which is output from the CCD into an interlaced signal for the video monitor.

1-2. Camera signal processor

This comprises circuits such as the digial clamp circuit, white balance circuit, γcircuit, color signal generation circuit, matrix circuit and horizontal aperture circuit.

1. Digital clamp circuit

The optical black section of the CCD extracts 16-pixel averaged values from the subsequent data to make the black level of the CCD output data uniform for each line. The 16-pixel averaged value for each line is taken as the sum of the value for the previous line multiplied by the coefficient k and the value for the current line multiplied by the coefficient 1-k.

2. White balance circuit

This circuit controls the white balance by using the A WB judgement value computed by the CPU to control the gain for each R, G and B pixel based on the CCD data which has been read.

3. γ circuit

This circuit performs (gamma) correction in order to maintain a linear relat ionship b etween the light i nput to the camer a and the light output from the picture screen.

4. Color generation circuit

This circuit converts the CCD da ta int o RGB signal s.

5. Matrix circuit

This circuit generates the Y s ignals , R-Y signals and B-Y signals from the RGB signals.

1-8. 8-bit D/A circuit (Audio)

This circuit converts the audio signals (analog signals) from the microphone to 8-bit digital signals.

1-9. 8-bit A/D circuit (Audio)

The audio signals which were converted to digial form by the 8-bit A/D circuit are temporarily to a sound buffer and then recorded in the SSFDC card. During playback, the 8-bit D/A circuit converts these signals into analog audio signals.

1-10. Sound buffer

Audio memory

1-11. LCD driver

The Y/C signals which are input to the LCD driver are converted to RGB signals, and the timing signal which is necessary for LCD monitor display and the RGB signals are then supplied to the LCD monitor.

1-12. LCD monitor

This is the image display device which displays the image signals supplied from the LCD driver.

1-13. UART

This circuit is used for transmitting serial data to a PC. The interface is RS-232C-compatible.

1-14. Memory card control

This reads data from the memory card and stores it in SDRAM, and writes out the image data stored in SDRAM. In addition, error correction is carried out when the data is read.

1-15. MJPEG compression

Still and continuous frame data is converted to JPEG format, and movie images are compressed and expanded in MJPEG format.

6. Horizontal aperture circuit

This circuit is used generate the aperture signal.

1-3. SDRAM controller

This circuit outputs address, RAS, CAS and AS data for controlling the SDRAM. It also refr eshes the S DRA M.

1-4. PIO

The expansion parallel port can be used for functions such as stroboscope control and LCD driver control.

1-5. SIO (Serial control)

This is the interface for the 4-bit mic roprocessor.

1-6. USB control

This is comunicated PC with 12 Mbps.

1-7. TG, SG block

This is the timing generation circuit which generates the clocks (vertical transfer clock and electronic shutter clock) which drive the CCD.

2. Outline of Operation

When the shutter opens, the reset signals, TEST0, TEST1 and the serial signals (“take a picture” commands) from the 8-bit microprocessor are input and record operation starts. When the TG drives the CCD, picture data passes through the A/D and is then input to the ASIC as 10-bit data. This data then passes through the DCLP, AWB, shutter and γcircuit, after which it is input to the SDRAM. The AWB, shutter, γ, and AGC value are computed from this data, and two exposures are made to obtain the optimum picture. The data which has already been stored in the SDRAM is read by the CPU and color generation is carried out. Each pixel is interpolated from the surrounding data as being either R, G or B primary color data to produce R, G and B data. At this time, correction of the lens distortion which is a characteristic of wide-angle lenses is carried out. Aperture correction is carried out, and in case of still picture the data is then compressed by the JPEG method and in case of picture it is compressed by MJPEG method and is written to compact flash card. When the data is to be output to an external device, it is read JPEG picture data from the compact flash card and output to PC via the UART.

– 5 –

3. LCD Block

During EE, gamma conversion is carried out for the 10-bit RGB data which is input from the A/D conversion block of the CCD to the ASIC in order that the γrevised can be displayed on the video. The YUV of 640 x 480 is then transferred to the SVRAM. The data which has accumulated in the SDRAM is after D/A conversion is carried out by SDRAM control circuit inside the ASIC, makes Y/C signal, the data is sent to the LCD panel and displayed. If the shutter button is pressed in this condition, the 10-bit data which is output from the A/D conversion block of the CCD is sent to the SDRAM (DMA transfer), and is displayed on the LCD as a freeze-frame image. During playback, the JPEG image data which has accumulated in the compact flash card is converted to RGB signals. In the same way as for EE, the data is then sent to the SDRAM, after which D/A conversion is carried out inside the ASIC, and then the data is sent to the LCD panel and displayed. The LCD driver is converted Y/C signals to RGB signals from ASIC, and these RGB signals and the control signal which is output by the LCD driver are used to drive the LCD panel. The RGB signals are 1H transposed so that no DC component is present in the LCD element, and the two horizontal shift register clocks drive the horizontal shift registers inside the LCD panel so that the 1H transposed RGB signals are applied to the LCD panel. Because the LCD closes more as the difference in potential between the VCOM (common polar voltage: fixed at DC) and the R, G and B signals becomes greater, the display becomes darker; if the difference in potential is smaller, the element opens and the LCD become brighter. In addition, the brightness and contrast settings for the LCD can be varied by means of the serial data from the ASIC.

– 6 –

1-3. CA3 CIRCUIT DESCRIPTION

1. Outline

This is the main CA3 power block, and is comprised of the following blocks. Switching controller (IC521) Analog system 5.0 V power output (L5201, Q5203, D5201, C5206) Backlight power output (L5101, Q5102, D5101, C5106)

2. Switching Controller (IC521)

This is the basic circuit which is necessary for controlling the power supply for a PWM-type switching regulator, and is provided with one built-in channel. Feedback from 5 V (A) power supply output is received, and the PWM duty is varied so that each one is maintained at the correct voltage setting level.

2-1. Short-circuit protection circuit

If output is short-circuited for the length of time determined by the condenser which is connected to Pin (2) of IC521, all output is turned off. The control signal (P ON, P(A) ON and LCD ON) are recontrolled to restore output.

3. Switching Controller (IC511)

This is the basic circuit which is necessary for controlling the power supply for a PWM-type switching regulator, and is provided with one built-in channel. Feedback from 10 mA (L) power supply output is received, and the PWM duty is varied so that each one is maintained at the correct current setting level.

4. Analog system 5.0 V Power Output

5 V (A) is output. Feedback is provided to the swiching controller (Pin (1) of IC521) so that PWM control can be carried out.

5. Backlight Power Output

10 mA (L) is output. The backlighting turns on when current flows in the direction from pin (1) to pin (2) of CN512. At this time, a feedback signal is sent from pin (2) of CN512 to pin (1) of IC511 so that PWM control is carried out to keep the current at a constant level (10 mA).

3-1. Protection circuit

If output is short-circuited for the length of time determined by the condenser which is connected to Pin (2) of IC511 the output is shorted out or the backlighting is open (there is no connection between CN512 and the backlight unit), output will turn off. all output is turned off. The control signal (P ON, P(A) ON and LCD ON) are recontrolled to restore output.

– 7 –

1-4. PW1 POWER CIRCUIT DESCRIPTION

1. Outline

This is the main PW1 power circuit, and is comprised of the following blocks. Switching controller (IC501) Digital and LCD system and 5.0 V system power output (L5010, Q5002, D5013, C5061, C5015) Digital 3.3 V system power supply (L5017, Q5009, D5007, C5062) Digital 3.4 V system power supply (L5001, Q5006, D5004, C5060) Analog and LCD system power supply (Q5007, T5001) Series regulator (IC502) Digital 2.5 V system power supply (Q5008, C5076, C5077)

2. Switching Controller (IC501)

This is the basic circuit which is necessary for controlling the power supply for a PWM-type switching regulator, and is provided with four built-in channels, only CH1 (digital 3.3 V), CH3 (5 V system), CH2 (digital 3.4 V) and CH4 (analog and LCD system) are used. Feedback from 3.3 V (D) (CH1), 3.4 V (D) (CH2) , 5.0 V (D) (CH3) and +15.0 V (A) or +12.4 V (L) (CH4) power supply outputs are received, and the PWM duty is varied so that each one is maintained at the correct voltage setting level.

3. Digital 3.3 V Power Output

3.3 V (D) is output. Feedback for the 3.3 V (D) is provided to the switching controller (Pins (1) of IC501) so that PWM control can be carried out.

4. Digital 3.4 V System Power Output

3.4 V (D) is output. Feedback is provided to the swiching controller (Pin (12) of IC501) so that PWM control can be carried out.

5. 5 V System Power Output

5 V (D) and 5 V (L) are output. Feedback for the 5 V (D) is provided to the switching controller (Pin (25) of IC501) so that PWM control can be carried out.

6. Analog and LCD System Power Output

15.0 V (A), -8.0 V (A), 12.4 V (L) and 15 V (L) are output. Feedback for the 15.0 V (A) with view mode and 12.4 V (L) with play mode is provided to the switching controller (Pin (36) of IC501) so that PWM control can be carried out.

7. Series Regulator (IC502)

This is provided with one built-in channel. Digital 3.4 V is input, and digital 2.5 V is output.

2-1. Short-circuit protection circuit

If output is short-circuited for the length of time determined by the condenser which is connected to Pin (17) of IC501, all output is turned off. The control signal (P ON, P(A) ON and LCD ON) are recontrolled to restore output.

8. Digital 2.5 V System Power Output

2.5 V (D) is output. Feedback for the 2.5 V (D) is provided to the Pin (7) of IC502. The current of Q5008 base is controled so that the voltage of Q5008 collector is 2.5 V.

– 8 –

1-5. PW1 STROBE CIRCUIT DESCRIPTION

1. Charging Circuit

When UNREG power is supplied to the charge circuit and the CHG signal becomes High (3.3 V), the charging circuit starts operating and the main electorolytic capacitor is charged with high-voltage direct current. However, when the CHG signal is Low (0 V), the charging circuit does not operate.

1-1. Power switch

When the CHG signal switches to Hi, Q5406 turns ON and the charging circuit starts operating.

1-2. Power supply filter

L5401 and C5401 constitute the power supply filter. They smooth out ripples in the current which accompany the switching of the oscillation transformer.

1-3. Oscillation circuit

This circuit generates an AC voltage (pulse) in order to increase the UNREG power supply voltage when drops in current occur. This circuit generates a drive pulse with a frequency of approximately 50-100 kHz. Because self-excited light omission is used, the oscillation frequency changes according to the drive conditions.

2. Light Emission Circuit

When RDY and TRIG signals are input from the ASIC expansion port, the stroboscope emits light.

2-1. Emission control circuit

When the RDY signal is input to the emission control circuit, Q5409 switches on and preparation is made to let current flow to the light emitting element. Moreover, when a STOP signal is input, the stroboscope stops emitting light.

2-2. Trigger circuit

When a TRIG signal is input to the trigger circuit, D5405 switches on, a high-voltage pulse of several kilovolts is generated inside the trigger circuit, and this pulse is then applied to the light emitting part.

2-3. Light emitting element

When the high-voltage pulse form the trigger circuit is applied to the light emitting part, currnet flows to the light emitting element and light is emitted.

※ Beware of electric shocks.

1-4. Oscillation transformer

The low-voltage alternating current which is generated by the oscillation control circuit is converted to a high-voltage alternating current by the oscillation transformer.

1-5. Rectifier circuit

The high-voltage alternating current which is generated at the secondary side of T5401 is rectified to produce a highvoltage direct current and is accumulated at electrolytic capacitor C5412 on the main circuit board.

1-6. Voltage monitoring circuit

This circuit is used to maintain the voltage accumulated at C5412 at a constance level. After the charging voltage is divided and converted to a lower voltage by R5417 and R5419, it is output to the SY1 circuit board as the monitoring voltage VMONIT. When this VMONIT voltage reaches a specified level at the SY1 circuit board, the CHG signal is switched to Low and charging is interrupted.

– 9 –

1-6. SY1 CIRCUIT DESCRIPTION

1. Configuration and Functions

For the overall configuration of the SY1 circuit board, refer to the block diagram. The configuration of the SY1 circuit board centers around a 8-bit microprocessor (IC301). The 8-bit microprocessor handles the following functions.

1. Operation key input, 2. Mode LCD display, 3. Clock control, 4. Power ON/OFF, 5. Storobe charge control

2~7

9 10 11

14~19

20 21 22

23~30

32~69

70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86

87 88~90 91~93

96 97 98 99

100

Signal

CHG VOL

SCAN IN

AVDD -

VREF STBY (R) LED STBY (G) LED

VSS

SELF LED NOT USED AVREF ON

BUZZER

CHG ON

NOT USED

VSS

NOT USED

P (A) ON

P ON

DIN CONNECT

CARD

AV JACK

SCK

XOUT

XIN

VDD

XCIN

XCOUT

RESET

BAT OFF

RXD

S. REQ

NOT USED

SCAN OUT0~2

WAKE UP

LCD ON ASIC TEST 0 ASIC RESET ASIC TEST 2

AVSS

BATTERY

I/O

O O

O O O O

Outline I I

I I I I

Strobe charge voltage input (analog input) Key matrix input

A/D converter analog power terminal

A/D converter standard voltage input terminal Standby LED (red) ON/OFF signal L : LED light Standby LED (green) ON/OFF signal L : LED light GND Self-timer LED ON/OFF signal L : LED light

A/D standard power ON/OFF signal L : ON Buzzer output Flash charge ON/OFF signal H : ON

GND

DC/DC converter (analog) ON/OFF signal H : ON DC/DC converter (digital) ON/OFF signal H : ON DIN jack connect detection signal H : Connection Memory card attachment detection signal L : Attachment AV output cable connection detection signal H : Connection Serial communication data input (←ASIC) Serial communication data output (→ASIC) Serial communication clock output (→ASIC) Connect to GND Main clock oscillation terminal Main clock oscillation terminal (4 MHz) VDD Sub clock oscillation terminal Sub clock oscillation terminal (32.768 kHz) Reset input Battery OFF detection signal L : OFF RS-232C RXD input terminal Serial communication request signal L : Request

Key matrix output Wake up signal H : WAKE UP LCD monitor power ON/OFF signal H : ON ASIC reset control signal

ASIC reset signal L : Reset output

ASIC reset control signal L : Reset control

Analog GND

Battery voltage input (analog input)

Table 4-1. 8-bit Microprocessor Port Specification

– 10 –

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