SANYO VPC-S6GX, VPC-S6U, VPC-S6 WARNING

WARNING
Do not use solder containing lead.
This product has been manufactured using lead-free solder in order to help preserve the environment. Because of this, be sure to use lead-free solder when carrying out repair work, and never use solder containing lead.
Lead-free solder has a melting point that is 30 - 40°C (86 ­104°F) higher than solder containing lead, and moreover it does not contain lead which attaches easily to other metals. As a result, it does not melt as easily as solder containing lead, and soldering will be more difficult even if the temperature of the soldering iron is increased. The extra difficulty in soldering means that soldering time will increase and damage to the components or the circuit board may easily occur. Because of this, you should use a soldering iron and solder that satisfy the following conditions when carrying out repair work.
Soldering iron
Use a soldering iron which is 70 W or equivalent, and which lets you adjust the tip temperature up to 450°C (842°F). It should also have as good temperature recovery characteris­tics as possible. Set the temperature to 350°C (662°F) or less for chip compo­nents, to 380°C (716°F) for lead wires and similar, and to 420°C (788°F) when installing and removing shield plates. The tip of the soldering iron should have a C-cut shape or a driver shape so that it can contact the circuit board as flat or in a line as much as possible.
Note:
If replacing existing solder containing lead with lead-free sol­der in the soldered parts of products that have been manufac­tured up until now, remove all of the existing solder at those parts before applying the lead-free solder.
Solder
Use solder with the metal content and composition ratio by weight given in the table below. Do not use solders which do not meet these conditions.
Metal content
Composition ratio by weight
Lead-free solder is available for purchase as a service tool. Use the following part number when ordering:
Part name: Lead-free solder with resin (0.5 mm dia., 500 g) Part number: VJ8-0270
Tin (Sn) Silver (Ag)
96.5 %
3.0 %
Copper (Cu)
0.5 %
– 2 –

1. OUTLINE OF CIRCUIT DESCRIPTION

1-1. CCD CIRCUIT DESCRIPTION
1. IC Configuration
The CCD peripheral circuit block basically consists of the fol­lowing ICs. IC903 (MN39830PMJAA) CCD imager IC901 (AN20112A) V driver IC905 (AD9948AKCP) CDS, AGC, A/D converter,
H driver
V
12
Pin 13
Pin 1
5
6
H
58
2. IC903 (CCD)
[Structure]
Interline type CCD image sensor
Optical size 1/2.5 type format Effective pixels 2864 (H) X 2160 (V) Pixels in total 2934 (H) X 2171 (V) Optical black
Horizontal (H) direction: Front 12 pixels, Rear 58 pixels Vertical (V) direction: Front 6 pixels, Rear 5 pixels
Dummy bit number Horizontal : 28 Vertical :7
Pin No.
Symbol Pin Description
Fig. 1-1.Optical Black Location (Top View)
Photo diode
10
VDD
VO
GND
13 14
15
Vertical shift register
Output part
Horizontal shift register
16
RG
ø
20
21
22
H2
H1
HL
ø
ø
ø
11 12 23 24 17 18 19
Fig. 1-2. CCD Block Diagram
Waveform
Voltag e
ø
1
ø
2
ø
3
ø
4
ø
5
ø
6
ø
7
ø
8 9
ø ø ø
GND
ø
ø
PT
SUBSW
ø
V6 V5B V5A V4
V3B V3A V3L V3R
V2 V1 V1S
V5R
V5L
Vsub
1, 23, 24
2, 3
4, 7, 8, 9, 11
5, 6, 10
14
13
16
12, 15
17
18
19
20, 21
22
6, V5R , V5L
V
V
5B, V5A Vertical register transfer clock
V4, V3L, V3R,
V2, V1S
V
3B, V3A, V1
VO
VDD
ØRG
GND
PT
Vertical register transfer clock
Vertical register transfer clock
Vertical register transfer clock
Signal output
Circuit power
Reset gate clock
GND Protection transister bias
Substrate controlSUB SW
SUB
L, H1
H
H
Substrate clock
Horizontal register transfer clock
Horizontal register transfer clock
2
Table 1-1. CCD Pin Description
-6.0 V, 0 V
-6.0 V, 0 V, 12 V
-6.0 V, 0 V
-6.0 V, 0 V, 12 V
DC
DC
Aprox. 12 V
12 V
4.5 V, 7.8 V
GND 0 V
DC
-6.0 V
0, 3.3 V (When importing all picture element: 3.3 V)
DC
Aprox. 6 V (Different from every CCD)
0 V, 3.3 V
0 V, 3.3 V
When sensor read-out
– 3 –
3. Part of IC905 (H Driver) and IC901 (V Driver)
An H driver (part of IC905) and V driver (IC901) are neces­sary in order to generate the clocks (vertical transfer clock, horizontal transfer clock and electronic shutter clock) which driver the CCD. IC905 has the generation of horizontal transfer clock and the function of H driver, and is an inverter IC which drives the horizontal CCDs (H1 and H2). In addition the XV1-XV6 sig­nals which are output from IC101 are vertical transfer clocks, and the XSG signal is superimposed onto XV1, XV3 and XV5 at IC901 in order to generate a ternary pulse. In addition, the XSUB signal which is output from IC101 is used as the sweep pulse for the electronic shutter, and the RG signal which is output from IC905 is the reset gate clock.
VMSUB
9
3-level
OSUB
VM
OV1
RESET
SUBCNT
VDC
CH1
V5R
V5L
V3R
V3L
V1S
10
VL
5
VL
27
2-level
24OV2
2-level
23OV4
2-level
21OV6
8
3-level
20
28
Level
1
conversion
3
Level
32
conversion
Level
V1
33
conversion
Level
31
V6
conversion
Level
V4
30
conversion
Level
29
V2
conversion
Level
37
conversion
Level
38
conversion
Level
35
conversion
Level
36
conversion
Level
34
conversion
2-level
2-level
2-level
2-level
2-level
3-level
3-level
3-level
3-level
Level
conversion
Level
conversion
Level
conversion
Level
conversion
Level
conversion
Level
conversion
Level
conversion
7
VHH
16
OV5R
15
OV5L
18
OV3R
17
OV3L
19
OV1S
25
VM
12
OV5A
11
OV5B
14
OV3A
13
OV3B
6
VH
26
VH
4
GND
41
CH2
40
V3
39
CH4
44
CH3
43
V5
42
CH5
2
SUB
4. IC905 (H Driver, CDS, AGC and A/D converter)
IC905 contains the functions of H driver, CDS, AGC and A/D converter. As horizontal clock driver for CCD image sensor, HØ1 (A and B) and HØ2 (A and B) are generated inside, and output to CCD. The video signal which is output from the CCD is input to pins (27) of IC905. There are sampling hold blocks generated from the SHP and SHD pulses, and it is here that CDS (correlated double sampling) is carried out. After passing through the CDS circuit, the signal passes through the AGC amplifier (VGA: Variable Gain Amplifier). It is A/D converted internally into a 10-bit signal, and is then input to ASIC (IC101). The gain of the VGA amplifier is con­trolled by pin (31)-(33) serial signal which is output from ASIC (IC101).
REFB
REFT
VREF
ADC
INTERNAL
REGISTERS
SL
SCK
10
SDATA
DOUT
HBLK
CLP/PBLK
CLI
10-BIT
CLAMP
VD
CCDIN
RG
H1-H4
6~42 dB
0~18 dB
VGA
PxGA
CDS
INTERNAL
CLOCKS
HORIZONTAL
4
DRIVERS
AD9948
PRECISION
TIMING
CORE
SYNC
GENERATOR
HD
Fig. 1-4. IC905 Block Diagram
Fig. 1-3. IC901 Block Diagram
4
1-2. CP1 CIRCUIT DESCRIPTION
1. Circuit Description 1-1. Digital clamp
The optical black section of the CCD extracts averaged val­ues from the subsequent data to make the black level of the CCD output data uniform for each line. The optical black sec­tion of the CCD averaged value for each line is taken as the sum of the value for the previous line multiplied by the coeffi­cient k and the value for the current line multiplied by the coefficient (k-1).
1-2. Signal processor
1. γ correction circuit
This circuit performs (gamma) correction in order to maintain a linear relationship between the light input to the camera and the light output from the picture screen.
2. Color generation circuit
This circuit converts the CCD data into RGB signals.
3. Matrix circuit
This circuit generates the Y signals, R-Y signals and B-Y sig­nals from the RGB signals.
2. Outline of Operation
When the shutter opens, the reset signals and the serial sig­nals (“take a picture” commands) from the 8-bit microproces­sor are input to ASIC (IC101) and operation starts. When the TG/SG drives the CCD, picture data passes through the A/D and CDS, and is then input to the ASIC as 12-bit data. The AF, AE, AWB, shutter, and AGC value are computed from this data, and three exposures are made to obtain the optimum picture. The data which has already been stored in the SDRAM is read by the CPU and color generation is carried out. Each pixel is interpolated from the surrounding data as being ei­ther R, G and B primary color data to produce R, G and B data. At this time, correction of the lens distortion which is a characteristic of wide-angle lenses is carried out. After AWB and γ processing are carried out, a matrix is generated and aperture correction is carried out for the Y signal, and the data is then compressed by the JPEG method by (JPEG) and is then written to card memory (SD card). When the data is to be output to an external device, it is taken data from the memory and output via the USB. When played back on the LCD and monitor, data is transferred from memery to the SDRAM, and the data elongated by JPEG decorder is displayed over the SDRAM display area.
4. Horizontal and vertical aperture circuit
This circuit is used gemerate the aperture signal.
1-3. AE/AWB and AF computing circuit
The AE/AWB carries out computation based on a 256-seg­ment screen, and the AF carries out computations based on a 11-segment screen.
1-4. SDRAM controller
This circuit outputs address, RAS, CAS and AS data for con­trolling the SDRAM. It also refreshes the SDRAM.
1-5. Communication control
1. SIO
This is the interface for the 8-bit microprocessor.
2. PIO/PWM/SIO for LCD
8-bit parallel input and output makes it possible to switch be­tween individual input/output and PWM input/output. It is pre­pared for 16-bit parallel output.
1-6. TG/SG
Timing generated for 6 million pixel CCD control.
1-7. Digital encorder
It generates chroma signal from color difference signal.
1-8. JPEG encorder and decorder
It is compressed and elongated the data by JPEG system.
3. LCD Block
LCD block is in the CP1 board, and it is constructed by VCOM generation circuit etc. The video signal from the ASIC are 8­bit digital signal, and input to LCD directly. It is converted into RGB signals at driver circuit in the LCD. The VCOM (common polar voltage: AC) and the R, G and B signals becomes greater, the display becomes darker; if the difference in potential is smaller, the element opens and the LCD become brighter. And also the timing pulse except the video signal is input to LCD directly from ASIC.
4. Lens drive block
4-1. Shutter drive
The shutter drive signal (SIN1 and SIN2) which is output from the ASIC is drived the shutter constant level driver (IC951), and then shutter is opened and closed.
4-2. Iris drive
The iris stepping motor drive signals (IIN1 and IIN2) which are output from the ASIC (IC101) are used to drive by the motor driver (IC951).
4-3. Focus drive
The focus stepping motor drive signals (FIN1, FIN2, FIN3 and FIN4) which are output from the ASIC (IC101) are used to drive by the motor driver (IC951). Detection of the standard focusing positions is carried out by means of the photointerruptor (AFPI) inside the lens block.
4-4. Zoom drive
The zoom DC motor drive signals (ZIN1 and ZIN2) which are output from the ASIC (IC101) are used to drive by the motor driver (IC951). Detection of the zoom positions is carried out by means of photoreflector (ZMPI) inside the lens block.
– 5 –
1-3. PWA POWER CIRCUIT DESCRIPTION
1. Outline
This is the main power circuit, and is comprised of the follow­ing blocks. Switching controller (IC501) Analog system power output (L5001, Q5001) 5 V power output (L5014, Q5008) Digital 3.25 V power output (L5006) Digital 1.2 V power output (L5007) LCD 15 V system power output (L5005, Q5004) Backlight power output (L5008, Q5009) Motor system power output (IC531, L5301, Q5301)
2. Switching Controller (IC501)
This is the basic circuit which is necessary for controlling the power supply for a PWM-type switching regulator, and is pro­vided with seven built-in channels, only CH1 (digital system
1.2 V), CH2 (digital 3.25 V), CH4 (LCD 15 V system), CH5 (analog system), CH6 (backlight system) and CH7 (5 V sys­tem) are used. Feedback from digital system 1.2 V (D) (CH1),
3.25 V (D) (CH2), LCD 15 V system (CH4), analog system (CH5), backlight system (CH6) and 5 V system (CH7) power supply outputs are received, and the PWM duty is varied so that each one is maintained at the correct voltage setting level. Feedback for the backlight power (CH6) is provided to the both ends voltage of registance so that regular current can be controlled to be current that was setting.
2-1. Short-circuit protection circuit
If output is short-circuited for the length of time determined by internal fixing of IC501 , all output is turned off. The control signal (P ON) are recontrolled to restore output.
3. Analog System Power Output
+12 V (A), +3.45 V (A) and -6.0 V (A) are output. Feedback for the +12 V (A) is provided to the switching controller (Pin (4) of IC501) so that PWM control can be carried out.
4. Digital 3.25 V Power Output
VDD3 is output. Feedback for the VDD3 is provided to the swiching controller (Pin (54) of IC501) so that PWM control can be carried out.
5. Digital 1.2 V Power Output
VDD1.2 is output. Feedback for the VDD1.2 is provided to the switching controller (Pin (52) of IC501) so that PWM control to be carried out.
6. 5 V System Power Output
5 V is output. Feedback for the 5 V output is provided to the switching controller (Pin (9) of IC501) so that PWM control to be carried out.
7. LCD System Power Output
+15 V (L) is output. Feedback for the +15 V (L) is provided to the switching controller (Pin (2) of IC501) so that PWM con­trol to be carried out.
8. Backlight Power Output
Regular current is being transmitted to LED for LCD back­light. Feedback for the both ends voltage of registance that is being positioned to in series LED are provided to the switch­ing controller (Pin (6) of IC501) so that PWM control to be carried out.
9. Motor System Power Output
3.6 V is output. Feedback for the 3.6 V output is sent to pin (1) of IC531 for PWM control to be carried out.
– 6 –
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