SANYO VPC-MZ1EX, VPC-MZ1E, VPC-MZ1 SERVICE MANUAL
SERVICE MANUAL
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FILE NO.
Color Digital Camera
Contents
1. OUTLINE OF CIRCUIT DESCRIPTION ....................2
2. DISASSEMBLY........................................................12
3. ELECTRICAL ADJUSTMENT..................................15
4. USB STORAGE INFORMATION
REGISTRATION ......................................................21
5. TROUBLESHOOTING GUIDE.................................22
6. PARTS LIST.............................................................23
CABINET AND CHASSIS PARTS 1 ........................23
CABINET AND CHASSIS PARTS 2 ........................24
ELECTRICAL PARTS .............................................. 25
ACCESSORIES AND PACKING MATERIALS ........ 32
CIRCUIT DIAGRAM (Refer to the separate volume)
VPC-MZ1E
(Product Code : 126 287 01)
(U.K.)
VPC-MZ1EX
(Product Code : 126 287 02)
(Europe)
(PAL General)
VPC-MZ1
(Product Code : 126 287 03)
(U.S.A.)
(Canada)
PRODUCT SAFETY NOTICE
The components designated by a symbol ( ! ) in this schematic diagram designates components whose value are of
special significance to product safety. Should any component designated by a symbol need to be replaced, use only the part
designated in the Parts List. Do not deviate from the resistance, wattage, and voltage ratings shown.
CAUTION : Danger of explosion if battery is incorrectly replaced.
Replace only with the same or equivalent type recommended by the manufacturer.
Discard used batteries according to the manufacturer’s instructions.
NOTE : 1. Parts order must contain model number, part number, and description.
2. Substitute parts may be supplied as the service parts.
3. N. S. P. : Not available as service parts.
Design and specification are subject to change without notice.
SX212/E, EX, U
REFERENCE No. SM5310304
1. OUTLINE OF CIRCUIT DESCRIPTION
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1-1. CA1 and A PART OF CA2 CIRCUIT
DESCRIPTIONS
Around CCD block
1. IC Configuration
CA1 board
IC903 (ICX274AQ) CCD imager
IC901, IC902 (CXD3400N) V driver
CA2 board
IC911 (H driver, CDS, AGC and A/D converter)
2. IC903 (CCD imager)
[Structure]
Interline type CCD image sensor
Image size Diagonal 8.293 mm (1/1.8 type)
Pixels in total 1688 (H) x 1248 (V)
Recording pixels 1600 (H) x 1200 (V)
10
11
OUT
V
DD
V
GND
7
6
5
B
G
R
G
G
B
R
G
G
B
R
Vertical register
G
B
G
R
G
Horizontal register
15
16
GND
(Note) : Photo sensor
12
8
9
13
14
Fig. 1-1. CCD Block Diagram
17
3
4
G
R
G
R
G
R
G
R
18
L
V
SUB
C
1
2
B
G
B
G
B
G
B
G
(Note)
20
19
Pin No.
1
2
3
4
5
6
7
8
9
10
Symbol
4
Vø
Vø3A
Vø3B
Vø3C
Vø2A
Vø2B
Vø2C
Vø1
GND
V
OUT
Vertical register transfer clock
Vertical register transfer clock
Vertical register transfer clock
Vertical register transfer clock
Vertical register transfer clock
Vertical register transfer clock
Vertical register transfer clock
Vertical register transfer clock
GND
Signal output
Pin Description
Table 1-1. CCD Pin Description
3. IC901, IC902 (V Driver) and IC911 (H Driver)
An H driver and V driver are necessary in order to generate
the clocks (vertical transfer clock, horizontal transfer clock
and electronic shutter clock) which driver the CCD.
IC901 and IC902 are V driver. In addition the XV1-XV4 signals which are output from IC102 are the vertical transfer
clocks, and the XSG signal which is output from IC102 is superimposed onto XV2 and XV3 at IC901 and IC902 in order
to generate a ternary pulse. In addition, the XSUB signal which
is output from IC102 is used as the sweep pulse for the electronic shutter. A H driver is inside IC911, and H1A, H1B, H2A,
H2B and RG clock are generated at IC911.
Pin No.
11
12
13
14
15
16
17
18
19
20
Symbol
V
DD
øRG
Hø
2B
Hø1B
GND
øSUB
SUB
C
V
L
Hø1A
Hø2A
Pin Description
Circuit power
Reset gate clock
Horizontal register transfer clock
Horizontal register transfer clock
GND
Substrate clock
Substrate bias
Protection transistor bias
Horizontal register transfer clock
Horizontal register transfer clock
– 2 –
4. IC911 (CDS, AGC Circuit and A/D Converter)
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The video signal which is output from the CCD is input to Pin
(29) of IC91 1. There are inside the sampling hold block, AGC
block and A/D converter block.
The setting of sampling phase and AGC amplifier is carried
out by serial data at Pin (37) of IC911. The video signal is
carried out A/D converter, and is output by 12-bit.
VRB
VRT
VREF
CCDIN
CDS
PxGA
2~36 dB
VGA
ADC
12
DOUT
5. Lens drive block
5-1. Iris and shutter drive
When the drive signals (IRSTB, ICW, IOEB and ICLK) which
are output from the ASIC, the stepping motor is sine-wave
driven by the micro-step motor driver (IC952), and are then
used to drive the iris steps and open/close the shutter.
5-2. Focus drive
When the drive signals (FRSTB, FCW, FOEB and FCLK) which
are output from the ASIC, the focus stepping motor is sinewave driven by the micro-step motor driver (IC951). Detection
of the standard focusing positions is carried out by means of
the photointerruptor (FOCUS PI) inside the lens block.
RG
H1-H4
HORIZONTAL
4
DRIVERS
CLAMP
INTERNAL
CLOCKS
PRECISION
TIMING
CORE
SYNC
GENERATOR
VD
HD
Fig. 1-2. IC911 Block Diagram
CLAMP
INTERNAL
REGISTERS
SL
SCK
SDATA
CLPOB
CLPDM
PBLK
CLI
5-3. Iris drive
The zoom stepping motor drive signals (ZIN1, ZIN2, ZIN3 and
ZIN4) which are output from the ASIC are used to drive by the
motor driver (IC953). Detection of the zoom positions is carried out by means of photointerruptor (ZOOM PI) inside the
lens block.
– 3 –
1-2. CA2 CIRCUIT DESCRIPTION
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1. Circuit Description
1-1. Scannning converter (Interlace converter)
This circuit uses the function of a 128-Mbit SDRAMs to convert the non-interlaced signal which is output from the CCD
into an interlaced signal for the video monitor.
1-2. Camera signal processor
This comprises circuits such as the digial clamp circuit, white
balance circuit, γ circuit, color signal generation circuit, matrix circuit and horizontal aperture circuit.
1. Digital clamp circuit
The optical black section of the CCD extracts 16-pixel averaged values from the subsequent data to make the black level
of the CCD output data uniform for each line. The 16-pixel
averaged value for each line is taken as the sum of the value
for the previous line multiplied by the coefficient k and the
value for the current line multiplied by the coefficient 1-k.
2. White balance circuit
This circuit controls the white balance by using the A WB judgement value computed by the CPU to control the gain for each
R, G and B pixel based on the CCD data which has been
read.
3. γ circuit
This circuit performs (gamma) correction in order to maintain
a linear relationship between the light input to the camera
and the light output from the picture screen.
4. Color generation circuit
This circuit converts the CCD data into RGB signals.
1-8. 8-bit D/A circuit (Audio)
This circuit converts the audio signals (analog signals) from
the microphone to 8-bit digital signals.
1-9. 8-bit A/D circuit (Audio)
The audio signals which were converted to digial form by the
8-bit A/D circuit are temporarily to a sound buffer and then
recorded in the SSFDC card. During playback, the 8-bit D/A
circuit converts these signals into analog audio signals.
1-10. Sound buffer
Audio memory
1-11. LCD driver
The Y/C signals which are input to the LCD driver are converted to RGB signals, and the timing signal which is necessary for LCD monitor display and the RGB signals are then
supplied to the LCD monitor.
1-12. LCD monitor
This is the image display device which displays the image
signals supplied from the LCD driver.
1-13. Memory card control
This reads data from the memory card and stores it in SDRAM,
and writes out the image data stored in SDRAM. In addition,
error correction is carried out when the data is read.
1-14. MJPEG compression
Still and continuous frame data is converted to JPEG format,
and movie images are compressed and expanded in MJPEG
format.
5. Matrix circuit
This circuit generates the Y signals, R-Y signals and B-Y signals from the RGB signals.
6. Horizontal aperture circuit
This circuit is used generate the aperture signal.
1-3. SDRAM controller
This circuit outputs address, RAS, CAS and AS data for controlling the SDRAM. It also refreshes the SDRAM.
1-4. PIO
The expansion parallel port can be used for functions such
as stroboscope control and LCD driver control.
1-5. SIO (Serial control)
This is the interface for the 4-bit microprocessor.
1-6. USB control
This is comunicated PC with 12 Mbps.
1-7. TG, SG block
This is the timing generation circuit which generates the clocks
(vertical transfer clock and electronic shutter clock) which drive
the CCD.
2. Outline of Operation
When the shutter opens, the reset signals, TEST0, TEST1
and the serial signals (“take a picture” commands) from the
8-bit microprocessor are input and record operation starts.
When the TG drives the CCD, picture data passes through
the A/D and is then input to the ASIC as 10-bit data. This data
then passes through the DCLP, AWB, shutter and γ circuit,
after which it is input to the SDRAM. The AWB, shutter, γ, and
AGC value are computed from this data, and two exposures
are made to obtain the optimum picture. The data which has
already been stored in the SDRAM is read by the CPU and
color generation is carried out. Each pixel is interpolated from
the surrounding data as being either R, G or B primary color
data to produce R, G and B data. At this time, correction of
the lens distortion which is a characteristic of wide-angle
lenses is carried out. Aperture correction is carried out, and
in case of still picture the data is then compressed by the
JPEG method and in case of picture it is compressed by
MJPEG method and is written to compact flash card. When
the data is to be output to an external device, it is read JPEG
picture data from the compact flash card and output to PC via
the USB.
– 4 –
3. LCD Block
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During EE, gamma conversion is carried out for the 10-bit
RGB data which is input from the A/D conversion block of the
CCD to the ASIC in order that the γ revised can be displayed
on the video. The YUV of 640 x 480 is then transferred to the
SVRAM.
The data which has accumulated in the SDRAM is after D/A
conversion is carried out by SDRAM control circuit inside the
ASIC, makes Y/C signal, the data is sent to the LCD panel
and displayed.
If the shutter button is pressed in this condition, the 10-bit
data which is output from the A/D conversion block of the
CCD is sent to the SDRAM (DMA transfer), and is displayed
on the LCD as a freeze-frame image.
During playback, the JPEG image data which has accumulated in the compact flash card is converted to RGB signals.
In the same way as for EE, the data is then sent to the SDRAM,
after which D/A conversion is carried out inside the ASIC,
and then the data is sent to the LCD panel and displayed.
The LCD driver is converted Y/C signals to RGB signals from
ASIC, and these RGB signals and the control signal which is
output by the LCD driver are used to drive the LCD panel.
The RGB signals are 1H transposed so that no DC component is present in the LCD element, and the two horizontal
shift register clocks drive the horizontal shift registers inside
the LCD panel so that the 1H transposed RGB signals are
applied to the LCD panel.
Because the LCD closes more as the difference in potential
between the VCOM (common polar voltage: fixed at DC) and
the R, G and B signals becomes greater, the display becomes
darker; if the difference in potential is smaller, the element
opens and the LCD become brighter. In addition, the brightness and contrast settings for the LCD can be varied by means
of the serial data from the ASIC.
– 5 –
1-3. CA3 CIRCUIT DESCRIPTION
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1. Outline
This is the main CA3 power block, and is comprised of the
following blocks.
Switching controller (IC511)
Lens system 3.4 V power output (L5101, Q5102, D5101,
C5114)
Backlight power output (L5103, Q5106, C5121)
Analog and LCD system power output (Q5112, T5101)
2. Switching Controller (IC511)
This is the basic circuit which is necessary for controlling the
power supply for a PWM-type switching regulator, and is provided with four built-in channels. They are CH1 (lens system
3.4 V), CH2 (backlight) and CH4 (analog and LCD system).
CH3 is not used. Feedback from 3.4 V (D) C (CH1), +15.0 V
(A) or +12.4 V (L) power supply output are received, and the
PWM duty is varied so that each one is maintained at the
correct voltage setting level. CH2 is feedback from 10 mA
power supply output are received, and the PWM duty is varied so that each one is maintained at the correct voltage setting level.
2-1. Short-circuit protection circuit
If output is short-circuited for the length of time determined
by the condenser which is connected to Pin (33) of IC51 1, all
output is turned off. The control signal (P(A) ON and LCD
ON) are recontrolled to restore output.
3. Lens system 3.4 V Power Output
3.4 V (D) C is output for lens. Feedback is provided to the
swiching controller (Pin (1) of IC511) so that PWM control
can be carried out.
4. Backlight Power Output
10 mA (L) is output. The backlighting turns on when current
flows in the direction from pin (1) to pin (2) of CN531. At this
time, a feedback signal is sent from pin (2) of CN531 to pin
(12) of IC511 through R5137 so that PWM control is carried
out to keep the current at a constant level (10 mA).
5. Analog and LCD System Power Output
15.0 V (A), –7.7 V (A), 12.4 V (L) and 15 V (L) are output.
Feedback for the 15.0 V (A) with view mode and 12.4 V (L)
with play mode is provided to the switching controller (Pin
(36) of IC511) so that PWM control can be carried out.
– 6 –
1-4. PW1 POWER CIRCUIT DESCRIPTION
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1. Outline
This is the main PW1 power circuit, and is comprised of the
following blocks.
Switching controller (IC501)
Digital and LCD system and 5.0 V system power output
(L5005, Q5015, D5005, C5036, C5037)
Digital 3.3 V system power supply (L5002, Q5003, D5002,
C5018)
Digital 3.4 V system power supply (L5003, Q5009, D5004,
C5029)
Series regulator (IC502)
Digital 2.5 V system power supply (Q5007, C5025, C5026)
Analog system 5 V power supply (L5008, Q5020, D5006,
C5045)
2. Switching Controller (IC501)
This is the basic circuit which is necessary for controlling the
power supply for a PWM-type switching regulator, and is provided with four built-in channels, only CH1 (digital 3.3 V), CH3
(5 V system), CH2 (digital 3.4 V) and CH4 (analog system 5
V) are used. Feedback from 3.3 V (D) (CH1), 3.4 V (D) (CH2),
5 V (D) (CH3) and 5.0 V (A) power supply outputs are received, and the PWM duty is varied so that each one is maintained at the correct voltage setting level.
2-1. Short-circuit protection circuit
If output is short-circuited for the length of time determined
by the condenser which is connected to Pin (33) of IC501, all
output is turned off. The control signal (P ON, P(A) ON and
LCD ON) are recontrolled to restore output.
3. Digital 3.3 V Power Output
3.3 V (D) is output. Feedback for the 3.3 V (D) is provided to
the switching controller (Pins (1) of IC501) so that PWM control can be carried out.
4. Digital 3.4 V System Power Output
3.4 V (D) is output. Feedback is provided to the swiching controller (Pin (12) of IC501) so that PWM control can be carried
out.
5. 5 V System Power Output
5 V (D) and 5 V (L) are output. Feedback for the 5 V (D) is
provided to the switching controller (Pin (25) of IC501) so
that PWM control can be carried out.
6. Series Regulator (IC502)
This is provided with one built-in channel. Digital 3.4 V is input, and digital 2.5 V is output.
7. Digital 2.5 V System Power Output
2.5 V (D) is output. Feedback for the 2.5 V (D) is provided to
the Pin (7) of IC502. The current of Q5008 base is controled
so that the voltage of Q5008 collector is 2.5 V.
8. Analog 5 V System Power Output
5 V (A) is output. Feedback is provided to the swiching controller (Pin (36) of IC501) so that PWM control can be carried
out.
– 7 –
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