SANYO VPC-MZ1EX, VPC-MZ1E, VPC-MZ1 CIRCUIT DESCRIPTION

Color Digital Camera

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VPC-MZ1E

VPC-MZ1EX

VPC-MZ1

INDEX

1. OUTLINE OF CIRCUIT DESCRIPTION
DISASSEMBLY
ELECTRICAL ADJUSTMENT
TROUBLE SHOOTING GUIDE

2. PARTS LIST
OVERALLWIRING

Click on this button found on the first page of each file

to return to this screen.

SERVICE MANUAL

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FILE NO.

Color Digital Camera

Contents

1. OUTLINE OF CIRCUIT DESCRIPTION ....................2

2. DISASSEMBLY........................................................12

3. ELECTRICAL ADJUSTMENT..................................15

4. USB STORAGE INFORMATION

REGISTRATION ......................................................21

5. TROUBLESHOOTING GUIDE.................................22

6. PARTS LIST.............................................................23

CABINET AND CHASSIS PARTS 1 ........................23

CABINET AND CHASSIS PARTS 2 ........................24

ELECTRICAL PARTS .............................................. 25

ACCESSORIES AND PACKING MATERIALS ........ 32

CIRCUIT DIAGRAM (Refer to the separate volume)

VPC-MZ1E

(Product Code : 126 287 01)
(U.K.)

VPC-MZ1EX

(Product Code : 126 287 02)
(Europe)
(PAL General)

VPC-MZ1

(Product Code : 126 287 03)
(U.S.A.)
(Canada)

PRODUCT SAFETY NOTICE

The components designated by a symbol ( ! ) in this schematic diagram designates components whose value are of
special significance to product safety. Should any component designated by a symbol need to be replaced, use only the part
designated in the Parts List. Do not deviate from the resistance, wattage, and voltage ratings shown.

CAUTION : Danger of explosion if battery is incorrectly replaced.

Replace only with the same or equivalent type recommended by the manufacturer.
Discard used batteries according to the manufacturer’s instructions.

NOTE : 1. Parts order must contain model number, part number, and description.

2. Substitute parts may be supplied as the service parts.

3. N. S. P. : Not available as service parts.

Design and specification are subject to change without notice.

SX212/E, EX, U

REFERENCE No. SM5310304

1. OUTLINE OF CIRCUIT DESCRIPTION

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1-1. CA1 and A PART OF CA2 CIRCUIT

DESCRIPTIONS
Around CCD block

1. IC Configuration

CA1 board

IC903 (ICX274AQ) CCD imager
IC901, IC902 (CXD3400N) V driver

CA2 board

IC911 (H driver, CDS, AGC and A/D converter)

2. IC903 (CCD imager)

[Structure]

Interline type CCD image sensor

Image size Diagonal 8.293 mm (1/1.8 type)
Pixels in total 1688 (H) x 1248 (V)
Recording pixels 1600 (H) x 1200 (V)

10

11

OUT

V

DD

V

GND

7

6

5

B

G

R

G

G

B

R

G

G

B

R

Vertical register

G
B

G

R

G

Horizontal register

15

16

GND

(Note) : Photo sensor

12

8

9

13

14

Fig. 1-1. CCD Block Diagram

17

3

4

G
R
G
R
G
R
G
R

18

L

V

SUB

C

1

2

B
G
B
G
B
G
B
G

(Note)

20

19

Pin No.

1
2
3
4
5
6
7
8
9

10

Symbol

4

Vø
Vø3A
Vø3B
Vø3C
Vø2A
Vø2B
Vø2C

Vø1
GND
V

OUT

Vertical register transfer clock
Vertical register transfer clock

Vertical register transfer clock
Vertical register transfer clock
Vertical register transfer clock
Vertical register transfer clock
Vertical register transfer clock
Vertical register transfer clock

GND
Signal output

Pin Description

Table 1-1. CCD Pin Description

3. IC901, IC902 (V Driver) and IC911 (H Driver)

An H driver and V driver are necessary in order to generate
the clocks (vertical transfer clock, horizontal transfer clock
and electronic shutter clock) which driver the CCD.
IC901 and IC902 are V driver. In addition the XV1-XV4 sig­nals which are output from IC102 are the vertical transfer
clocks, and the XSG signal which is output from IC102 is su­perimposed onto XV2 and XV3 at IC901 and IC902 in order
to generate a ternary pulse. In addition, the XSUB signal which
is output from IC102 is used as the sweep pulse for the elec­tronic shutter. A H driver is inside IC911, and H1A, H1B, H2A,
H2B and RG clock are generated at IC911.

Pin No.

11
12
13
14
15
16
17
18
19
20

Symbol

V

DD

øRG
Hø

2B

Hø1B
GND

øSUB

SUB

C

V

L

Hø1A
Hø2A

Pin Description

Circuit power
Reset gate clock

Horizontal register transfer clock
Horizontal register transfer clock
GND
Substrate clock
Substrate bias
Protection transistor bias

Horizontal register transfer clock
Horizontal register transfer clock

– 2 –

4. IC911 (CDS, AGC Circuit and A/D Converter)

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The video signal which is output from the CCD is input to Pin
(29) of IC91 1. There are inside the sampling hold block, AGC
block and A/D converter block.
The setting of sampling phase and AGC amplifier is carried
out by serial data at Pin (37) of IC911. The video signal is
carried out A/D converter, and is output by 12-bit.

VRB

VRT

VREF

CCDIN

CDS

PxGA

2~36 dB

VGA

ADC

12

DOUT

5. Lens drive block

5-1. Iris and shutter drive

When the drive signals (IRSTB, ICW, IOEB and ICLK) which
are output from the ASIC, the stepping motor is sine-wave
driven by the micro-step motor driver (IC952), and are then
used to drive the iris steps and open/close the shutter.

5-2. Focus drive

When the drive signals (FRSTB, FCW, FOEB and FCLK) which
are output from the ASIC, the focus stepping motor is sine­wave driven by the micro-step motor driver (IC951). Detection
of the standard focusing positions is carried out by means of
the photointerruptor (FOCUS PI) inside the lens block.

RG

H1-H4

HORIZONTAL

4

DRIVERS

CLAMP

INTERNAL

CLOCKS

PRECISION

TIMING

CORE

SYNC

GENERATOR

VD

HD

Fig. 1-2. IC911 Block Diagram

CLAMP

INTERNAL

REGISTERS

SL

SCK

SDATA

CLPOB
CLPDM
PBLK
CLI

5-3. Iris drive

The zoom stepping motor drive signals (ZIN1, ZIN2, ZIN3 and
ZIN4) which are output from the ASIC are used to drive by the
motor driver (IC953). Detection of the zoom positions is car­ried out by means of photointerruptor (ZOOM PI) inside the
lens block.

– 3 –

1-2. CA2 CIRCUIT DESCRIPTION

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1. Circuit Description
1-1. Scannning converter (Interlace converter)

This circuit uses the function of a 128-Mbit SDRAMs to con­vert the non-interlaced signal which is output from the CCD
into an interlaced signal for the video monitor.

1-2. Camera signal processor

This comprises circuits such as the digial clamp circuit, white
balance circuit, γ circuit, color signal generation circuit, ma­trix circuit and horizontal aperture circuit.

1. Digital clamp circuit

The optical black section of the CCD extracts 16-pixel aver­aged values from the subsequent data to make the black level
of the CCD output data uniform for each line. The 16-pixel
averaged value for each line is taken as the sum of the value
for the previous line multiplied by the coefficient k and the
value for the current line multiplied by the coefficient 1-k.

2. White balance circuit

This circuit controls the white balance by using the A WB judge­ment value computed by the CPU to control the gain for each
R, G and B pixel based on the CCD data which has been
read.

3. γ circuit
This circuit performs (gamma) correction in order to maintain
a linear relationship between the light input to the camera
and the light output from the picture screen.

4. Color generation circuit

This circuit converts the CCD data into RGB signals.

1-8. 8-bit D/A circuit (Audio)

This circuit converts the audio signals (analog signals) from
the microphone to 8-bit digital signals.

1-9. 8-bit A/D circuit (Audio)

The audio signals which were converted to digial form by the
8-bit A/D circuit are temporarily to a sound buffer and then
recorded in the SSFDC card. During playback, the 8-bit D/A
circuit converts these signals into analog audio signals.

1-10. Sound buffer

Audio memory

1-11. LCD driver

The Y/C signals which are input to the LCD driver are con­verted to RGB signals, and the timing signal which is neces­sary for LCD monitor display and the RGB signals are then
supplied to the LCD monitor.

1-12. LCD monitor

This is the image display device which displays the image
signals supplied from the LCD driver.

1-13. Memory card control

This reads data from the memory card and stores it in SDRAM,
and writes out the image data stored in SDRAM. In addition,
error correction is carried out when the data is read.

1-14. MJPEG compression

Still and continuous frame data is converted to JPEG format,
and movie images are compressed and expanded in MJPEG
format.

5. Matrix circuit

This circuit generates the Y signals, R-Y signals and B-Y sig­nals from the RGB signals.

6. Horizontal aperture circuit

This circuit is used generate the aperture signal.

1-3. SDRAM controller

This circuit outputs address, RAS, CAS and AS data for con­trolling the SDRAM. It also refreshes the SDRAM.

1-4. PIO

The expansion parallel port can be used for functions such
as stroboscope control and LCD driver control.

1-5. SIO (Serial control)

This is the interface for the 4-bit microprocessor.

1-6. USB control

This is comunicated PC with 12 Mbps.

1-7. TG, SG block

This is the timing generation circuit which generates the clocks
(vertical transfer clock and electronic shutter clock) which drive
the CCD.

2. Outline of Operation

When the shutter opens, the reset signals, TEST0, TEST1
and the serial signals (“take a picture” commands) from the
8-bit microprocessor are input and record operation starts.
When the TG drives the CCD, picture data passes through
the A/D and is then input to the ASIC as 10-bit data. This data
then passes through the DCLP, AWB, shutter and γ circuit,
after which it is input to the SDRAM. The AWB, shutter, γ, and
AGC value are computed from this data, and two exposures
are made to obtain the optimum picture. The data which has
already been stored in the SDRAM is read by the CPU and
color generation is carried out. Each pixel is interpolated from
the surrounding data as being either R, G or B primary color
data to produce R, G and B data. At this time, correction of
the lens distortion which is a characteristic of wide-angle
lenses is carried out. Aperture correction is carried out, and
in case of still picture the data is then compressed by the
JPEG method and in case of picture it is compressed by
MJPEG method and is written to compact flash card. When
the data is to be output to an external device, it is read JPEG
picture data from the compact flash card and output to PC via
the USB.

– 4 –

3. LCD Block

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During EE, gamma conversion is carried out for the 10-bit
RGB data which is input from the A/D conversion block of the
CCD to the ASIC in order that the γ revised can be displayed
on the video. The YUV of 640 x 480 is then transferred to the
SVRAM.
The data which has accumulated in the SDRAM is after D/A
conversion is carried out by SDRAM control circuit inside the
ASIC, makes Y/C signal, the data is sent to the LCD panel
and displayed.
If the shutter button is pressed in this condition, the 10-bit
data which is output from the A/D conversion block of the
CCD is sent to the SDRAM (DMA transfer), and is displayed
on the LCD as a freeze-frame image.
During playback, the JPEG image data which has accumu­lated in the compact flash card is converted to RGB signals.
In the same way as for EE, the data is then sent to the SDRAM,
after which D/A conversion is carried out inside the ASIC,
and then the data is sent to the LCD panel and displayed.
The LCD driver is converted Y/C signals to RGB signals from
ASIC, and these RGB signals and the control signal which is
output by the LCD driver are used to drive the LCD panel.
The RGB signals are 1H transposed so that no DC compo­nent is present in the LCD element, and the two horizontal
shift register clocks drive the horizontal shift registers inside
the LCD panel so that the 1H transposed RGB signals are
applied to the LCD panel.
Because the LCD closes more as the difference in potential
between the VCOM (common polar voltage: fixed at DC) and
the R, G and B signals becomes greater, the display becomes
darker; if the difference in potential is smaller, the element
opens and the LCD become brighter. In addition, the bright­ness and contrast settings for the LCD can be varied by means
of the serial data from the ASIC.

– 5 –

1-3. CA3 CIRCUIT DESCRIPTION

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1. Outline

This is the main CA3 power block, and is comprised of the
following blocks.
Switching controller (IC511)
Lens system 3.4 V power output (L5101, Q5102, D5101,
C5114)
Backlight power output (L5103, Q5106, C5121)
Analog and LCD system power output (Q5112, T5101)

2. Switching Controller (IC511)

This is the basic circuit which is necessary for controlling the
power supply for a PWM-type switching regulator, and is pro­vided with four built-in channels. They are CH1 (lens system

3.4 V), CH2 (backlight) and CH4 (analog and LCD system).
CH3 is not used. Feedback from 3.4 V (D) C (CH1), +15.0 V
(A) or +12.4 V (L) power supply output are received, and the
PWM duty is varied so that each one is maintained at the
correct voltage setting level. CH2 is feedback from 10 mA
power supply output are received, and the PWM duty is var­ied so that each one is maintained at the correct voltage set­ting level.

2-1. Short-circuit protection circuit

If output is short-circuited for the length of time determined
by the condenser which is connected to Pin (33) of IC51 1, all
output is turned off. The control signal (P(A) ON and LCD
ON) are recontrolled to restore output.

3. Lens system 3.4 V Power Output

3.4 V (D) C is output for lens. Feedback is provided to the
swiching controller (Pin (1) of IC511) so that PWM control
can be carried out.

4. Backlight Power Output

10 mA (L) is output. The backlighting turns on when current
flows in the direction from pin (1) to pin (2) of CN531. At this
time, a feedback signal is sent from pin (2) of CN531 to pin
(12) of IC511 through R5137 so that PWM control is carried
out to keep the current at a constant level (10 mA).

5. Analog and LCD System Power Output

15.0 V (A), –7.7 V (A), 12.4 V (L) and 15 V (L) are output.
Feedback for the 15.0 V (A) with view mode and 12.4 V (L)
with play mode is provided to the switching controller (Pin
(36) of IC511) so that PWM control can be carried out.

– 6 –

1-4. PW1 POWER CIRCUIT DESCRIPTION

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1. Outline

This is the main PW1 power circuit, and is comprised of the
following blocks.
Switching controller (IC501)
Digital and LCD system and 5.0 V system power output
(L5005, Q5015, D5005, C5036, C5037)
Digital 3.3 V system power supply (L5002, Q5003, D5002,
C5018)
Digital 3.4 V system power supply (L5003, Q5009, D5004,
C5029)
Series regulator (IC502)
Digital 2.5 V system power supply (Q5007, C5025, C5026)
Analog system 5 V power supply (L5008, Q5020, D5006,
C5045)

2. Switching Controller (IC501)

This is the basic circuit which is necessary for controlling the
power supply for a PWM-type switching regulator, and is pro­vided with four built-in channels, only CH1 (digital 3.3 V), CH3
(5 V system), CH2 (digital 3.4 V) and CH4 (analog system 5
V) are used. Feedback from 3.3 V (D) (CH1), 3.4 V (D) (CH2),
5 V (D) (CH3) and 5.0 V (A) power supply outputs are re­ceived, and the PWM duty is varied so that each one is main­tained at the correct voltage setting level.

2-1. Short-circuit protection circuit

If output is short-circuited for the length of time determined
by the condenser which is connected to Pin (33) of IC501, all
output is turned off. The control signal (P ON, P(A) ON and
LCD ON) are recontrolled to restore output.

3. Digital 3.3 V Power Output

3.3 V (D) is output. Feedback for the 3.3 V (D) is provided to
the switching controller (Pins (1) of IC501) so that PWM con­trol can be carried out.

4. Digital 3.4 V System Power Output

3.4 V (D) is output. Feedback is provided to the swiching con­troller (Pin (12) of IC501) so that PWM control can be carried
out.

5. 5 V System Power Output

5 V (D) and 5 V (L) are output. Feedback for the 5 V (D) is
provided to the switching controller (Pin (25) of IC501) so
that PWM control can be carried out.

6. Series Regulator (IC502)

This is provided with one built-in channel. Digital 3.4 V is in­put, and digital 2.5 V is output.

7. Digital 2.5 V System Power Output

2.5 V (D) is output. Feedback for the 2.5 V (D) is provided to
the Pin (7) of IC502. The current of Q5008 base is controled
so that the voltage of Q5008 collector is 2.5 V.

8. Analog 5 V System Power Output

5 V (A) is output. Feedback is provided to the swiching con­troller (Pin (36) of IC501) so that PWM control can be carried
out.

– 7 –

1-5. PW1 STROBE CIRCUIT DESCRIPTION

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1. Charging Circuit

When UNREG power is supplied to the charge circuit and the
CHG signal becomes High (3.3 V), the charging circuit starts
operating and the main electorolytic capacitor is charged with
high-voltage direct current.
However, when the CHG signal is Low (0 V), the charging
circuit does not operate.

1-1. Power switch

When the CHG signal switches to Hi, Q5406 turns ON and
the charging circuit starts operating.

1-2. Power supply filter

L5401 and C5401 constitute the power supply filter. They
smooth out ripples in the current which accompany the switch­ing of the oscillation transformer.

1-3. Oscillation circuit

This circuit generates an AC voltage (pulse) in order to in­crease the UNREG power supply voltage when drops in cur­rent occur. This circuit generates a drive pulse with a frequency
of approximately 50-100 kHz. Because self-excited light omis­sion is used, the oscillation frequency changes according to
the drive conditions.

2. Light Emission Circuit

When RDY and TRIG signals are input from the ASIC expan­sion port, the stroboscope emits light.

2-1. Emission control circuit

When the RDY signal is input to the emission control circuit,
Q5409 switches on and preparation is made to let current
flow to the light emitting element. Moreover, when a STOP
signal is input, the stroboscope stops emitting light.

2-2. Trigger circuit

When a TRIG signal is input to the trigger circuit, D5405
switches on, a high-voltage pulse of several kilovolts is gen­erated inside the trigger circuit, and this pulse is then applied
to the light emitting part.

2-3. Light emitting element

When the high-voltage pulse form the trigger circuit is ap­plied to the light emitting part, currnet flows to the light emit­ting element and light is emitted.

Beware of electric shocks.

1-4. Oscillation transformer

The low-voltage alternating current which is generated by the
oscillation control circuit is converted to a high-voltage alter­nating current by the oscillation transformer.

1-5. Rectifier circuit

The high-voltage alternating current which is generated at
the secondary side of T5401 is rectified to produce a high­voltage direct current and is accumulated at electrolytic ca­pacitor C5144 on the CA3 board.

1-6. Voltage monitoring circuit

This circuit is used to maintain the voltage accumulated at
C5144 at a constance level.
After the charging voltage is divided and converted to a lower
voltage by R5417 and R5419, it is output to the SY1 circuit
board as the monitoring voltage VMONIT. When this VMONIT
voltage reaches a specified level at the SY1 circuit board, the
CHG signal is switched to Low and charging is interrupted.

– 8 –

1-6. SY1 CIRCUIT DESCRIPTION

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1. Configuration and Functions

For the overall configuration of the SY1 circuit board, refer to the block diagram. The SY1 circuit board centers around a 8-bit
microprocessor (IC301), and controls camera system condition (mode).
The 8-bit microprocessor handles the following functions.

1. Operation key input, 2. Clock control and backup, 3. Power ON/OFF, 4. Storobe charge control, 5. Signal input and output for
zoom and lens control.

Pin

1~4

5
6
7
8

9
10
11
12

13

14
15
16
17
18
19
20
21
22
23
24 VDD
25 AVSS

26~29 SCAN IN 3~0

30

31 DC_IN

32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48

STBY_LED (GREEN)

Signal

SCAN OUT 0~3

P ON

PA ON

LCD ON

P ON2

VSS
VDD

SELF_LED

STBY_LED (RED)

AVREF_ON

SI

SO

SCK

PRG SI

PRG SO

PRG SCK

AV JACK

NOT USED

CHG ON

NOT USED

CHG VOL
BATTERY

AVREF

AVDD
RESET
XCOUT

XCIN

IC

XOUT

XIN

VSS

BAT OFF

SREQ
JOG 0

SCAN_IN5

JOG 1

BR PCON

I/O

O
O
O
O
O

O
O
O
O

O

I/O

O

I/O

O

O

O

O

Outline
Key matrix output
Digital power ON/OFF control H : ON
Analog power ON/OFF control H : ON
LCD power ON/OFF control H : ON
ASIC/CF card power timing control H : ON

-

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-

­I

­I

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GND
VDD
Self-timer LED control L : ON
Stand-by LED (green) control L : ON
Stand-by LED (red) control L : ON
A/D converter standard voltage control L : ON
Receiving data (from ASIC)
Sending data (to ASIC)
Communication clock (to ASIC)
Flash memory write receiving data
Flash memory write sending data
Flash memory write communication clock
AV jack connection detection H : AV JACK detection

­Flash charge control H : ON
VDD
Analog GND
Key scan input

­DC JACK/battery detection input (analog input)

Storobe charge voltage detection (analog input)
Battery voltage detection (analog input)
Analog standard voltage input terminal
A/D converter analog power terminal
Reset input
Clock oscillation terminal (32.768 kHz)
Clock oscillation terminal
Flash memory writing voltage
Main clock oscillation terminal (4MHz)
Main clock oscillation terminal
GND
Battery OFF detection
Serial communication requirement (from ASIC)
Jog shuttle input 0
Key scan input 5
Jog shuttle input 1

-

See next page

– 9 –

→→

→

→→

49 BR OPEN

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50

51
52
53
54
55
56
57
58
59
60
61
62
63
64

BR CLOSE

CARD

BUZZER

SCAN IN 4

SCAN OUT 4

WAKE UP

SYMUTE

USB

NOT USED

NOT USED ­NOT USED
NOT USED

ASIC TEST 1 O ASIC reset control signal 1
ASIC TEST 2
ASIC RESET

O
O Barrier close control L : Close

I

O

I

O

I

O

I

--

-

-

O
O

Table 4-1. 8-bit Microprocessor Port Specification

Barrier open control H : Open

CF card insertion detection L : Insertion
Buzzer beep tone output H : Pulse output
Key scan input 4
Key scan output 4

­Audio mute control L : Mute
USB connector detection L : USB detecion

-

-

-

ASIC reset control signal 2
ASIC reset singal

2. Internal Communication Bus

The SY1 circuit board carries out overall control of camera operation by detecting the input from the keyboard and the condition
of the camera circuits. The 8-bit microprocessor reads the signals from each sensor element as input data and outputs this data
to the camera circuits (ASIC) or to the LCD display device as operation mode setting data. Fig. 4-1 shows the internal commu­nication between the 8-bit microprocessor, ASIC and SPARC lite circuits.

ASIC RESET

S. REQ

8-bit

Microprocessor

Fig. 4-1 Internal Bus Communication System

ASIC SO

ASIC SI

ASIC SCK

ASIC TEST 1

ASIC TEST 2

3. Key Operaiton

For details of the key operation, refer to the instruction manual.

SCAN

SCAN
OUT

IN

0
1
2
3
4

0

← LEFT

TELE

MODE

STILL IMAGE

--

123

↑ UP

WIDE

SET FLASH MODE BARRIER OPEN

SEQUENTIAL

SHOT

→ RIGHT

PLAY MODE

INFO

VIDEO CLIP

SHOOTING

-

↓ DOWN

REC MODE

(LCD OFF)

SET UP

-

4

1st shutter

REC MODE

(LCD ON)

PC MODE

-

ASIC

5

2nd shutter

-

BARRIER

CLOSE

TEST

POWER ON

Table 4-2. Key Operation

– 10 –