SANYO VPC-C4 Service Manual 00-17
1. OUTLINE OF CIRCUIT DESCRIPTION
1-1. CA1 CIRCUIT DESCRIPTION
1. IC Configuration
IC901 (ICX488EQF) CCD imager
IC905 (H driver, CDS, AGC and A/D converter)
Ø1
ØST
ØHLD
GND
GND
12
10
11
V
V
V
7
8
9
Ø3B
Ø2
V
6
V
V
V
3
4
5
Ø4
Ø3A
Ø5AVØ5B
V
2
Ø6
V
1
2. IC901 (CCD imager)
[Structure]
Interline type CCD image sensor
Image size Diagonal 6.67 mm (1/2.7 type)
Pixels in total 2396 (H) x 1766 (V)
Recording pixels 2288 (H) x 1712 (V)
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
Symbol
6
Vø
Vø5B
Vø5A
Vø4
Vø3B
Vø3A
Vø2
Vø1
VøST
VøHLD
GND
GND
Vertical register transfer clock
Vertical register transfer clock
Vertical register transfer clock
Vertical register transfer clock
Vertical register transfer clock
Vertical register transfer clock
Vertical register transfer clock
Vertical register transfer clock
Horizontal addition control clock
Horizontal addition control clock
GND
GND
Pin Description
Pin No.
13
14
15
16
17
18
19
20
21
22
23
24
Gb
B
Gb
Gr
R
B
Gb
Gr
R
B
Gb
Gr
R
B
Gb
Gr
R
B
Gb
Gr
R
Horizontal register
18
19
20
SUB
SUB
GND
C
Ø
(Note) : Photo sensor
OUT
V
R
Gb
R
Gb
R
Gb
Vertical register
R
Gb
R
RG
Ø
17
1615
Ø2B
Ø1B
H
H
1413
DD
V
Fig. 1-1. CCD Block Diagram
Symbol
V
OUT
VDD
øRG
1B
Hø
Hø2B
GND
øSUB
C
SUB
1A
Hø
Hø2A
GND
V
L
Signal output
Circuit power
Reset gate clock
Horizontal register transfer clock
Horizontal register transfer clock
GND
Substrate clock
Substrate bias
Horizontal register transfer clock
Horizontal register transfer clock
GND
Protection transistor bias
Pin Description
B
Gr
B
Gr
B
Gr
B
Gr
B
Gr
(Note)
21
23
24
22
Ø1A
H
L
V
Ø2A
GND
H
Table 1-1. CCD Pin Description
3. IC902, IC903 (V Driver) and IC905 (H driver)
An H driver and V driver are necessary in order to generate
the clocks (vertical transfer clock, horizontal transfer clock
and electronic shutter clock) which driver the CCD.
IC902 and IC903 are V driver. In addition the XV1-XV6 signals which are output from IC101 are the vertical transfer
clocks, and the XSG signal is superimposed at IC902 and
IC903 in order to generate a ternary pulse. In addition, the
XSUB signal which is output from IC101 is used as the sweep
pulse for the electronic shutter. A H driver is inside IC905,
and H1, H2 and RG clock are generated at IC905.
4. IC905 (CDS, AGC Circuit and A/D Converter)
The video signal which is output from the CCD is input to Pin
(27) of IC905. There are inside the sampling hold block, AGC
block and A/D converter block.
The setting of sampling phase and AGC amplifier is carried
out by serial data at Pin (32). The video signal is carried out
A/D converter, and is output by 12-bit.
– 2 –
CCDIN
RG
H1-H4
VRB
VRT
VREF
2~36 dB
VGA
PxGA
CDS
HORIZONTAL
4
DRIVERS
CLAMP
INTERNAL
CLOCKS
PRECISION
TIMING
CORE
SYNC
GENERATOR
VD
HD
Fig. 1-2. IC905 Block Diagram
ADC
CLAMP
INTERNAL
REGISTERS
SL
SCK
10
SDATA
DOUT
CLI
1-2. CP1 and VF1 CIRCUIT DESCRIPTION
1. Circuit Description
1-1. Digital clamp
The optical black section of the CCD extracts averaged values from the subsequent data to make the black level of the
CCD output data uniform for each line. The optical black section of the CCD averaged value for each line is taken as the
sum of the value for the previous line multiplied by the coefficient k and the value for the current line multiplied by the
coefficient 1-k.
1-2. Signal processor
1. γ correction circuit
This circuit performs (gamma) correction in order to maintain
a linear relationship between the light input to the camera
and the light output from the picture screen.
2. Color generation circuit
This circuit converts the CCD data into RGB signals.
3. Matrix circuit
This circuit generates the Y signals, R-Y signals and B-Y signals from the RGB signals.
4. Horizontal and vertical aperture circuit
This circuit is used gemerate the aperture signal.
1-3. AE/AWB and AF computing circuit
The AE/AWB carries out computation based on a 64-segment
screen, and the AF carries out computations based on a 6segment screen.
1-4. SDRAM controller
This circuit outputs address, RAS, CAS and AS data for controlling the SDRAM. It also refreshes the SDRAM.
1-5. Communication control
1. SIO
This is the interface for the 8-bit microprocessor.
2. PIO/PWM/SIO for LCD
8-bit parallel input and output makes it possible to switch between individual input/output and PWM input/output.
1-6. TG/SG
Timing generated for 4 million pixel horizontal addtion CCD
control.
1-7. Digital encorder
It generates chroma signal from color difference signal.
2. Outline of Operation
When the shutter opens, the reset signals (ASIC and CPU)
and the serial signals (“take a picture” commands) from the
8-bit microprocessor are input and operation starts.
When the TG/SG drives the CCD, picture data passes through
the A/D and CDS, and is then input to the ASIC as 10-bit
data. The AF, AE, AWB, shutter, and AGC value are computed from this data, and three exposures are made to obtain
the optimum picture. The data which has already been stored
in the SDRAM is read by the CPU and color generation is
carried out. Each pixel is interpolated from the surrounding
data as being either R, G, and B primary color data to produce R, G and B data. At this time, correction of the lens
distortion which is a characteristic of wide-angle lenses is
carried out. After AWB and γ processing are carried out, a
matrix is generated and aperture correction is carried out for
the Y signal, and the data is then compressed by JPEG and
is then written to card memory (SD card).
When the data is to be output to an external device, it is taken
data from the memory and output via the USB I/F. When played
back on the LCD and monitor, data is transferred from memery
to the SDRAM, and the image is then elongated so that it is
displayed over the SDRAM display area.
3. LCD Block
During EE, gamma conversion is carried out for the 12-bit
RGB data which is input from the A/D conversion block of the
CCD to the ASIC in order that the γ revised can be displayed
on the video. The YUV of 640 x 480 is then transferred to the
SDRAM.
The data which has accumulated in the SDRAM is converted
to digital YUV signal in conformity to ITUR-601 inside the ASIC
by SDRAM control circuit inside the ASIC, the data is sent to
the LCD driver IC and displayed the image to LCD panel.
If the shutter button is pressed in this condition, the 10-bit
data which is output from the A/D conversion block of the
CCD is sent to the SDRAM (DMA transfer), and is displayed
on the LCD as a freeze-frame image.
During playback, the JPEG image data which has accumulated in the SD card is converted to YUV signals. In the same
way as for EE, the data is then sent to the SDRAM, converted to digital YUV signal in conformity to ITUR-601 inside
the ASIC, the data is sent to the LCD driver IC and displayed
the image to LCD panel.
The LCD driver is converted digital YUV signals to RGB signals from ASIC, and these RGB signals and the control signal which is output by the LCD driver are used to drive the
LCD panel. The RGB signals are 1H transposed so that no
DC component is present in the LCD element, and the two
horizontal shift register clocks drive the horizontal shift registers inside the LCD panel so that the 1H/1V transposed RGB
signals are applied to the LCD panel.
Because the LCD closes more as the difference in potential
between the VCOM (common polar voltage: AC drive) and
the R, G and B signals becomes greater, the display becomes
darker; if the difference in potential is smaller, the element
opens and the LCD become brighter. In addition, the brightness and contrast settings for the LCD can be varied by means
of the serial data from the ASIC.
– 3 –
4. Lens drive block
4-1. Focus drive
The focusing motor is a stepping motor that is microprocessor
driven by IC951. When input the control signal (FCW, FOE
and FCLK) which are output from the ASIC port (IC101), the
focusing motor is driven microstep by IC951. Detection of the
standard focusing position is carried out by means of
photointerruptor sensor inside the lens block.
4-2. Zoom drive
The zoom motor is a stepping motor that is microprocessor
driven by IC951. When input the control signal (ZCW,
ZOOMOE, and ZCLK) which are output from the ASIC port
(IC101), the zoom motor is driven microstep by IC951. Detection of the standard zoom position is carried out by means of
photointerruptor sensor inside the lens block.
4-3. ND filter
IC951 turns the ND filter on and off when ND ON and ND OFF
signals are input to IC951 respectively.
4-4. Iris drive
The output from the Hall sensor inside the lens is amplified by
the Hall amplifier circuit in the lens drive block, and the difference in the target aperture values that are determined by the
output from that and by the exposure level output from the
ASIC is input to the servo amplifier circuit to automatically control the aperture opening so that it matches the target aperture
setting.
4-5. Shutter drive
The shutter is operated by applying a reverse voltage to the
aperture coil mentioned above. During normal operation, the
NAESW signal that is output from the ASIC is held at a High
level, but when the shutter operates, the NAESW signal becomes Low and after that the SHUTTER signal that is output
from the ASIC becomes High and the shutter operates.
5. Video clip recording and playback
5-1. Recording
The signals from the camera block are input to the ASIC where
they are processed, and the image data that is stored in the
SDRAM of IC103 is input to the IC102 MPEG4 CODEC LSI.
The CODEC LSI converts this data to encoded MPEG4 data,
after which it is returned to the ASIC as streaming data, and
the data is then written in sequence onto the SD card. At this
time, the audio signals that are input to the built-in microphone
are converted into digital data by the audio CODEC IC of IC183,
and they are then input via the ASIC to IC102 (MPEG4
CODEC). The audio data is then encoded (AAC) by IC102,
and then it is returned to the ASIC as streaming data and is
then written in sequence onto the SD card together with the
image signals described above.
5-2. Playback
The data is read from the SD card and input to IC102 as streaming data. The encoded data is decoded into image data by
IC102 and then returned to the ASIC where it is displayed by
the LCD or on a TV monitor. At this time, the audio data is also
decoded by IC102, and it passes through the ASIC and is input to IC183 as digital data. D/A conversion is carried out at
IC183, and the sound is then output to the speaker or to the
LINE OUT terminal.
6. Audio CODEC circuit (IC183)
The signals from the camera block are input to the ASIC where
they are processed, and the image data that is stored in the
SDRAM of IC104 is input to the IC102 MPEG4 CODEC LSI.
The CODEC LSI converts this data to encoded MPEG4 data,
after which it is returned to the ASIC as streaming data, and
the data is then written in sequence onto the SD card. At this
time, the audio signals that are input to the built-in microphone
are converted into digital data by the audio CODEC IC of IC183,
and they are then input via the ASIC to IC102 (MPEG4
CODEC). The audio data is then encoded (AAC) by IC102,
and then it is returned to the ASIC as streaming data and is
then written in sequence onto the SD card together with the
image signals described above.
– 4 –
Loading...