STK673-010 is a 3-phase stepping motor driver hybrid IC
with built-in microstep controller having a bipolar constant current PWM system, in which a power MOSFET is
employed at an output stage.
It includes a 3-phase distributed controller for a 3-phase
stepping motor to realize a simple configuration of the
motor driver circuit.
The number of motor revolution can be controlled by the
frequency of external clock input. 2, 2-3, W2-3 and 2W23-phase excitation modes are available. The basic step
angle of the stepping motor can be separated as much as
one-eighth 2-3-phase to 2W2-3-phase excitation mode
control quasi-sine wave current, thereby realizing low
vibration and low noise.
Applications
• As a 3-phase stepping motor driver for transmission and
reception in a facsimile.
• As a 3-phase stepping motor driver for feeding paper
feed or for an optical system in a copying machine.
• Industrial machines or products employing 3-phase
stepping motor driving.
• An MOI output terminal which outputs 1 pulse per 1
cycle of phase current.
• A CW/CCW terminal which switches the rotational
direction.
• A Hold terminal which temporarily holds the motor in a
state where the phase current is conducted.
• An Enable terminal which can forcibly turns OFF a
MOSFET of a 6 output driving element in normal operation
• Schmitt inputs with built-in pull-up resistor (20 k Ω typ)
• Motor current can be set by changing the voltage of the
Vref terminal (0.63V per 1A, dealing as much as 0 to
1/2V
• The clock input for controlling the number of motor
revolution lies in a range of 0 to 50kHz.
• Supply voltage: V
• A built-in current detection resistor (0.227 Ω )
• A motor current during revolution can deal with as high
as 2.4A at Tc = 105 ° C and as high as 4A at Tc = 50 ° C
or lower.
2 (4A)).
CC
1 = 16 to 30V, V
CC
2 = 5.0V ± 5%
CC
Package Dimensions
unit: mm
4130
Features
• Number of motor revolution can be controlled by the
frequency of external clock input.
• 4 types of modes, i.e., 2, 2-3, W2-3 and 2W2-3-phase
excitations, are available which can be selected based
on rising of clock signals, by switching Highs and Lows
of Mode A and Mode B terminals.
• Setting a Mode C terminal Low allows an excitation
mode that is based on rising and falling of a clock signal. By setting the Mode C terminal Low, phases that
are set only by Mode A and Mode B can be changed to
other phases as follows without changing the number of
motor revolution: 2-phase may be switched to 2-3phase; 2-3-phase may be switched to W2-3-phase; and
W2-3-phase may be switched to 2W2-3-phase.
• Phase is maintained even when the excitation mode is
changed
SANYO Electric Co., Ltd. Semiconductor Business Headquarters
TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110 JAPAN
[STK673-010]
N2997HA (ID) No. 5708—1/16
Specifications
−
−
°
°
−
° C
µ
µ
STK673-010
Maximum Ratings
at Tc = 25 ° C
ParameterSymbolConditionsRatingsUnit
Maximum supply voltage 1V
Maximum supply voltage 2V
Input voltageV
Phase output currentI
Operating supply voltage 1V
Operating supply voltage 2V
Input voltageV
Phase output current 1I
Phase output current 2I
1With signal16 to 30V
CC
2With signal5.0V ± 5%V
CC
0 to V
IH
1Without heat sink1.7A
O
2Tc = 105 ° C2.4A
O
2V
CC
Clock frequencyClockpin 11 input frequency0 to 50kHz
C
C
Electrical Characteristics
at Tc = 25 ° C, V
1 = 24V, V
CC
CC
2 = 5V
ParameterSymbolConditionsmintypmaxUnit
V
2 supply currentI
CC
Enable=Low–6.112mA
CCO
each phase R/L=2 Ω /6mH
Effective output currentI
FET diode forward voltageV
Output saturation voltageV
Output leakage current I
Input high voltageV
Input low voltageV
Input currentI
Vref input voltageV
Vref input currentI
MOI output high voltageV
MOI output low voltageV
2W 2-3-phase excitation
o ave
Vref = 0.61V
I
= 1A (R
df
R
sat
R
OL
9 terminals, Pins 11 to 18, 224.0––V
IH
9 terminals, Pins 11 to 18, 22––1.0V
IL
Pins 11 to 18 pin = GND level
IL
pullup resistance 20k Ω (typ.)
Pin 100–V
rH
Pin 10, pin 10 = 2.5V
r
Internal resistance 40 k Ω (typ.)
Pin 20, pin 20 to 19 = 820 Ω
OH
Pin 20, pin 21 to 20 = 1.6 k Ω
OL
=23 Ω )–1.01.6V
f
L
=23 Ω
L
=23 Ω
L
0.620.690.76Arms
–0.450.56V
––0.1mA
115250550
440625810
2.5––V
––0.4V
2/2V
CC
PWM frequencyFc–63–kHz
Note:Constant voltage supply is used.
A
A
No. 5708—2/16
STK673-010
Electrical Characteristics 2
at Tc = 25 ° C, V
1 = 24V, V
CC
CC
2 = 5V
Current division ratio at phase current of 1/4 electrorotation, in each excitation mode (unit = %, typ.) Number of current
division is put in parentheses
Note: Constant voltage supply is used as power supply.
Electrical Characteristic 2 represents design values. Measurement for controlling the standard value is not conducted.
No. 5708—3/16
Equivalent Block Diagram
STK673-010
No. 5708—4/16
Sample Application Circuit
STK673-010
2 ×
±
Set Equation of Output Current I
I
peak = Vref ÷ KK = 0.63 (V/A)
o
where Vref ≤ 0.5 × V
Vref = V
CC
2
CC
Rox ÷ (R01 + Rox)
Peak Value
O
Rox = (R02 × 4.0 k Ω ) ÷ (R02 + 4.0k Ω )
• R02 is preferably set to be 100 Ω in order to minimize
the effect of the internal impedance (4.0k Ω ± 30%) of
STK637-010
• For noise reduction in 5V system, put the GND side
of bypass capacitor (220 µ F) of V
1 (shown in a
CC
thick line in the above Sample Application Circuit) in
the vicinity of pins 27 and 28 of the hybrid IC.
• Set the capacitance value of the bypass capacitor C1
such that a ripple current of a capacitance, which varies in accordance with the increase of motor current,
lies in an allowable range.
• K in the above-mentioned set equation varies within
5 to ± 10% depending on the inductance L and resistance value R of the used motor. Check the peak
value setting of I
upon actual setting.
o
No. 5708—5/16
STK673-010
Input/Output Terminals Functions of 5V System
Terminal nameNo.Function
Clock11Basic clock for switching phase current of motorRising edge in Mode C = 1
Input frequency range: DC to 50kHzRising and falling edge in Mode C = 0
Minimum pulse width: 10µ µ
High level duty: 40 to 60%
Mode A12Sets excitation modeSee table listed below
Mode B13Sets excitation modeSee table listed below
Mode C18Sets excitation modeSee table listed below
TU
Hold14Temporarily holds the motor in a state0
CW/CCW
Enable16Turns OFF all of the driving MOSFET0
Reset
MOI20Monitors the number of revolution of the motorOutputs 1 pulse of a high level signal per one
Vref10Sets the peak value of the motor current set at 0.63V per 1AMaximum value 0.5 × V
22Sets excitation modeSee table listed below
Switches 2-3 phase excitation of step current to rectangular current
More effective in increasing torque than in lowering vibration of motor
15Switches the rotational direction of the motor1 = CW, 0 = CCW
Excitation No.Excitation ModeNumber of current steps
As shown in the table, TU terminal is only effective for
Excitation Nos. (3) and (7).
Although the present hybrid IC is not damaged even when
TU = 0 is mistakenly input in Excitation, other than Excitation Nos. (3) and (7), motor vibration or motor current
may increase.
* Timing charts for 3-phase stepping motor driver is illus-
trated on pages 10 to 14 for exemplary operations of
Enable Hold, CW/CCW for Excitation Nos. (1), (2), (3),
(4), (5) and (9), and Excitation No. (4).
Number of clock pulse
per one cycle of phase
current
No. 5708—6/16
STK673-010
Notes On Use
(1) Input terminal use of 5V system
[RESET and Clock (timing of input signal upon rising of
power supply)]
The driver is configured to include a 5V system logic sec-
tion and a 24V MOSFETs section. The MOSFETs on both
V
1 side and GND side are N-channels. Thus, the MOS-
CC
FETs on the V
1 side is provided with a charging pump
CC
circuit for generating a voltage higher than that of V
When a Low signal is input to a RESET terminal for operating the RESET, the charging pump is stopped. After the
release of the RESET (High input), it requires a period of
1.7 ms to rise the charging pump. Accordingly, even when
a Clock signal is input during the rising of the charging
pump circuit, the MOSFET cannot be operated. Such a
timing needs to be taken into consideration for inputting a
Clock signal. An example of timing is shown in Figure 1.
CC
1.
Figure 1. Timing chart of RESET signal and Clock signal
When the RESET terminal switches from Low to High where a High period is 1.7ms or longer and the Clock input is
conducted in a Low state, each phase current of the motor is maintained at the following values.
Phase
U phase00
V phase-87% of peak current during normal rotation-100% of peak current during normal rotation
W phase+87% of peak current during normal rotation+100% of peak current during normal rotation
Current in the case where the initial Clock signal is maintained
at Low level (Other than 2-3-phase TU excitation)
Current in the case where the initial Clock signal is maintained
at Low level (2-3-phase TU excitation)
Refer to the Timing charts for operations.
[Clock]
Clock signals should be input under the following condi-
tions so that all 9 types of excitation modes shown in the
Excitation Mode Table.
Input frequency rangeDC to 50 kHz
Minimum pulse width10 µ s
High level duty40 to 60 %
[Mode A, Mode B, Mode C and TU]
These 4 terminals allow selection of excitation modes. For
specific operations, refer to Excitation Mode Table and
Timing Charts.
[Hold, CW/CCW]
Hold temporary holds the motor while a phase current of
the motor is conducted, even when there are clock inputs
of Low input.
When Mode C is not used, it is an operation based on rising of the Clock and thus the above-mentioned condition
of high level duty is negligible. A minimum pulse width
of 10 µ s or more allows excitation operation by Mode A
and Mode B. Since the operation is based on rising and
falling of the Clock under the use of Mode C, it is most
preferable to set the high level duty to 50 % so as to obtain
uniform step-wise current widths.
High input releases the hold, and the motor current
changes again synchronizing with the rising of Clock signals. Refer to Timing Chart for exemplary operations.
CW/CCW switches the rotational direction of the motor.
Switching to High gives a rotational operation of CW, and
Low gives a rotation operation of CCW. The timing of
switching the rotation is synchronizes the rising of the
No. 5708—7/16
STK673-010
clock signals. Refer to Timing Chart for e x emplary operations.
[Enable]
High input renders a normal operation and Low input forc-
ibly renders a gate signal of MOSFETs Low, thereby cut-
ting a motor current. Once again High input renders a
current to conduct in the motor. The timing of the current
does not synchronize with the clock.
Since Low input of Enable forcibly cuts the motor current,
it can be used to cut a V-phase or W-phase while Clock is
maintained in a Low level state after the RESET operation.
2 ×
±
Figure 2. Input timings of RESET signal, Enable signal and Clock signal
[Vref (Setting motor current peak value)]
A peak value of a motor current I
R02, V
2 (5V) and the following set equation (I).
CC
Set equation of peak value of motor current I
I
peak = Vref ÷ K......(I)
o
whereVref ≤ 0.5 × V
Vref = V
CC
Rox ÷ (R01 + Rox)
CC
is determined by R01,
o
o
2 K = 0.63 (V/A)
Rox = (R02 × 4.0 k Ω ) ÷ (R02 + 4.0 k Ω )
• R02 is preferably set to be 100 Ω in order to minimize
the effect of the internal impedance (4.0k Ω ± 30%) of
STK637-010
• K in the above-mentioned set equation varies within
5 to ± 10% depending on the inductance L and resistance value R of the used motor. Check the peak
value setting of I
* Refer to Figure 4 for an example of Vref-I
upon actual setting.
o
character-
o
istics
(2) Allowable Operating Ranges of Motor Current
Set the peak value of the motor current I
so as to lie
o
within a region below the curve shown in Figure 5 on page
14.
For operation where Tc = 50 ° C, I
max should be 4.0 A or
o
lower and a Hold operation should be conducted where I
max is 3.3 A or lower.
(3) Heat Radiation Design
Heat radiation design for reducing the operation substrate
temperature of the hybrid IC is effective in enhancing the
quality of the hybrid IC.
The size of a heat sink varies depending on the average
power loss Pd in the hybrid IC. As shown in Figure 6 on
page 14, Pd increases in accordance with the increase of
the output current.
Since the starting current and the stationary current coexist
in an actual motor operation, Pd cannot be obtained only
from the data shown in Figure 6. Therefore, Pd is obtained
assuming that the timing of the actual motor operation is a
repeated operation shown in the following Figure 3.
o
When the operation substrate temperature Tc is set to
105 ° C, I
tion should be conducted where I
max should be 2.4 A or lower and a Hold opera-
o
max is 2.0 A or lower.
o
No. 5708—8/16
STK673-010
Figure 3. Timing Chart of Motor Operation
The average power loss Pd in the hybrid IC upon an operation shown in Figure 3 can be obtained by the following equation (II):
When the value obtained by the above equation (II) is equal to or less than 3.4W and the ambient temperature Ta is equal
to or lower than 60 ° C, there is no need of providing a heat sink.
Refer to Figure 7 for data of the operation substrate temperature when no heat sink is used.
The size of the heat sink can be decided depending on θ c-a obtained by the following equation (III) and from Figure 8.
c-a = (Tc max – Ta) ÷ Pd ..... (III)
where Tc max: Maximum operation substrate temperature = 105 ° C
Ta: Ambient temperature of hybrid IC
Although heat radiation design can be realized by following the above equations (II) and (III), make sure to check that
the substrate temperature Tc is equal to or lower than 105 ° C after mounting the hybrid IC into a set.
No. 5708—9/16
STK673-010
Timing Chart of 3-phase stepping motor driver
2 phase excitation
2-3 phase excitation
No. 5708—10/16
2-3 phase excitation TU
STK673-010
W2-3 phase excitation
No. 5708—11/16
2W2-3 phase excitation
STK673-010
w2-3 phase excitation (Enable operation)
No. 5708—12/16
W2-3 phase excitation (Hold operation)
STK673-010
W2-3 phase excitaion (CW/CCW operation)
No. 5708—13/16
STK673-010
W2-3 phase excitation to 2W2-3 phase excitation (ModeC operation)
Figure 4. Vref – I
Motor current setting voltage, Vref – V
Motor current I
(peak value of stepping current) – A
o
o
Figure 5.I
– A
o
Motor current, I
Operating substrate temperature, Tc – ° C
– Tc
o
No. 5708—14/16
STK673-010
O
i
l
V
V
Figure 6.Pd – I
Hybrid IC’s internal average power loss, Pd – WHeat sink thermal resistance, θca –°C/WDiode forward voltage F1 to F6, V
Figure 8.
Motor current, Io – A
θ
ca – S
o
Figure 7.
Substrate temperature rise, ∆Tc – °C
Hybrid IC’s internal average power loss, Pc – W
Figure 9.Vst – I
st –
tage,
∆
Tc – Pc
o
Heat sink surface, S – cm
Figure 10.Vdf – I
– V
df
Diode forward current, If – A
on vo
utput saturat
2
f
Figure 11.IIL – V
– µA
IL
Input current 11 to 18 pins, I
Output current, Io – A
IL
Input voltage, V
– V
IL
No. 5708—15/16
STK673-010
Figure 12.Ir – V
– µAMOI output low voltage, V
r
Vref input current, I
Vref input voltage, VrH – V
rH
Figure 14.VOL – IOL
– V
OL
Figure 13.VOH – I
– V
OH
MOI output high voltage, V
20 pins output current, IOH – mA
OH
20 pins output current, I
■
No products described or contained herein are intended for use in surgical implants, life-support systems, aerospace equipment, nuclear
OL
– mA
power control systems, vehicles, disaster/crime-prevention equipment and the like, the failure of which may directly or indirectly cause
injury, death or property loss.
■
Anyone purchasing any products described or contained herein for an above-mentioned use shall:
➀
Accept full responsibility and indemnify and defend SANYO ELECTRIC CO., LTD., its affiliates, subsidiaries and distributors and all
their officers and employees, jointly and severally, against any and all claims and litigation and all damages, cost and expenses
associated with such use:
➁
Not impose any responsibility for any fault or negligence which may be cited in any such claim or litigation on SANYO ELECTRIC CO.,
LTD., its affiliates, subsidiaries and distributors or any of their officers and employees, jointly or severally.
■
Information (including circuit diagrams and circuit parameters) herein is for example only; it is not guaranteed for volume production.
SANYO believes information herein is accurate and reliable, but no guarantees are made or implied regarding its use or any infringements
of intellectual property rights or other rights of third parties.
This catalog provides information as of November, 1997. Specifications and information herein are subject to change without notice.
No. 5708—16/16
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