SANYO LV23000M Datasheet

Ordering number : ENN 6903
62901RM (OT) No. 6903-1/14
Overview
The LV23000M is a single-chip tuner IC for radio/cassette players that provides FM, AM, MPX, and PLL circuits. It allows the tuner PCB to be simplified significantly.
Functions
• FM tuner
• Multiplex stereo decoder
• PLL frequency synthesizer
Features
• Tuner circuit includes built-in PLL for easy end product design.
• Supports FCC standards
• Built-in adjustment-free multiplex VCO
• AM low-cut control
• Provides the transistor required to implement an active low-pass filter.
Package Dimensions
unit: mm
3129-MFP36SD
0.25
15.3
1
18
36
19
0.85
0.4
0.8
2.5max
2.25
0.1
7.9
9.2
10.5
0.65
SANYO: MFP36SD (375 mil)
[LV23000M]
LV23000M
SANYO Electric Co.,Ltd. Semiconductor Company
TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110-8534 JAPAN
Single-Chip Tuner IC for Radio/Cassette Players
Bi-CMOS IC
Any and all SANYO products described or contained herein do not have specifications that can handle applications that require extremely high levels of reliability, such as life-support systems, aircraft’s control systems, or other applications whose failure can be reasonably expected to result in serious physical and/or material damage. Consult with your SANYO representative nearest you before using any SANYO products described or contained herein in such applications.
SANYO assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all SANYO products described or contained herein.
• CCB is a trademark of SANYO ELECTRIC CO., LTD.
• CCB is SANYO’s original bus format and all the bus addresses are controlled by SANYO.
No. 6903-2/14
LV23000M
Parameter Symbol Conditions Ratings Unit
Maximum supply voltage
V
CC
max V
CC
7.0 V
V
DD
max V
DD
7.0 V
Maximum input voltage
V
IN
1 max CE, DI, CL 7.0 V
V
IN
2 max XIN VDD+ 0.3 V
Allowable power dissipation Pdmax Ta 70°C* 400 mW
V
O
1 max DO 7.0 V
Maximum output voltage V
O
2 max XOUT, PD VDD+ 0.3 V
V
O
3 max BO1, BO2, AOUT 12.0 V Operating temperature Topr –20 to +70 °C Storage temperature Tstg –40 to +125 °C
Specifications
Maximum Ratings at Ta = 25°C
Note: * When mounted on a 114.3 × 76.1 × 1.6 mm glass epoxy printed circuit board.
Operating Conditions at Ta = 25°C
PLL Block Allowable Operating Ranges at Ta = –20 to +70°C, VSS= 0 V
Parameter Symbol Conditions Ratings Unit
Recommended supply voltage
V
CC
5.0 V
V
DD
3.0 V
Operating supply voltage range
V
CC
op 4.0 to 6.0 V
V
DD
op 2.5 to 3.6 V
Parameter Symbol Conditions
Ratings
Unit
min typ max
Supply voltage V
DD
2.5 3.6 V
High-level input voltage V
IH
CE, CL, DI 0.7V
DD
6.0 V
Low-level input voltage V
IL
CE, CL, DI 0 0.3V
DD
V
Output voltage
V
O
1 DO 0 6.0 V
V
O
2 BO1, BO2, AOUT 0 10 V
f
IN
1 XIN: VIN1 75 kHz
Operating frequency
f
IN
2 FMIN: VIN2 10 160 MHz
f
IN
3 AMIN (SNS = 1): VIN3 2 40 MHz
f
IN
4 AMIN (SNS = 0): VIN4 0.5 10 MHz
Note: The XIN pin has an extremely high input impedance, which may result in current leakage problems.
No. 6903-3/14
LV23000M
Parameter Symbol Conditions
Ratings
Unit
min typ max
[FM Front End Characteristics] : fc = 98 MHz, fm = 1 kHz, 22.5 kHzdev.
3 dB sensitivity 3 dB LS
60 dBµV EMF, referenced to a 22.5 kHz dev. output,
12
dBµV
–3 dB input
EMF
Practical sensitivity QS For a 30 dB signal-to-noise ratio input 12
dBµV
EMF
[FM IF Monaural Characteristics] : fc = 10.7 MHz, fm = 1 kHz, 75 kHzdev.
Demodulator output V
O
100 dBµ V, the pin 12 output 210 330 420 mVrms Signal-to-noise ratio S/N 100 dBµ V, the pin 12 output 68 75 dB Total harmonic distortion (mono) THD 100 dBµ V, the pin 12 output 0.3 1.5 % 3 dB sensitivity 3 dB LS
100 dBµ V, referenced to a 75 kHz dev. output, –3 dB input
38 44 dBµV IF counter sensitivity IF-C3 SDC0 = 1, SDC1 = 0, the pin 18 (DO) output 41 51 61 dBµV Muting attenuation Mute-Att 100 dBµ V, the pin 12 output 68 dB
[FM IF Stereo Characteristics] : fc = 10.7 MHz, fm = 1 kHz, L+R = 90%, Pilot = 10%
Separation SEP 100 dBµ V, L-mod, Pin 12 output/pin 13 output 28 40 dB Total harmonic distortion (main) THD 100 dBµ V, main modulation, the pin 12 output 0.5 1.5 %
[AM Characteristics] : fc = 1000 kHz, fm = 1 kHz, 30% mod
Detector output 1 V
O
1 23 dBµ V, the pin 12 output 20 40 80 mVrms
Detector output 2 V
O
2 80 dBµ V, the pin 12 output 60 110 160 mVrms Signal-to-noise ratio 1 S/N1 23 dBµ V, the pin 12 output 1.5 20 dB Signal-to-noise ratio 2 S/N2 80 dBµ V, the pin 12 output 47 54 dB Total harmonic distortion THD 80 dBµ V, the pin 12 output 1.2 3.0 % IF counter sensitivity IF-C The pin 18 (DO) output 16 26 36 dBµV
AM low cut
LOW-CUT
80 dBµ V, referenced to fm = 1 kHz,
5 8 11 dB
the pin 12 output when fm = 100 Hz.
[Current Drain]
FM tuner block I
CC
FM In FM mode with no input 20 30 40 mA
AM tuner block I
CC
AM In AM mode with no input 10 20 30 mA
PLL block I
DD
fr = 83 MHz, X'tal = 75 kHz, With no input to the tuner block
1 2 5 mA
[PLL Characteristics]
Built-in feedback resistor Rf XIN 8 M Built-in output resistor Rd XOUT 250 k Hysteresis V
HIS
CE, CL, DI 0.1V
DD
V
High-level output voltage V
OH
PD: IO= –1 mA VDD– 1.0 V
V
OL
1 PD: IO= 1 mA 1.0 V
V
OL
2 BO1, BO2: IO= 1 mA 0.25 V
Low-level output voltage V
OL
2 BO1, BO2: IO= 5 mA 1.25 V
V
OL
3 DO: IO= 1 mA 0.25 V
V
OL
4 AOUT: IO= 1 mA, AIN = 2.0 V 0.5 V
I
IH
1 CE, CL, DI: VI= 6.0 V 5.0 µA
High-level input current I
IH
2 XIN: VI= V
DD
0.16 0.9 µA
I
IH
3 AIN: VI= 6.0 V 200 nA
I
IL
1 CE, CL, DI: VI= 0 V 5.0 µA
Low-level input current I
IL
2 XIN: VI= 0 V 0.16 0.9 µA
I
IL
3 AIN: VI= 0 V 200 nA
Output leakage current
I
OFF
1 AOUT, BO1, BO2: VO= 10 V 5.0 µA
I
OFF
2 DO: VO= 6.0 V 5.0 µA
High-level 3-state off leakage current
I
OFFH
PD: VO= 6.0 V 0.01 200 nA
Low-level 3-state off leakage current
I
OFFL
PD: VO= 0 V 0.01 200 nA
Operating Characteristics at Ta = 25°C, VCC= 5.0 V, VDD= 3.0 V, in the specified test circuit, using Yamaichi Electronics socket IC51-0362-736
Structure of the DI Control Data (Serial Input Data)
(1) IN1 mode
No. 6903-4/14
LV23000M
P0
P1
P2
P3
P4
P5
P6
P7
P8
P9
P10
P11
P12
P13
P14
P15
SNS
DVS
CTE
DNC
R0
R1
R2
R3
0 0 0 1 0 1 0 0
DI
Address
(1)P-CTR
(3)IF-CTR
(13)Don't care
(23)R-CTR
(2) IN2 mode
Address
(3)IF-CTR
0
1
0
BO1
IFSW
B02
BDSW1 STSW
SDC0
DOC0
DOC1
DOC2
UL0
UL1
DZ0
DZ1
GT0
GT1
SDC1
DLC
IFS
TEST0 TEST1 TEST2
1
0
0
1
0
1
0
0
DI
(9)O-PORT
(6)DO-C
(12)TEST
(10)PD-C
(16)SDC1
(8)DZ-C
(9)O-PORT
(4)IFSW
(14)STSW
(7)UNLOCK
(11)IFS
(5)BDSW
(15)SDC0
No. 6903-5/14
LV23000M
Description of the DI Control Data
No. Control block/data Description Related data
• Specifies the divisor used by the programmable dividers. This is a binary value with P15 as the MSB. The LSB depends on DVS and SNS.
(1)
Programmable
divider data
P0 to P15
DVS, SNS
Continued on next page.
DVS SNS LSB Divisor setting (N) Actual divisor
1 * P0 272 to 65535 The actual setting times 2 0 1 P0 272 to 65535 The actual setting 0 0 P4 4 to 4095 The actual setting
Note: When P4 is the LSB, bits P0 to P3 are ignored.
• Selects the input signal (FMIN or AMIN) to the programmable divider and switches the input frequency range.
DVS SNS Input Operating frequency range
1 * FMIN 10 to 160 MHz 0 1 AMIN 2 to 40 MHz 0 0 AMIN 0.5 to 10 MHz
(2)
Reference divider data
R0 to R3
• Data that selects the reference frequency (fref)
R3 R2 R1 R0 Reference frequency
0 0 0 0 25 kHz 0 0 0 1 25 kHz 0 0 1 0 25 kHz 0 0 1 1 25 kHz 0 1 0 0 12.5 kHz 0 1 0 1 6.25 kHz 0 1 1 0 3.125 kHz 0 1 1 1 3.125 kHz 1 0 0 0 5 kHz 1 0 0 1 5 kHz 1 0 1 0 5 kHz 1 0 1 1 1 kHz 1 1 0 0 3 kHz 1 1 0 1 15 kHz 1 1 1 0 PLL INHIBIT + X'tal OSC STOP 1 1 1 1 PLL INHIBIT
Note: PLL INHIBIT
• In this state, the programmable divider block and the IF counter block are stopped, FMIN, AMIN, and IFIN are pulled down (to ground), and the charge pump goes to the high­impedance state.
(3)
IF counter control data
CTE
GT0, GT1
• Measurement start data for the IF counter CTE = 1: Start the count.
= 0: Reset the counter.
• Determines the measurement time for the general-purpose counter.
GT0 GT1 Measurement time Wait time
0 0 4 ms 3 to 4 ms 0 1 8 ms 3 to 4 ms 1 0 16 ms 3 to 4 ms 1 1 32 ms 3 to 4 ms
IFS
(* : don’t care)
Loading...
+ 9 hidden pages