SANYO LV1100 Datasheet

Overview
The LV1100 is an audio signal-processing Bi-CMOS LSI that integrates input and output filters, a delay line (built­in memory), and a delay/reverb function with a maximum delay of 120 ms on a single chip. It also provides built-in fixed matrix (L+R, L–R) and front mixing (with level and phase switching) functions. A full complement of surround modes can be easily implemented by combining these functions.
Functions and Features
• Input switching (L+R, L–R, IN–A)
• On-chip memory (12K SRAM)
• Front adder (+3 dB, 0 dB, –3 dB, -)
• Input and output filters
• Input filter –7 kHz low-pass filter
• Output filter –5 kHz low-pass filter: switchable with a 3 kHz low-pass filter
• On-chip VDDcircuit
• Input and output muting function
• A simulated surround system can be easily implemented with only one chip.
• ADM A/D and D/A converters
• Variable delay times – Short mode; Maximum delay: 60 ms. Delay time
selectable from six delay times in 10-ms steps.
– Long mode; Maximum delay: 120 ms. Delay time
selectable from six delay times in 20-ms steps.
Package Dimensions
unit: mm
3067-DIP24S
Bi-CMOS LSI
Ordering number : EN5506
83196HA (OT) No. 5506-1/10
SANYO: DIP24S
[LV1100]
SANYO Electric Co.,Ltd. Semiconductor Bussiness Headquarters
TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110 JAPAN
Digital Surround Audio Signal-Processing IC
LV1100
Parameter Symbol Conditions Ratings Unit
Maximum supply voltage V
CC
max 12 V Allowable power dissipation Pd max Ta 70°C 420 mW Operating temperature Topr –25 to +70 °C Storage temperature Tstg –40 to +125 °C
Parameter Symbol Conditions Ratings Unit
Recommended supply voltage V
CC
9V
Operating supply voltage range V
CC
opg 8 to 10 V
Specifications
Absolute Maximum Ratings at Ta = 25°C
Allowable Operating Ranges at Ta = 25°C
No. 5506-2/10
LV1100
Electrical Characteristics at Ta = 25°C, VCC= 9 V, RL= 20 k, VIN= 300 mV and f = 1 kHz unless otherwise specified.
Parameter Symbol Conditions
Ratings
Unit
min typ max
Quiescent current I
CCO
15 28 42 mA
V
O
maxA
OUT-A, CLOCK FAST, THD = 10%
0.7 1.0 V
V
CC
= 8 V
Maximum output voltage
V
O
maxL OUT-L, THD = 1% (effect off), VCC= 8 V 1.6 V
V
O
maxR OUT-R, THD = 1% (effect off), VCC= 8 V 1.6 V
V
NO
AF
OUT-A, CLOCK FAST (5 kHz L.P.F)
–89 –80 dBV
JIS A, Rg = 10 k
VNOAS
OUT-A, CLOCK SLOW (3 kHz L.P.F)
–84 –75 dBV
JIS A, Rg = 10 k
Output noise voltage V
NO
L OUT-L (effect off), JIS A, Rg = 10 k –103 –95 dBV
V
NO
R OUT-R (effect off), JIS A, Rg = 10 k –103 –95 dBV
V
NO
LE OUT-L (effect –3 dB), JIS A, Rg = 10 k –88 –80 dBV
V
NO
RE OUT-R (effect –3 dB), JIS A, Rg = 10 k –88 –80 dBV
VGA OUT-A, CLOCK FAST –4 0 4 dB
Output level deviation VGL OUT-L (effect off) –2 0 2 dB
VGR OUT-R (effect off) –2 0 2 dB
THDAF
OUT-A, CLOCK FAST (5 kHz L.P.F):
0.3 1.0 %
400 to 30 kHz BPF
Total harmonic distortion
THDAS
OUT-A, CLOCK SLOW (3 kHz L.P.F):
0.6 1.5 %
400 to 30 kHz BPF THDL OUT-L (effect off): 400 to 30 kHz B.P.F 0.01 0.03 % THDR OUT-R (effect off): 400 to 30 kHz B.P.F 0.01 0.03 %
Parameter Symbol Conditions Ratings Unit
Control data
V
IL
0 to 1.5 V
Input low-level voltage Control data
V
IH
3.5 to 5.5 V
Input high-level voltage
Control Data
Test Circuit
Notes: 1. The items D1 through D10 in the figure indicate points that are switched by the serial data.
2. Use capacitors with good high-frequency characteristics for the capacitors on pins 7, 14, and 22. Also, connect 0.1-µF ceramic capacitors in parallel.
Note: The items D1 through D10 in the figure indicate points that are switched by the serial data.
Application Circuit Example
No. 5506-3/10
LV1100
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