SANYO LC9949G Datasheet
CMOS LSI
Ordering number : EN*5217
22896HA (OT) No. 5217-1/10
SANYO Electric Co.,Ltd. Semiconductor Bussiness Headquarters
TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110-8534 JAPAN
1/6" Optical Size EIA B/W
Solid-State Image Sensor
LC9949G
Overview
The LC9949G is a 1/6" optical size frame transfer type
CCD (charge-coupled device) solid-state image sensor
developed for use in black-and-white video cameras.
Features
• Effective number of pixels (total pixels): 384H × 492V
(410H × 500V)
• Number of optical black pixels:
Horizontal direction: Front: 5 pixels
Back: 21 pixels
Vertical direction: Front: 5 pixels
Back: 3 pixels
• Dummy bits: Horizontal direction: 4 pixels
• Horizontal resolution: 280 TV lines
• Supports miniature, compact camera designs.
• Package: 20-pin half-pitch transparent DIP
• Horizontal shift register: 5 V drive
• Supports variable-speed electronic shutter operation
Device Structure
• 1/6" type frame transfer CCD image sensor
• Unit cell size: 6.5 µm (H) × 3.8 µm (V)
• Chip size: 3.79 mm (H) × 4.44 mm (V)
• Parallel gate CCD sensor
• Built-in high-sensitivity output amplifier
Specifications
Absolute Maximum Ratings at Ta = 25°C
Package Dimensions
unit: mm
3218
Preliminary
[LC9949G]
Parameter Symbol Conditions Ratings Unit
V
DD
V
PW
= 0 V –0.3 to +18 V
V
GG
V
PW
= 0 V –0.3 to +5 V
Maximum supply voltage NSUB-PW –0.3 to +50 V
NSUB - ø1 to ø4,
–0.3 to +55 V
øS1 to øS4:
Horizontal clock pin øR V
PW
= 0 V –0.3 to +18 V
Other clock pins V
PW
= 0 V –15 to +18 V
Other pins V
PW
= 0 V –0.3 to +10 V
Operating temperature Topr –10 to +60 °C
Storage temperature Tstg –30 to +80 °C
Block Diagram
No. 5217-2/10
LC9949G
Pin Assignment
Pin Functions
No. 5217-3/10
LC9949G
Pin No. Symbol Function Pin No. Symbol Function
1 NSUB N-substrate 20 NSUB N-substrate
2 VPW P-well 19 øS4
3 ø4 18 øS1
Storage area clock
4 ø3
Image clock
17 øS2
5 ø2 16 øS3
6 ø1 15 øH1
Horizontal clock
7 øR Reset gate 14 øH2
8 V
DD
Supply voltage 13 V
OG
CCD output gate
9 V
OUT
CCD output 12 V
GG
Load gate
10 NSUB N-substrate 11 NSUB N-substrate
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