Sanyo LC898093KW Specifications

Ordering number : ENN*6615A

20802TN (OT)/11201RM (OT) No. 6615-1/14

Functions

• CD-ROM decoder/encoder functions

• CD decoder/encoder functions

• Pit and wobble CLV servo

• CAV audio functions

• ATAPI interface (includes the register block)

• Subcode encoder/decoder functions

• ATIP demodulator/ATIP decoder

• Supports BURN-Proof recording

• Write strategy function (CD-R/RW)

Features

• ECC and EDC correction/addition (decoding/encoding)
for CD-ROM data.

• ECC error correction/addition (decoding/encoding) for
subcode data

• Servo control implemented in a digital servo system
(decoding/encoding)

• CLV servo control using ATIP data (encoding)

• ATIP decoding function and CRC check function
(decoding/encoding)

• CIRC code generation and addition and EFM
modulation (encoding)

• CAV audio functions

• Provides 16× write for CD-R/RW due to write strategy

function

• Built-in ATAPI interface (with Ultra DMA 33 support)

• Supports 40× decoding and 16× encoding.

Clock frequency: 33.8688 MHz

• Transfer rates: Up to 16.6 MB/s (when 32× IORDY

used), up to 33 MB/s when Ultra DMA used. These
values apply when 16-bit 45 ns EDO DRAM is used.

• From 1 to 64 Mbits of buffer RAM can be used. (16-bit
data bus EDO DRAM)

• The user can freely set up the CD main channel, C2 flag,
and subcode areas in buffer RAM.

• Batch transfer function (Function for transferring the CD
main channel, C2 flag, subcode, and other data in a
single operation)

• Multi-transfer function (Function for automatically
transferring multiple block to the host in a single
operation)

• CAV audio functions

• Supports Ultra DMA modes 0, 1, and 2.

Preliminary

LC898093KW, 898093KL

SANYO Electric Co.,Ltd. Semiconductor Company

TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110-8534 JAPAN

40× Playback/16× Write CD-R/RW Encoder/Decoder IC

with Built-in ATAPI Interface

CMOS IC

Any and all SANYO products described or contained herein do not have specifications that can handle
applications that require extremely high levels of reliability, such as life-support systems, aircraft’s
control systems, or other applications whose failure can be reasonably expected to result in serious
physical and/or material damage. Consult with your SANYO representative nearest you before using
any SANYO products described or contained herein in such applications.

SANYO assumes no responsibility for equipment failures that result from using products at values that
exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other
parameters) listed in products specifications of any and all SANYO products described or contained
herein.

“BURN-Proof” stands for Proof against Buffer Under RuN
error, not for proof against burning.
“BURN-Proof” is a trademark of SANYO Electric Co., Ltd.

No. 6615-2/14

LC898093KW, 898093KL

Package Dimensions

unit: mm

3261-SQFP208J (28 × 28)

unit: mm

3264-LQFP208

28.0

31.2

0.15

0.2

3.56max

0.8

31.2

(0.5)

(1.25)

28.0

1

52

156 105

53

208

104

157

(3.2)

0.1

SANYO: SQFP208J (28 × 28)

[LC898093KW]

28.0

25.5

(0.5)

30.0

0.09

0.22

0.5

1.6max

25.5

30.0

0.5

28.0

0.10

(1.4)

1

52

156 105

53

208

104

157

SANYO: LQFP208

[LC898093KL]

Parameter Symbol Conditions Ratings Unit

Supply voltage

V

DD

5 max Ta ≤ 25°C –0.3 to +6.0 V

V

DD

3 max Ta ≤ 25°C –0.3 to +4.6 V

I/O voltages

V

I

5, VO5 Ta ≤ 25°C –0.3 to VDD5 + 0.3 V

V

I

3, VO3 Ta ≤ 25°C –0.3 to VDD3 + 0.3 V
Allowable power dissipation Pd max Ta ≤ 70°C 900 mW
Operating temperature Topr –30 to +70 °C
Storage temperature Tstg –55 to +125 °C
Soldering conditions (pins only) 10 seconds 260 °C

Specifications

Absolute Maximum Ratings at VSS= 0 V

Parameter Symbol Conditions

Ratings

Unit

min typ max

[I/O cells, 5.0 V power supply]

Supply voltage V

DD

5 4.5 5.0 5.5 V

Input voltage range V

IN

0 VDD5 V

[Internal cells, 3.3 V power supply]

Supply voltage V

DD

3 3.0 3.3 3.6 V

Input voltage range V

IN

0 VDD3 V

Allowable Operating Ranges at Ta = –30 to +70°C, VSS= 0 V

No. 6615-3/14

LC898093KW, 898093KL

Parameter Symbol Conditions

Ratings

Unit

min typ max

Input high-level voltage V

IH

TTL level inputs: (1)

2.2 V

Input low-level voltage V

IL

0.8 V

Input high-level voltage V

IH

TTL level inputs with built-in pull-up resistors: (4), (17)

2.2 V

Input low-level voltage V

IL

0.8 V

Input high-level voltage V

IH

TTL level inputs with built-in pull-down resistors: (16)

2.2 V

Input low-level voltage V

IL

0.8 V

Input high-level voltage V

IH

TTL level Schmitt trigger inputs: (0), (7)

2.4 V

Input low-level voltage V

IL

0.8 V

Input high-level voltage V

IH

TTL level Schmitt trigger inputs

2.4 V

Input low-level voltage V

IL

Built-in pull-up resistors: (9), (14)

0.8 V

Input high-level voltage V

IH

CMOS level Schmitt trigger inputs: (19)

0.7 V

DD

V

Input low-level voltage V

IL

0.3 V

DD

V

Input high-level voltage V

IH

CMOS level inputs with built-in pull-up resistors: (10)

0.7 V

DD

V

Input low-level voltage V

IL

0.3 V

DD

V

Analog input voltage V

ANI

(11) 1/4 V

DD

3/4 V

DD

V

Output high-level voltage V

OHIOH

= –12 mA: (20) VDD– 2.1 V

Output low-level voltage V

OLIOL

= 12 mA: (20) 0.4 V

Output high-level voltage V

OHIOH

= –4 mA: (21) VDD– 2.1 V

Output low-level voltage V

OLIOL

= 4 mA: (21) 0.4 V

Output high-level voltage V

OHIOH

= –8 mA: (3), (8) VDD– 2.1 V

Output low-level voltage V

OLIOL

= 8 mA: (3), (8) 0.4 V

Output high-level voltage V

OHIOH

= –2 mA: (2), (4), (6) VDD– 2.1 V

Output low-level voltage V

OLIOL

= 2 mA: (2), (4), (6) 0.4 V

Output low-level voltage V

OLIOL

= 2 mA: (5) 0.4 V

Output high-level voltage V

OHIOH

= –8 mA: (7), (12), (14), (15) VDD– 2.1 V

Output low-level voltage V

OLIOL

= 24 mA: (7), (12), (14), (15) 0.4 V

Output high-level voltage V

OHIOH

= –6 mA: (17), (18) 2.4 V

Output low-level voltage V

OLIOL

= 6 mA: (17), (18) 0.4 V

Analog output voltage V

ANO

(22) 1/4 V

DD

3/4 V

DD

V

Input leakage current I

IL

VI= VSS, VDD: (0), (1), (7), (9) –10 +10 µA

Output leakage current I

OZ

In the high-impedance output state: (2), (7), (8), (12), (13)

–10 +10 µA

(14), (15)

Pull-up resistance R

UP

(10) 50 100 200 kΩ

Pull-up resistance R

UP

(4), (5) 40 80 160 kΩ

Pull-up resistance R

UP

(9), (13), (14) 7 10 13 kΩ

Pull-up resistance R

UP

(15) 7 10 13 kΩ

Electrical Characteristics at Ta = –30 to +70°C, VSS= 0 V, VDD= 4.5 to 5.5 V

The applicable pin groups are listed on the following page.

No. 6615-4/14

LC898093KW, 898093KL

Applicable Pins

[INPUT]

(0) · · · · · · CS, RD, WR, RESET, WOBBLE, CS1FX, CS3FX, DIOR, DIOW, HRST, DA0 to DA2, DMACK
(9) · · · · · · DMACK
(1) · · · · · · TEST0 to TEST3, SUA0 to SUA7
(16) · · · · · TEST4
(10) · · · · · FG
(11) · · · · AD0, AD1, RREC, FE, TE, VREF, FR, OPP, CSS, PCKISTF, PCKISTP, EFMIN, EFMIN2, SLCIST1,

SLCIST2

(19) · · · · · WRITE

[OUTPUT]

(2) · · · · · · PDS1 to PDS3
(18) · · · · · RA0 to RA9, CAS0 and CAS1, RAS0 to RAS2, LWE, UWE, OE
(3) · · · · · · SSP2/1, RAPC, WAPC, H11T0, LDH, ATEST3/1, WDAT, NWDAT, EFMG, SHOCK, LOCK, EFMO
(5) · · · · · · INT0 to INT1, SWAIT
(6) · · · · · · LDON
(12) · · · · · INTRQ, IOCS16
(13) · · · · · IORDY
(15) · · · · · DMARQ
(20) · · · · · PCK2, SUBSYNC
(21) · · · · · DSLB
(22) · · · · · SDA0 to SDA2, TDO, FDO, SLDO, SPDO, JITC, LOUT, ROUT, PDO, RPO, SLDO, SLCO1 to SLCO3

[INOUT]

(4) · · · · · · D0 to D7
(17) · · · · · IO0 to IO15
(7) · · · · · · DD0 to DD15
(8) · · · · · · BIDATA, BICLK, ATIPSYNC, ACRCNG
(14) · · · · · DASP, PDIAG

Note: The XTAL0 pin is not specified in the DC characteristics.

The pull-up and pull-down resistors on pins (9), (13), (14), and (15) are disabled after a reset.

No. 6615-5/14

LC898093KW, 898093KL

De-scramble &

Buffering

Address generator

Microcontroller

RAM access

Address generator

Address generator

ECC & EDC

IDE I/F Block

based HISIDE

Address generator

Data output input I/F

Bus

Arbiter

&

DRAM

controller

External

Buffer

DRAM

Each Block
Bus control
signal

Each Block
Register
R0-R255

CD-DSP I/F

& SYNC
Detector

Digital Servo

&

CIRC EnDec

HOST

Micro

controller

decoder

PLL

&

Clock

generator

*8

DAC

*9

*13

*10

*6
*7

*3
*4
*5

CAV-Audio

Sub-code ECC

Address generator

*1
*2

Write Strategy

&

Link-position

*12

Sub-code I/F

de-interleve/interleve

Address generator

ATIP/CLV servo

ATIPSYNC

INT0, INT1

ZSWAIT

XTALCK0

XTAL0

Each Block

Data bus[0:7]

Address bus[0:21]

RAM
Data bus[0:15]

LC898093K

A13486

Block Diagram

*1 DSLB (pin96) to FR (pin123), CSS (pin126) to SPD (pin142), SHOCK (pin147) to PCK2 (pin155)
*2 SUBSYNC
*3 DD0 to DD15, DASP, PDIAG
*4 CS1FX, CS3FX, DA0 to DA2, DIOR, DIOW, DMACK
*5 DMARQ, HINTRQ, IOCS16, IORDY
*6 RD, WR, SUA0 to SUA7, CS
*7 D0 to D7
*8 IO0 to IO15

*9 RA0 to RA9, RAS0, RAS1, RAS2, CAS0, CAS1, OE, UWE, LWE
*10 WOBBLE, ATIPSYNC, BIDATA, BICLK
*12 WRITE, SSP2/1, RAPC, WAPC, H11T0, LDH, ATEST3, ATEST1, WDAT, NWDAT, EFMG
*13 LOUT, ROUT
**1 HISIDE (WD25C32) is made by WESTERN DIGITAL.