SANYO LC895994 Datasheet

Overview
The LC895994 is a CD-R LSI that provides a wide range of functions including CD-ROM decoding (including ECC) and encoding, subcode Q encoding (CRC addition) and decoding, CD encoding, ATIP decoding and CLV servo, and an IDE interface that includes the register block.
Features
• ATIP decoding and CRC checking for both encoding and decoding
• CLV servo control using ATIP data during encoding
• CIRC code insertion and EFM modulation during encoding
• Support for PCA random EFM output during encoding
• Access to buffer RAM from microcontroller via LC895994
• Built-in ATAPI (IDE) interface
• Speeds of 12× for decoding and 4× for encoding — Frequencies
Decoding: 17.2872 MHz Encoding: 17.2872 MHz without Write Strategy
support
69.1488 MHz with Write Strategy support
• IDE Transfer rate: 13.3 MB/s when using 16-bit data path 80-ns DRAM chips
• Buffer RAM sizes between 1 and 32 megabits (using 16­bit DRAMs)
• User control over sizes of CD main channel, C2 flag areas in buffer RAM
• Built-in batch transfer function for transferring entire CD main channel, C2 flag, or subcode area in a single operation
• Built-in multiblock transfer function for transferring multiple blocks in a single operation
Package Dimensions
unit: mm
3153A-QFP160E
CMOS IC
42098RM (OT) No. 5824-1/7
Preliminary
SANYO: QIP160E
[LC895994]
SANYO Electric Co.,Ltd. Semiconductor Bussiness Headquarters
TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110-8534 JAPAN
CD-R Encoder/Decoder LSI with
Built-in ATAPI (IDE) Interface
LC895994
Ordering number : EN*5824
No. 5824-2/7
LC895994
Parameter Symbol Conditions Ratings Unit
Maximum supply voltage V
DD
max –0.3 to +7.0 V
I/O voltage V
I
, V
O
–0.3 to VDD+ 0.3 V Allowable power dissipation Pd max Ta 70°C 600 mW Operating temperature Topr –30 to +70 °C Storage temperature Tstg –55 to +125 °C Solder resistance (Pins only) 10 seconds 260 °C
Specifications
Maximum Ratings at Ta = 25°C, VSS= 0 V
Parameter Symbol Conditions
Ratings
Unit
min typ max
Input high-level voltage V
IH
TTL levels, for pin types 1 and 7
2.2 V
Input low-level voltage V
IL
0.8 V
Input high-level voltage V
IH
TTL levels, for pin types 8 and 9, with pull-up 2.2 V resistors
Input low-level voltage V
IL
0.8 V
Input high-level voltage V
IH
TTL levels, for pin types 2 and 10, with 2.5 V Schmitt inputs
Input low-level voltage V
IL
0.6 V
Output high-level voltage V
OHIOH
= –2 mA, for pin type 6 VDD— 2.1 V
Output low-level voltage V
OLIOL
= 2 mA, for pin type 6 0.4 V
Output high-level voltage V
OHIOH
= –24 mA, for pin type 3 VDD— 2.1 V
Output low-level voltage V
OLIOL
= 24 mA, for pin type 3 0.4 V
Output high-level voltage V
OHIOH
= –2 mA, for pin types 4, 7, and 8 VDD— 2.1 V
Output low-level voltage V
OLIOL
= 2 mA, for pin types 4, 7, and 8 0.4 V
Output high-level voltage V
OHIOH
= –24 mA, for pin types 5 and 10 VDD— 2.1 V
Output low-level voltage V
OLIOL
= 24 mA, for pin types 5 and 10 0.4 V
Output low-level voltage V
OLIOL
= 2 mA, for pin type 9. 0.4 V
Input leakage current I
IL
VI= VSS, VDD, for pin types 1, 2, 7, and 10 –10 +10 µA
Output leakage current
When set to high-impedance output:
–10 +10 µA
For pin types 4, 5, 7, and 10.
Pull-up resistance R
UP
For pin types 8 and 9 40 80 160 k
DC Characteristics at Ta = –30 to +70°C, VSS= 0 V, VDD= 4.5 to 5.5 V
Parameter Symbol Conditions
Ratings
Unit
min typ max
Supply voltage V
DD
4.5 5.0 5.5 V
Input voltage range V
IN
0 V
DD
V
Allowable Operating Range at Ta = –30 to +70°C, VSS= 0 V
The pin types above refer to the following groups. Input
(1) SUA0 to SUA7, TEST0 to TEST6, RESET (2) BCK, BICLKIN, BIDATAI, C2PO, DA0 to DA2, LOCKIN, LRCK, PLLOUTIN, ROUGH, SBSO, SCOR, SDATA,
WFCK, CS, CS1FX, CS3FX, DIOR, DIOW, DMACK, HRST, RD, WR
Output (3) EFM (4) CLVMDP, CLVMDS, FSW (5) DMARQ, HINTRQ, IORDY, IOCS16 (6) DATACKO, EFMG, EFMGATE0 to EFMGATE3, EXCK, LOCK, MCK, MON, PSUBSYNC, RA0 to RA9,
SUBSYNC, CAS0, CAS1, ERROR, EXTACK, FRCK, LWE, OE, RAS0, RAS1, UWE
Input (7) ATIPSYNC, Reserve0 to Reserve5 (8) D0 to D7, IO0 to IO15 (9) INT0 to INT1, SWAIT (10)
DD0 to DD15, DASP, PDIAG
Block Diagram
No. 5824-3/7
LC895994
*2 BCK, SDATA, LRCK, C2PO *3 DD0 to DD15, DASP, PDIAG *4 CS1FX, CS3FX, DA0 to DA2, DIOR, DIOW, DMACK *5 DMARQ, HINTRQ, IOCS16, IORDY *6 RD, WR, SUA0 to SUA6, CS *7 D0 to D7 *8 IO0 to IO15
*9 RA0 to RA9, RAS0, RAS1, CAS0, CAS1, OE, UWE, LWE *10 PLLOUTIN, ROUGH, LOCKIN, BICLKIN, BIDATAIN *11 ERROR, LOCK, CLV+(MDP), CLV–(MDS), MON, FSW *12 SUBSYNC, PSUBSYNC, FRCK, EFM, EFMG, EFMGATE3 to EFMGATE0, EXTACK, DATACKO **1 HISIDE (WD25C32) is made by WESTERN DIGITAL.
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