SANYO LC895125W, LC895125Q Datasheet

Ordering number : EN*5241

22896HA (OT) No. 5241-1/11

Functions

CD-ROM ECC function, subcode read function, SCSI
interface

Features

• On-chip SCSI interface (with built-in SCAM selection
register)

• Supports 8× playback - Using ×16 80-ns DRAMs

• Supports 4× playback - Using ×16 80-ns DRAMs or ×8
70-ns DRAMs

• Transfer rates: 10 MB/s (synchronous), 5 MB/s
(asynchronous) using ×16 80-ns DRAMs

*1

• Transfer rates: 8.467 MB/s (synchronous), 4.2336 MB/s
(asynchronous) using ×8 70-ns DRAMs

*2

• Supports the connection of up to 32 Mb of buffer RAM
(using DRAM)

• The user can freely set the CD main channel, C2 flag,
and other areas in buffer RAM.

• Batch transfer function (transfers the CD main channel
and C2 flag data in a single operation)

• Multi-block transfer function (automatically transfers
multiple blocks in a single operation)

• High-speed transfer mode supports a 10-MB/s
(synchronous) transfer rate using ×8 80-ns DRAMs

• Subcode ECC function

Note: 1. For speeds up to 8× speed, use a SCSI master

clock frequency of 20 MHz.

Note: 2. For speeds up to 4× speed, use a SCSI master

clock frequency of 16.9344 MHz.

Package Dimensions

unit: mm

3182-QIP128E

unit: mm

3214-SQFP144

Preliminary

SANYO: QIP128E

[LC895125Q]

SANYO: SQFP144

[LC895125W]

LC895125Q, 895125W

SANYO Electric Co.,Ltd. Semiconductor Bussiness Headquarters

TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110-0005 JAPAN

CD-ROM Driver with On-Chip SCSI Interface and

Subcode Functions

CMOS LSI

Specifications

Absolute Maximum Ratings at VSS= 0 V

Parameter Symbol Conditions Ratings Unit

Maximum supply voltage V

DD

max Ta = 25°C –0.3 to +7.0 V

I/O voltages V

I

, V

O

Ta = 25°C –0.3 to VDD+ 0.3 V
Allowable power dissipation Pd max Ta ≤ 70°C 450 mW
Operating temperature Topr –30 to +70 °C
Storage temperature Tstg –55 to +125 °C
Soldering heat resistance (pins only) 10 seconds 260 °C

Allowable Operating Ranges at Ta = –30 to +70°C, VSS= 0 V

DC Characteristics at VSS= 0 V, VDD= 4.5 to 5.5 V, Ta = –30 to +70°C

SCSI Pin Input Characteristics

Sample Recommended Oscillator Circuit

R1 = 120 kΩ
R2 = 47 Ω
C1 = 30 pF
Crystal oscillator frequencies: XTALCK0 = 16.9344 MH

Z and XTALCK1 = 20 MHz

or:
R1 = 3.3 kΩ
R2 = None
C1 = 5 pF
Crystal oscillator frequency: XTALCK0 = 33.8688 MHz
If third harmonic overtones appear when using a 33.8688 MHz frequency with the
recommended circuit example, consult with the manufacturer of the crystal
element, since detailed values of the circuit constants will be influenced by the
printed circuit board.

No. 5241-2/11

LC895125Q, 895125W

Parameter Symbol Applicable Pins* (See below) min typ max Unit

Input high level voltage V

IH

1

All input pins other than (1), (3), and XTALCK

2.2 V

Input low level voltage V

IL

1 0.8 V

Input high level voltage V

IH

2

RESET, IO0 to IO15, D0 to D7, RD, CS, WR, WFCK,

2.5 V

Input low level voltage V

IL

2

SBSO, SCOR (1)

0.6 V

Input high level voltage V

IH

3

Input pins (3), ACK, and ATN

2.0 V

Input low level voltage V

IL

3 0.8 V

Output high level voltage V

OH

1

I

OH

1 = –2 mA: All output pins except (2), (3),

2.4 V

and XTALCK, IO0 to IO15, and D0 to D7

Output low level voltage V

OL

1

I

OL

1 = 2 mA: All output pins except (2), (3),

0.4 V

and XTALCK, IO0 to IO15, and D0 to D7

Output low level voltage V

OL

2

I

OL

2 = 2 mA: INT1, INT0, and ZSWAIT

0.4 V

(open-drain outputs with pull-up resistors) (2)

Output low level voltage V

OL

3

I

OL

3 = 48 mA: DB0, to DB7, DBP, BSY, I/O, MSG,

0.4 V

SEL, RST, REQ, C/D (3)

Input leakage current I

L

VI= VSS, VDD: All input pins –25 +25 µA

Pull-up resistance R

UP

IO0 to IO15, D0 to D7, INT0, INT1, ZSWAIT 40 80 160 kΩ

Parameter Symbol Conditions min typ max Unit

Supply voltage V

DD

4.5 5.0 5.5 V

Input voltage range V

IN

0 V

DD

V

Parameter Symbol Conditions min typ max Unit

Input threshold voltage

V

t + t1

VDD= 4.5 to 5.5 V

1.60 2.00 V

V

t – t1

0.80 1.11 V

Hysteresis width ∆V

tt1

VDD= 5.0 V 0.41 0.49 V

Block Diagram

Note: 1. WFCK, SBSO, SCOR

2. BCK, SDATA, LRCK, C2PO

3. DB0 to DB7, DBP, BSY, MSG, SEL, RST, REQ, I/O, C/D

4. ACK, ATN

5. ZRD, ZWR, SUA0 to SUA6, ZCS, CSCTRL

6. D0 to D7

7. IO0 to IO15

8. RA0 to RA16, ZRAS0, ZRAS1, ZCAS0, ZCAS1, ZOE, ZUWE, ZLWE

Note: IO8 to IO15 and RA9 to RA16 are the same pins.

No. 5241-3/11

LC895125Q, 895125W

Pin Functions (LC895125Q)

Type: I: Input pin, O: Output pin, B: Bidirectional pin, P: Power supply pin, NC: No connection pin

Note: 1. NC pins must be left open. Do not connect any signal to these pins.

2. Pin names that start with Z are negative-logic signals.

3. V

SS0

is the logic system ground and V

SS1

is the SCSI interface ground.

4. Applications that use DRAM must insert resistors in the CAS and RAS lines, connect capacitors between these lines and ground, and take any
other measures necessary to prevent undershoot in the DRAM related circuits.

5. Since these circuits include buffers that sink 48 mA, adequate noise prevention measures must be applied.

No. 5241-4/11

LC895125Q, 895125W

Pin No. Symbol Type Function

1 V

DD

P

2 V

SS0

P
3 RA5 O
4 RA6 O

Address outputs for the buffer RAM

5 RA7 O
6 RA8 O
7 RA9 (IO15) B

Address outputs for the buffer RAM or data I/O pins

8 RA10 (IO14) B

The pin circuits include pull-up resistors.

9 V

SS0

P

10 RA11 (IO13) B
11 RA12 (IO12) B
12 RA13 (IO11) B

Address outputs for the buffer RAM or data I/O pins

13 RA14 (IO10) B

The pin circuits include pull-up resistors.

14 RA15 (IO9) B
15 RA16 (IO8) B
16 IO7 B Buffer RAM data I/O. The pin circuit includes a pull-up resistor.
17 V

SS0

P

18 IO6 B
19 IO5 B
20 IO4 B

Buffer RAM data I/O.

21 IO3 B

The pin circuits include pull-up resistors.

22 IO2 B
23 IO1 B
24 IO0 B
25 V

SS0

P

26 TEST0 I
27 TEST1 I
28 TEST2 I Test pins. These pins must be connected to V

SS0

.
29 TEST3 I
30 TEST4 I
31 ZRESET I LSI reset. The LSI is reset on a 0 input.
32 V

DD

P

33 V

SS0

P
34 CSCTRL I Selects active-high or active-low for the microcontroller CS logic.
35 XTALCK0 I Crystal oscillator input
36 XTAL0 O Crystal oscillator output
37 V

SS0

P
38 D0 B
39 D1 B
40 D2 B
41 D3 B

Microcontroller data signals

42 D4 B
43 D5 B
44 D6 B
45 D7 B
46 V

SS0

P
47 ZSWAIT O WAIT signal output to the microcontroller
48 ZINT0 O Interrupt request output to the microcontroller (ECC side. Set with a register.)
49 V

DD

P
50 ZINT1 O Interrupt request output to the microcontroller (SCSI side. Set with a register.)

Continued on next page.