LC8772C8B/B2B/96B/80B
No.6842-3/24
(11) Re mo te control receiver circuit (connecte d to P73 / INT3 / T0 IN terminal)
-Noise rejection function (noise rejection filter’s time constant can be selected from 1 / 32 / 128 Tcyc)
(12) Watchdog timer
- The watching time period is determined by an external RC.
- Watchdog timer can produce interrupt or system reset
(13) Interrupts: 14 sources, 10 vectors
1) Three prior ity (low, high and highest) multiple interrupts are supporte d . During interrupt handl ing, an equal or
lower priority interrupt request is postponed.
2) If interrupt requests to two or more vector addresses occur at once, the higher priority interrupt takes precedence.
In the case of equal priority levels, the vector with the lowest address takes precedence.
No. Vector Selectable Level Interrupt signal
1 00003H X or L INT0
2 0000BH X or L INT1
3 00013H H or L INT2/T0L
4 0001BH H or L INT3/Base timer
5 00023H H or L T0H
6 0002BH H or L T1 L/T1H
7 00033H H or L SIO0
8 0003BH H or L SIO1
9 00043H H or L ADC/MIC
10 0004BH H or L Port 0
• Priority Level : X > H > L
• For equal prio rity levels, vector with lowest address takes precedence.
(14) Subroutine stack levels: 1024 levels max. Stack is located in RAM.
(15) Multiplication and division
- 16 bit × 8 bit (executed in 5 cycles)
- 24 bit × 16 bit (12 cycles)
- 16 bit ÷ 8 bit (8 cycles)
- 24 bit ÷ 16 bit (12 cycles)
(16) Oscillation circuits
- On-chip RC oscillation for system clock use.
- CF oscillation for system clock us e. (R f bu ilt in, Rd external)
- Crystal oscillation low speed system clock use. (Rf built in, Rd external)
(17) Standby function
- HALT mode
HALT mode is used to reduce power consumption. During the HALT mode, program execution is stopped but
peripheral circuits keep operating (some parts of serial transfer operation stop.)
1) Oscillation circuits are not stopped automatically.
2) Released by the system reset or interrupts.
-HOLD mode
HOLD mode is used to reduce power consumption. Program execution and peripheral circuits are stopped.
1) CF, RC and crystal oscillation circuits stop automatically.
2) Released by any of the following conditions.
(1) Low level input to the reset pin
(2) Specified level input to one of INT0, INT1, INT2
(3) Port 0 interrupt