- Maximum number of erase-write cycle: 50,000 times (Ta = +25°C) (with memory management program)
Note
The microcontroller will malfunction if the power supply voltage is less than the specified operable supply voltage. To
prevent a malfunction, the low voltage detect circuit should be connected externally, and the volta ge should always be set
to the proper level. If the power supply voltage becomes lower than the voltage which is detected by the low voltage detect
reset IC, then the m icrocont roller should be reset to restore stable opera tion. Use t he low volta ge detect re set IC which
detects the lowest specification voltage of the power supply.
We cannot ensure the integrity of the block data, if the microcontroller is reset while writing to the flash memory.
Therefore, in such a case, we recommend disabling any flash writing operation by user's program when the voltage
decreases to a level just above the voltage which is detected by the low voltage detect reset IC.
P10 Serial OUT0
P11 Serial IN0
P12 Serial Clock0
P13 Serial OUT1
P14 Serial IN1
P15 Serial Clock1
P16 Buzzer output
P17 Timer1 output (PWM output)
·4bit input port (pull-up resistor: P70 - P73)
·External in terrupt function
·Input only
·LCD controller
Common output terminals
Segment output terminals
·Externally boosted clock output terminal
·Input terminal for ceramic resonator
·Output terminal for ceramic resonator
·Input terminal for 32.768kHz X’tal
·Output terminal for 32.768kHz X’tal
·Input terminal for RC oscillation
Connect R between RCIN and RCOUT, and C between
RCIN and VSS.
·Output terminal for RC oscillation
Connect R between RCOUT and RCIN.
·Reset terminal
·Test terminal Leave open circuit.
Function Description
Continued.
No.6686-6/21
LC86F1216A
Terminal Pin No. Pad No.
NCT1, NCT2,
NCTC,
NCTD, NCTE
, OE,
CE
WE
EP, A10 119,46 113,44 I ·Memory test terminal Leave open circuit.
F/M_SEL 120 114 I ·Connect to VDD.
NC 36,37,38,
NCEXT 1 1 I ·Test terminal
10,9,
6,5
4
45,47,117 43,45 I ·Memory test terminal Pull up to VDD.
72,73,108,
109,144
10,9
6,5
4
- ·Unused terminal Le ave open circuit.
Input/
Output
- ·Test terminal Leave open circuit.
Connect this ter m inal to VSS.
Function Description
*Initial Port Status
Terminal Input/Output Pull-up Resistor Status
Port1 I Programmable pull-up resistor : OFF
Port3 I Programmable pull-up resistor : OFF
No.6686-7/21
System Bl ock Diagram
LC86F1216A
Base Timer
SIO0
Port 1
RAM (buffer)
ADDRESS (512bytes)
Address Register (8bits)
SIO1
CF
RC
X’tal
Clock
Generator
Noise Rejection Filter
Interrupt Control
Standby Control
Bus Interface
Port 7
INT0-3
Timer 0
Timer 1
RAM (512bytes)
IRPLA
Flash EEPROM Control
Flash EEPROM
PC
ROM
ACC
B Register
Display RAM (198bytes)
LCD Controller
LCD Driver
(33 commons×48 segments)
RAR
Stack Pointer
Port 3
EXT Register
C Register
ALU
PSW
No.6686-8/21
LC86F1216A
1. Absolute Maximum Ratings at Ta=+25°C, VSS=0V
Parameter Symbol Pins Conditions
Supply voltage VDDMAX VDD -0.3 to +6.0
Input voltage
Input/output
voltage
High
level
output
current
Peak
output
current
Total
output
current
Low
level
output
current
output
current
Total
output
current
Maximum power
consumption
Operating
temperature range
Storage
temperature range
VI(1) Port 71, 72, 73
RES
VI(2) VLCD -0.3 to +6.5
VO(1) C1 to C33
S1 to S48
VO(2) TEST1, TEST2, SUPCK -0.3 to VDD+0.3
VIO(1) Port 1, 3
Port 70
TEST1
IOPH(1) Port 1, 3
TEST1, TEST2, SUPCK
Σ
IOAH(1) Port 3
C1 to C33, S1 to S48
TEST1, TEST2, SUPCK
Σ
IOAH(2) Port 1 Total of all pins -25
IOPL(1) Port 1, 3
TEST1, TEST2, SUPCK
IOPL(2) Port 70 For each pin 15
Σ
IOAL(1) Port 1 Total of all pins 40
Σ
IOAL(2) TEST1, TEST2, SUPCK Total of all pins 40
Σ
IOAL(3) Port 70 Total of all pins 15
Σ
IOAL(4) C1 to C33, S1 to S48 Total of all pins 30
Σ
IOAL(5) Port 70 Total of all pins 15
Pdmax SQFP144
Topr 0 +50
Tstg -55 +125
Ratings
VDD[V] Min. Typ. Max.
Unit
V
-0.3 to VDD+0.3
-0.3 to VLCD+0.3 Output voltage
-0.3 to VDD+0.3
·CMOS output
-4
mA
·For each pin
Total of all pins -25
For each pin 20 Peak
Ta = 0°C to +50°C
400
mW
°
C
No.6686-9/21
LC86F1216A
2. Recommended Operating Range at Ta=0°C to +50°C, VSS=0V
Parameter Symbol Pins Conditions
Operating
supply voltage
range
Hold voltage VHD VDD RAM and register
LCD voltage VLCD VLCD 3.15-3.85 VDD 6.0
High level
input voltage
input voltage
Operation
cycle time
VDD(1) VDD
98µs tCYC 400µs
data are kep t i n
HOLD mode.
VIH(1) ·Port 1, 3
·Port 72, 73 (schmitt)
VIH(2) ·P70
Output disable 3.15-3.85 0.7VDD VDD
Output N-ch Tr.: OFF 3.15-3.85 0.7VDD VDD
port input/interrupt
·P71
(schmitt)
RES
VIL(1) ·Port 1, 3
·Port 72, 73 (schmitt)
VIL(2) ·P70
Output disable 3.15-3.85 VSS 0.3VDD Low level
Output N-ch Tr.: OFF 3.15- 3.85 VSS 0.3VDD
port input/interrup t
·P71
(schmitt)
RES
tCYC 3.15-3.85 0.98 400
Ratings
VDD[V] Min. Typ. Max.
3.15 3.85
2.0 3.85
Unit
V
µ
s
No.6686-10/21
LC86F1216A
V
3. Electrical Characteristics at Ta=0°C to +50°C, VSS=0V
Parameter Symbol Pins Conditions
High level
input
current
IIH(1) Port 1, 3 ·Output disable
·Pull-up MOS Tr.: OFF
·VIN=VDD (including
OFF state leak current of
output Tr.)
IIH(2) Port 7 without
pull-up MOS Tr.
·Output N-ch Tr.: OFF
·VIN=VDD (including
OFF state leak current of
output Tr.)
Low level
input
current
IIH(3)
IIH(4)
RES
, OE, WE
CE
IIL(1) Port 1,3 ·Output disable
VIN=VDD 3.15–3.85 1
VIN=VDD 3.15–3.85 1
·Pull-up MOS Tr.: OFF
·VIN=VSS (including OFF
state leak current of
output Tr.)
IIL(2) Port 7 without
pull-up MOS Tr.
·Output N-ch Tr.: OFF
·VIN=VSS (including OFF
state leak current of
output Tr.)
IIL(3)
RES
IIL(4) A10, EP, F/M_SEL
, OE, WE
CE
High level
output
voltage
VOH(1) Port 0, 1, 3: CMOS
output
TEST1, TEST2,
VIN=VSS 3.15–3.85 -1
VIN=VSS 3.15–3.85 -1
IOH=-0.1mA 3.15–3.85
SUPCK
Low level
output
voltage
VOL(1) Port 1,3
TEST1, TEST2,
SUPCK
·IOL=1mA
·IOL at any single pin is
not over 1mA.
VOL(2) Port 70 IOL=0.5mA 3.15–3.85 0.4
Pull-up
MOS Tr.
Rpu Port 1, 3,
Port 7
VOH=0.9VDD 3.15–3.85 20 60 120
resistance
Pull-down
Rpd A10, EP, F/M_SEL VOL=0.1VDD 3.15–3.85 25 50 100
MOS Tr.
resistance
Hysteresis
voltage
Pin
capacitance
VHIS Port 1, 3
Port 7
RES
CP All pins ·f=1MHz
Output disable 3.15–3.85
·Every other terminal is
connected to VSS.
·Ta=+25°C
Ratings
VDD[V] Min. Typ. Max.
3.15–3.85 1
Unit
µ
A
3.15–3.85 1
3.15–3.85 -1
3.15–3.85 -1
DD-0.5
V
3.15–3.85 0.4
kΩ
0.1VDD
V
3.15–3.85 10 pF
No.6686-11/21
LC86F1216A
4. Serial Input/Output Characteristics at Ta=0°C to +50°C, VSS=0V
Parameter Symbol Pins Conditions
Cycle tCKCY(1) 3.15-3.85 2
Low level
pulse width
High level
Input clock
pulse width
Cycle tCKCY(2) 3.15-3.85 2
Serial clock
Low level
pulse width
High level
Output clock
pulse width
Data set-up time tICK 3.15-3.85 0.4
Data hold time tCKI
Serial input
Output delay
time
(Using external
clock)
Output delay
time
Serial output
(Using internal
clock)
tCKL(1) 3.15-3.85 1
tCKH(1)
tCKL(2) 3.15-3.85
tCKH(2)
tCKO(1) ·SO0, SO1
tCKO(2) ·SO0, SO1
SCK0, SCK1 Refer to fi gure 5.
SCK0, SCK1 Refer to fi gure 5.
·SI0, SI1
·SB0, SB1
·SB0, SB1
·SB0, SB1
·Data set-up to
SCK0 and SCK1
·Refer to figure 5.
·Data hold from
SCK0 and SCK1
·Refer to figure 5.
·Data hold from
SCK0 and SCK1
·Refer to figure 5.
Ratings
VDD[V] Min. Typ. Max.
3.15-3.85 1
1/2tCYC
3.15-3.85
3.15-3.85 0.4
3.15-3.85
3.15-3.85
1/2tCYC
7/12tCYC
+1
1/3tCYC
+1
Unit
tCYC
µ
s
µ
s
5. Pulse Input Conditions at Ta=0°C to +50°C, VSS=0V
Parameter Symbol Pins Conditions
High/low level
pulse width
tPIH(1)
tPIL(1)
tPIH(2)
tPIL(2)
tPIH(3)
tPIL(3)
tPIL(4)
·INT0, INT1
·INT2/T0IN
·Refer to figure 6.
·INT3/T0IN
(1/1 is selected for
noise rejection
clock.)
·Refer to figure 6.
·INT3
(1/64 is selected
for noise rejection
clock.)
·Refer to figure 6.
·
RES
·Refer to figure 6.
·Interrupt acceptable
·Timer 0-countable
·Interrupt acceptable
·Timer 0-countable
·Interrupt acceptable 3.15-3.85 128
·Reset accept able 3.15-3.85 200
Ratings
VDD[V] Min. Typ. Max.
3.15-3.85 1
3.15-3.85 2
Unit
tCYC
µ
s
No.6686-12/21
LC86F1216A
6. Sample Current Co nsumption Character istics at Ta=0°C to +50°C, VSS=0V
The sample current consumption characteristics are the measurement result of Sanyo provided evaluation board.
The currents through the output transistors and the pull-up MOS transistors are ignored.
• Flash Memory Operation
Parameter Symbol Pins Conditions
Current
IDDOP(6)
consumption
during normal
operation
(Note 1)
IDDOP(7)
IDDOP(8)
IDDOP(9)
IDDOP(10)
• BIOS Program Operation
Parameter Symbol Pins Conditions
Current
consumption
during writing
to flash
memory
(Note 1)
IDDOP(11)
IDDOP(12)
·FmCF=6MHz by ceramic
VDD
resonator
·FsX’tal=32.768kHz by X’tal
·System clock: CF oscillation
·RC oscillation stops.
·FmCF=0Hz (No oscillatio n)
·FsX’tal=32.768kHz by X’tal
·System clock: RC oscillation
·FmCF=0Hz (No oscillatio n)
·FsX’tal=32.768kHz by X’tal
·System clock: X’tal
·RC oscillation stops.
·FmCF=6MHz by ceramic
VDD
resonator
·FsX’tal=32.768kHz by X’tal
·System clock: CF oscillation
·RC oscillation stops.
·FmCF=0Hz (No oscillation)
·FsX’tal=32.768kHz by X’tal
·System clock: RC oscillation
Ratings
OCR7
VDD[V] Min. Typ. Max.
1 8 20
3.15-3.85
0 2.0 4
1
2.5 5
3.15-3.85
0 200 50
0
1
450 75
0
Ratings
OCR7
VDD[V] Min. Typ. Max.
1 3.15-3.85 8 15
0 4.5 10
3.15-3.85
1
5 12
Unit
mA
µ
A
Unit
mA
*OCR7: Bit 7 of the oscillation control register
No.6686-13/21
• BIOS Program Operation
LC86F1216A
Parameter Symbol Pins Conditions
Current
IDDHALT(1)
consumption
in HALT
mode
(Note 1)
IDDHALT(2)
IDDHALT(3)
IDDHALT(4)
IDDHALT(5)
Current
IDDHOLD(1)
consumption
in HOLD
mode
(Note 1)
• Flash Memory Operation
·HALT mode
VDD
·FmCF=6MHz by ceramic
resonator
·FsX’tal=32.768kHz by X’tal
·System clock: CF oscillation
·RC oscillation stops.
·Refer to figure 7.
·HALT mode
·FmCF=0Hz (No oscillatio n)
·FsX’tal=32.768kHz by X’tal
·System clock: RC oscillation
·Refer to figure 7.
·HALT mode
·FmCF=0Hz (No oscillatio n)
·FsX’tal=32.768kHz by X’tal
·System clock: X’tal
·RC oscillation stops.
·Refer to figure 7.
VDD ·HOLD mode
·Refer to figure 7.
Ratings
OCR7
VDD[V] Min. Typ. Max.
Unit
1 3.15-3.85 2.5 5 mA
3.15-3.85
0 250 600
1
3.15-3.85
0 15 50
1
350 700
20 70
µ
A
µ
A
3.15-3.85 0.05 30
Parameter Symbol Pins Conditions
Current
consumption
in HALT
mode
(Note 1)
IDDHALT(6)
·HALT mode
VDD
·FmCF=6MHz by ceramic
resonator
·FsX’tal=32.768kHz by X’tal
·System clock: CF oscillation
Ratings
OCR7
VDD[V] Min. Typ. Max.
1 3.15-3.85 2.5 5 mA
Unit
·RC oscillation stops.
·Refer to figure 7.
IDDHALT(7)
IDDHALT(8)
·HALT mode
·FmCF=0Hz (No oscillatio n)
·FsX’tal=32.768kHz by X’tal
·System clock: RC oscillation
3.15-3.85
0 200 50
1
400 80
µ
A
0
0
·Refer to figure 7.
IDDHALT(9)
IDDHALT(10)
·HALT mode
·FmCF=0Hz (No oscillatio n)
3.15-3.85
0 15 50
1
20 70
µ
A
·FsX’tal=32.768kHz by X’tal
·System clock: X’tal
·RC oscillation stops.
·Refer to figure 7.
Note 1: The current through the o utput transistors, the pull-up MOS transistors, and the bleeder resistors for the display
power supply are ignored.
No.6686-14/21
LC86F1216A
7. LCD Driver Charact er istics at Ta=0°C to +50°C, VSS=0V
Parameter Symbol Pins, Conditions
Voltage drop
between Vx
and Ci
(x: 1-5)
(i: 1-3 3 )
Voltage drop
between Vx
and Ci
(x: 1-5)
(i: 1-3 3 )
Voltage drop
between Vx
and Si
(x: 1-5)
(i: 1-4 8 )
Voltage drop
between Vx
and Si
(x: 1-5)
(i: 1-4 8 )
V4 output
voltage
V3 output
voltage
V2 output
voltage
V1 output
voltage
VD1 ·-15µA (only on Ci terminal)
·LCD: ON
·1/5 bias
·V5=VDD
VD2 ·+15µA (only on Ci terminal)
·LCD: ON
·1/5 bias
·V5=VDD
VD3 ·-15µA (only on Si termi nal)
·LCD: ON
·1/5 bias
·V5=VDD
VD4 ·+15µA (only on Si termi nal)
·LCD: ON
·1/5 bias
·V5=VDD
VV4
VV3
VV2
VV1
·LCD clock fre quency=0Hz
·LCD: ON
·1/5 bias
·V5=VDD
·Refer to figure 9.
Ratings
VDD[V] Min. Typ. Max.
3.3 120
3.3 -120
3.3 120
3.3 -120
3.3
0.75VDD 0.8VDD 0. 85 V D D
3.3
0.55VDD 0.6VDD 0. 65 V D D
3.3
0.35VDD 0.4VDD 0. 45 V D D
3.3
0.15VDD 0.2VDD 0. 25 V D D
Unit
mV
V
Sample LCD Power Supply Characteristics at Ta=0°C to +50°C, VSS=0V
The sample current consumption characteristics are the measur ement result of Sanyo provided evaluation board.
Parameter Symbol Pins, Conditions
LCD Power
supply
ILCD1 ·LCD: ON
·1/5 bias
·VLCD=VDD
·V1-V5: open
·Refer to figure 8.
20kΩmode 3.3 15 29 60 µA
Ratings
VDD[V] Min. Typ. Max.
Unit
VCCR: LCD contrast control register
No.6686-15/21
LC86F1216A
Notes: • Since the circuit pattern affects the oscillation frequency, place the oscillation-related parts as close to the
oscillation pins as possible with the shortest possible pattern length.
• When using the ceramic resonator or the X’tal, please contact with the oscillator manufacturer for the circuit
parameters.
Recommended Oscillation Circuit and Characteristics
The oscillation circuit characteristics in the table below are based on the following conditions:
•
Recommended circuit parameters are verified by an oscillator ma nufacturer using a Sanyo provided oscillation evalua tion
board.
•
The characteristics are the results of the evaluation with the recommended circuit parameters connected externally.
Recommended Oscillation Circuit Parameters and Characteristics (Ta = 0°C to +50°C)
Frequency Manufacturer Oscillator
6MHz
32.768kHz
MURATA MANUFACTURI NG
CO., LTD.
CITIZEN WATCH CO., LTD.
CSA6.00MG
CFS-308
Recommended
circuit parameter
C1=33pF
C2=33pF
C3=20pF
C4=20pF
Operating supply
voltage range
3.15-3.85V
3.15-3.85V
Oscillation stabilizing
Typ. Max.
0.02ms 0.2ms
1.00s 3.00s
(*)
time
TmsCF
TssX’tal
(*) Note: The oscillation stabilizing time period is the time until the oscillation becomes stable after the VDD becomes higher
than the minimum operating voltage.
The oscillation circuit characteristics may differ by applications. For further assistance, please contact with the oscillator
manufacturer with the following notes in yo ur mind.
•
Since the oscillation frequency precision is affected by wiring capacity of the application board, etc., adjust the oscillation
frequency on the production board.
Since the oscillation circuit characteristics are affected by the noise, wiring capacity, etc., refe r to the following notices.
•
The distance between the clock I/O terminal and external parts should be as short as possible.
•
The capacitors’ VSS should be allocated close to the microcontroller’s GND terminal and be away from other GND.
•
The signal lines with rapid state changes or the signal line with large amplitude such as middle withstand voltage port or LCD
driver output should be allocated away from the clock oscillation circuit.
•
The signal lines with large current should be allocated away from the oscillation circuit.
No.6686-17/21
LC86F1216A
g
Power Supply
RES
Reset Tim e
VDD
VDD Limit
0V
RC Oscillation
TmsCF
CF1, CF2
TssXtal
XT1, XT2
Operation Mode
Reset Unfixed Instruction Execution Mode
Reset Time and Oscillation Stabilization
HOLD Release
Si
nfal
Valid
RC Oscillation
TmsCF
CF1, CF2
TssXtal
XT1, XT2
Operation Mode
HOLD
Instruction Execution Mode
HOLD Release Signal and Oscillation Stabilizing Time
Figure 3 Oscillation Stabilizing Time.
No.6686-18/21
LC86F1216A
A
p
,
VDD
low voltage detect reset IC
R
RES
RES
RES
C
OUT
VDD
VCC
GND
Note: Use the low voltage detect reset IC which
resets the microcontroller when the power
supply voltage drops below the limit of the
operable supply voltage.
Figure 4 Reset Circuit.
0.5VDD
C Timing Measurement Point
SCK0
SCK1
tCKL tCKH
tCKCY
tICK tCKI
VDD
1kΩ
SI0
SI1
SO0, SO1
SB0
SB1
tCKO
F
50
Test Load
Figure 5 Serial Inpu t Test Condition.
No.6686-19/21
LC86F1216A
tPIL
tPIH
Figure 6 Pulse Input Timing Condition.
VDD
A
VDD
OPEN
VDD
SUPCK
RCIN
RCOUT
CF1 VSS CF2 XT1 XT2
VSS
V5
V4
V3
V2
V1
VLCD
OPEN
OPEN
VDD
SUPCK
RCIN
RCOUT
CF1 VSS CF2 XT1 XT2
VSS
V5
V4
V3
V2
V1
VLCD
A
Figure 7 Current Consumption Measurement Circuit. Figure 8 LCD Current Measurement Circuit.
OPEN
VDD
VDD
SUPCK
VLCD
RCIN
RCOUT
CF1 VSS CF2 XT1 XT2
V5
V4
V3
V2
V1
VDD
OPEN
VDD
V
VSS
Figure 9 V1 - V4 Terminal Output Voltage Measurement Circuit.
!"
Evaluation Sample
The evaluation sample of LC86F1216 is provided in QIC144 (package). Take note that the package size will be a little
different from the one made in mass-production.
No.6686-20/21
LC86F1216A
No.6686-21/21
PS
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