Ordering number : EN4659
CMOS IC
LC85632
Digital Alarm Clock
Overview
The LC85632 is a multi-function digital clock IC that in addition to providing current time display supports a wide range of functions, including an alarm function, a sleep function, a calendar function, and a function to turn connected equipment on and off. Furthermore, the LC85632 provides a simpler user interface than that of earlier Sanyo products.
Applications
•Alarm clocks
•Clock radios
Functions
•Current time display
•Two independent alarm functions with snooze function
•Sleep timer function (up to 90 minutes)
•Calendar function
One year calendar (January 1 to December 31) that can display leap year’s day (February 29)
Package Dimensions
unit: mm
3196-DIP30SD
[LC85632]
SANYO: DIP30SD
Any and all SANYO products described or contained herein do not have specifications that can handle applications that require extremely high levels of reliability, such as life-support systems, aircraft’s control systems, or other applications whose failure can be reasonably expected to result in serious physical and/or material damage. Consult with your SANYO representative nearest you before using any SANYO products described or contained herein in such applications.
SANYO assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all SANYO products described or contained herein.
SANYO Electric Co.,Ltd. Semiconductor Bussiness Headquarters
TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110-8534 JAPAN
O3098HA (OT)/71093JN B8-0531 No. 4659-1/34
LC85632
Pin Assignment
No. 4659-2/34
LC85632
Pin Functions
No. |
Pin |
I/O |
Internal |
equivalent |
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Pin function |
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Handling when unused |
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circuit |
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1 |
AM & PM |
O |
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LED output pins |
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Open |
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2 |
10’SHRag & d |
O |
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No. |
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Pin |
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Drive phase 1 |
Drive phase 2 |
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3 |
10’SHRb & e |
O |
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VDD |
1 |
AM & PM |
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AM |
PM |
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2 |
10’SHR ag & d |
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10’SHR ad |
10’SHR g |
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4 |
10’SHRc & HRe |
O |
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3 |
10’SHRb & e |
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10’SHR e |
10’SHR b |
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5 |
HRb & g |
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4 |
10’SHRc & HRe |
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HR e |
10’SHR c |
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6 |
HRc & d |
O |
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5 |
HRb & g |
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HR g |
HR b |
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7 |
HRa & f |
O |
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6 |
HRc & d |
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HR d |
HR c |
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8 |
10’SMIN a & f |
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7 |
HRa & f |
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HR f |
HR a |
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8 |
10’SMIN a & f |
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10’SMIN a |
10’SMIN f |
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9 |
10’SMIN b & g |
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9 |
10’SMIN b & g |
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10’SMIN b |
10’SMIN g |
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10 |
10’SMIN c & d |
O |
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10 |
10’SMIN c & d |
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10’SMIN c |
10’SMIN d |
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11 |
10’SMINe & MINe |
O |
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11 |
10’SMINe & MINe |
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MIN e |
10’SMIN e |
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12 |
MIN b & g |
O |
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12 |
MIN b & g |
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MIN g |
MIN b |
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13 |
MIN c & d |
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MIN d |
MIN c |
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13 |
MIN c & d |
O |
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14 |
MIN a & f |
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MIN f |
MIN a |
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14 |
MIN a & f |
O |
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15 |
COLON |
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COLON |
— |
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15 |
COLON |
O |
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16 |
ALM INDICATOR |
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ALM-A |
ALM-B |
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16 |
ALM INDICATOR |
O |
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(VDD – 15 V breakdown voltage) |
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22 |
RADIO OUTPUT |
O |
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Outputs a DC voltage. This pin is controlled by the inputs to Open |
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the MANUAL & SLEEP pin (pin 26). It operates as a toggle. |
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VDD |
During normal operation it outputs a low level (high |
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impedance). |
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MANUAL & SLEEP pin input level |
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VDD |
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OPEN |
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VSS |
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RADIO OUT |
pin output level |
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(when pulled down to VSS) |
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VDD |
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VSS |
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(Normal breakdown voltage) |
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23 |
ALM-A OUTPUT |
O |
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Output alarm signals |
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Open |
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24 |
ALM-B OUTPUT |
O |
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ALM-A OUTPUT: Alarm A |
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VDD |
ALM-B OUTPUT: Alarm B |
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The output waveform is shown below.
During normal operation these pins output a low level (high impedance).
ALM-A OUTPUT and ALM-B OUTPUT pin output levels (summary diagram)
* ALM-A OUTPUT (2400 Hz)
VDD
VSS
* ALM-B OUTPUT (1200 Hz)
VDD
VSS
Output start
(Normal breakdown voltage)
Continued on next page.
No. 4659-3/34
LC85632
Continued from preceding page.
No. |
Pin |
I/O |
Internal |
equivalent |
Pin function |
Handling when unused |
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20 |
TIME SET INPUT |
3I |
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Input pin that starts the setting/update of the current time, |
Open |
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VDD |
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the alarm time, or the calendar date. Normally left open |
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(NOP). |
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H |
The application of a high level is taken as a + input, |
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which increases the value of the setting, and a low is taken |
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L |
as a – input, which decreases the value of the setting. |
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H:High threshold input
L: Low threshold input
21 |
CAL DISP & |
3I |
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Input pin for calendar display and snooze. |
Open |
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SNOOZE |
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Normally left open. When a high level is applied the |
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VDD |
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calendar displays the day and month, and when a low level |
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is applied the calendar displays the month and day. |
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H |
However, if an alarm signal is being output from either |
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ALM-A OUTPUT or ALM-B OUTPUT (pin 23 or 24) the |
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L |
calendar is not displayed, but rather a snooze operation is |
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started. |
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H: High threshold |
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input |
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25 |
ALM-A/B DISP & SEL |
3I |
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L: Low threshold |
Input pin for switching between alarm mode and current |
Open |
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input |
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time mode. Normally left open. When a high level is applied, |
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the current time setting for alarm A is displayed, and when |
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a low level is applied, the current time setting for alarm B is |
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displayed. In either case, the time setting and the operation |
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enable/disable state can be changed. |
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26 |
MANUAL & SLEEP |
3I |
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Input pin for setting the RADIO OUTPUT pin (pin 22) output |
Open |
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control and the sleep function time. Normally left open. |
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When a high level is applied the RADIO OUTPUT goes |
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high. This pin can also be used for setting the sleep |
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function time. When a low level is applied the RADIO |
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OUTPUT goes low. When either a low level or a high level |
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is applied, any alarm output in progress will be stopped. |
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Continued on next page. |
No. 4659-4/34
LC85632
Continued from preceding page.
No. |
Pin |
I/O |
Internal equivalent |
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circuit |
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28 |
MODE SELECT |
3I |
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VDD |
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H |
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L |
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29 |
RT-TIME |
3I |
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SET/DIMMER |
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H: High threshold |
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input |
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L: Low threshold |
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input |
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19 CR OSC |
I/O |
VDD
External RC constant circuit
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Pin function |
Handling when unused |
Input pin for switching the operating mode. |
Either left open, connected |
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Switches the display mode and the clock input to the |
to VDD, or connected to |
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50/60 Hz INPUT pin (pin 27). |
ground. |
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High: |
50 Hz/24 hour display |
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Open: |
60 Hz/12 hour display |
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Low: |
50 Hz/12 hour display |
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Input pin for switching the enabled/disabled state for setting |
Open |
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the time. |
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Normally left open. |
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High: |
Current time display/current time setting mode |
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Open: |
Current time display/current time setting disabled |
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Low: |
Dimmed display/current time setting disabled |
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Connection pin for external RC circuit. |
Connected to VDD |
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An oscillator circuit with a frequency of 4800 Hz can be |
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formed using the following R and C values. |
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R = 68 kΩ |
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C = 4700 pF |
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17 |
VSS |
I |
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— |
Power supply pins. |
— |
30 |
VDD |
I |
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VSS = 0 V |
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VDD = +5 V (standard) |
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18 |
TEST |
3I |
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LSI test pin. |
Open |
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VDD |
Normally left open. |
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H |
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L
H:High threshold input
L: Low threshold input
27 |
50/60 Hz INPUT |
I |
Input pin for the 50/60 Hz input for the clock. |
(Schmitt input)
Note: • “3I” is an abbreviation for “three value input pin.” The inputs to these pins can be either high, open, or low. These pins areleft open during normal use.
• NOP: “No operation”
No. 4659-5/34
LC85632
Three Value Input Circuits: H: High level, M: Open, L: Low level, NOP: No operation
• MODE SELECT
Input level |
Mode |
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H |
50 Hz/24 hour display |
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M |
60 Hz/12 hour display |
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L |
50 Hz/12 hour display |
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• TIME SET INPUT
Input level |
Mode |
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H |
Up |
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M |
NOP |
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L |
Down |
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• RE-TIME SET/DIMMER
Input level |
Mode |
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H |
Current time display/current time setting mode |
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M |
Current time display/NOP |
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L |
Dimmed display/NOP |
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• CAL DISP & SNOOZE
Input level |
Mode |
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H |
Calendar display (day·month)/calendar setting/snooze on |
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M |
Current time display/NOP |
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L |
Calendar display (month·day)/calendar setting/snooze on |
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• ALM-A/B DISP & SEL
Input level |
Mode |
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H |
Alarm A setting display/setting |
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M |
Current time display/NOP |
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L |
Alarm B setting display/setting |
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• MANUAL & SLEEP
Input level |
Mode |
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H |
ON input/sleep-in |
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M |
Current time display/NOP |
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L |
OFF input |
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• TEST
Input level |
Mode |
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H |
Illegal setting |
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M |
Normal operation |
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L |
LED test |
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No. 4659-6/34
LC85632
Specifications
Absolute Maximum Ratings at Ta = 25°C, VSS = 0 V
Parameter |
Symbol |
Applicable pin |
Conditions |
Ratings |
Unit |
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Maximum power supply voltage |
VDDmax |
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–0.3 to +7.0 |
V |
Input voltage |
VIN(1) |
All input pins other than the |
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–0.3 to VDD + 0.3 |
V |
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50/60 Hz INPUT pin |
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VIN(2) |
50/60 Hz INPUT |
Pin voltage |
–0.3 to VDD + 0.3 |
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With a 100 kΩ currentlimiting |
VDD – 12 to VDD + 12 |
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resistor inserted in the input, at |
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that resistor’s terminal. |
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Input clamping current |
IIN |
50/60 Hz INPUT |
With a 100 kΩ limiting resistor |
–0.4 to +0.4 |
mA |
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inserted in the input. |
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Output voltage |
VOUT(1) |
CR OSC |
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–0.3 to VDD + 0.3 |
V |
Output voltage |
VOUT(2) |
RADIO OUTPUT |
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–0.3 to VDD + 0.3 |
V |
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ALM-A OUTPUT |
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ALM-B OUTPUT |
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Output voltage |
VOUT(3) |
LED SEGMENT output pins |
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VDD – 15 to VDD + 0.3 |
V |
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(pins 1 to 16) |
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Total output current |
∑ ILED |
Total for the LED |
The average value of the |
–280 to 0 |
mA |
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SEGMENT output pins |
effective current value within |
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(pins 1 to 16) |
a single display cycle |
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according to the 50 or 60 Hz |
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frequency. |
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Maximum power dissipation |
Pdmax |
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Ta = –30 to +70°C |
700 |
mW |
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Ambient temperature: operating |
Topr |
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–30 to +70 |
°C |
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Ambient temperature: storage |
Tstg |
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–55 to +125 |
°C |
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Allowable Operating Ranges at Ta = –30 to +70°C, VSS = 0 V
Parameter |
Symbol |
Applicable pin |
Conditions |
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Ratings |
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Unit |
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min |
typ |
max |
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Operating power supply voltage |
VDD |
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4.0 |
5.0 |
6.0 |
V |
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Input high level voltage |
VIH(1) |
CR OSC |
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0.75 VDD |
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VDD |
V |
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Input low level voltage |
VIL(1) |
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VSS |
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0.25 VDD |
V |
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Input high level voltage |
VIH(2) |
TIME SET INPUT |
The intermediate is the |
VDD – 0.5 |
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VDD |
V |
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CAL DISP & SNOOZE |
open pin state. |
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ALM-A/B DISP & SEL |
The rated values apply |
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Input intermediate level voltage |
VIM(2) |
1/2 VDD – 0.5 |
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1/2 VDD + 0.5 |
V |
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MANUAL & SLEEP |
when an external signal |
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MODE SELECT |
is applied. |
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Input low level voltage |
VIL(2) |
RT-TIME SET/DIMMER |
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VSS |
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VSS + 0.5 |
V |
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TEST |
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Input high level voltage |
VIH(3) |
50/60 Hz INPUT |
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VDD – 0.5 |
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VDD + 0.3 |
V |
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Input low level voltage |
VIL(3) |
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VSS |
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VDD – 3.0 |
V |
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Operating frequency |
fOP |
50/60 Hz INPUT |
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1 |
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2000 |
Hz |
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Input level hold time |
tH |
All three value input pins |
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10 |
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ms |
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Input chattering time |
tC |
All three value input pins |
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10 |
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ms |
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No. 4659-7/34
LC85632
Electrical Characteristics at Ta = 25°C, VDD = 5 V, VSS = 0 V
Parameter |
Symbol |
Applicable pin |
Conditions |
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Ratings |
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Unit |
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min |
typ |
max |
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Output high level current |
IOH(1) |
10’ SHRag & d |
Output on, |
(Note 1) |
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–32 |
mA |
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VOUT = VDD – 2.0 V |
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Output off leakage current |
IOF(1) |
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Output off, |
–20 |
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µA |
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VOUT = VDD – 12 V |
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Output high level current |
IOH(2) |
AM & PM |
Output on, |
(Note 2) |
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–16 |
mA |
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10’SHRb & e |
VOUT = VDD – 2.0 V |
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10’SHRc & HRe |
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HRb & g |
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HRc & d |
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HRa & f |
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10’SMIN a & f |
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10’SMIN b & g |
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10’SMIN c & d |
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10’SMINe & MINe |
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MIN b & g |
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MIN c & d |
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MIN a & f |
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Output off leakage current |
IOF(2) |
COLON |
Output off, |
–20 |
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µA |
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ALM INDICATOR |
VOUT = VDD – 12 V |
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Output high level current |
IOH(3) |
RADIO OUTPUT |
Output on, |
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–2 |
mA |
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ALM-A OUTPUT |
VOUT = VDD – 2.0 V |
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Output off leakage current |
IOF(3) |
ALM-B OUTPUT |
Output off, |
–10 |
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µA |
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VOUT = VSS |
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Input high level current |
IIH(2) |
CR OSC |
VIN = VDD |
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10 |
µA |
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Input low level current |
IIL(2) |
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VIN = VSS |
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–2 |
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mA |
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Input high level current |
IIH(3) |
TIME SET INPUT |
VIN = VDD |
10 |
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100 |
µA |
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CAL DISP & SNOOZE |
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ALM-A/B DISP & SEL |
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MANUAL & SLEEP |
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Input low level current |
IIL(3) |
VIN = VSS |
–100 |
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–10 |
µA |
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MODE SELECT |
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RT-TIME SET/DIMMER |
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TEST |
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Pull-up resistance |
RPU |
TIME SET INPUT |
VIN = 1/2 VDD |
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1.0 |
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MΩ |
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CAL DISP & SNOOZE |
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ALM-A/B DISP & SEL |
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MANUAL & SLEEP |
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Pull-down resistance |
RPD |
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0.8 |
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MΩ |
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MODE SELECT |
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RT-TIME SET/DIMMER |
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TEST |
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Oscillator stability |
fS |
CR OSC (Note 2) |
VDD = 5.0 V |
–10 |
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+10 |
% |
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Oscillator precision |
fA |
CR OSC (Note 2) |
VDD = 5.0 V |
–10 |
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+10 |
% |
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Oscillator frequency |
fOSC |
CR OSC |
R = 91 kΩ ±1% |
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4800 |
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Hz |
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C = 3300 pF ±5% |
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Initial reset power supply voltage |
VDET |
VDD |
Power supply voltage |
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2.5 |
4.0 |
V |
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VSS |
range when initial reset |
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operates. |
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Current dissipation (operating) |
IDD |
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With no output load |
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2 |
mA |
Note: 1. In addition to not exceeding the total output current ΣILED (from the absolute maximum ratings table), the segment output currents are allowed the following values within a 700 mW total power dissipation range.
10’SHRag & d: Up to –78 mA Others: Up to –39 mA
Current flowing out of the IC is expressed with negative values, and current flowing into the IC is expressed with positive values.
2.The total variation in the oscillator frequency will be the sum of the precision and the stability. That is, the limiting values for the oscillator frequency variation fall within the range from fosc - 19% to fosc + 21%.
No. 4659-8/34
LC85632
Functional Description
Segment Output
This IC can directly drive with its 16 segment pins duplex type LED panels that include colon and alarm indicators. However, since the total value of the LED drive current (∑ ILED) flowing into the LED panel is limited to its absolute maximum value, caution is required in design.
Figure 1 shows the correspondence between the LC85632 segment outputs and the LED panel. For example, pin 2 (the 10’SHRag & d pin) drives the segments ‘a’, ‘g’, and ‘d’ in the 10’SHR digit. Table 1 shows the correspondence between the drive phases and the segments that light.
Note that figure 1 is a generalized LED panel and not an exact representation of any particular product.
Figure 1 LED Panel and LED Segments
Table 1 Segment Lighting Correspondences for the Drive Phases
No. |
Pin |
Drive phase 1 |
Drive phase 2 |
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1 |
AM & PM |
AM |
PM |
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2 |
10’SHRag & d |
10’SHR ad |
10’SHR g |
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3 |
10’SHRb & e |
10’SHR e |
10’SHR b |
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4 |
10’SHRc & HRe |
HR e |
10’SHR c |
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5 |
HRb & g |
HR g |
HR b |
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6 |
HRc & d |
HR d |
HR c |
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7 |
HRa & f |
HR f |
HR a |
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8 |
10’SMIN a & f |
10’SMIN a |
10’SMIN f |
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9 |
10’SMIN b & g |
10’SMIN b |
10’SMIN g |
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10 |
10’SMIN c & d |
10’SMIN c |
10’SMIN d |
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11 |
10’SMINe & MINe |
MIN e |
10’SMIN e |
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12 |
MIN b & g |
MIN g |
MIN b |
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13 |
MIN c & d |
MIN d |
MIN c |
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14 |
MIN a & f |
MIN f |
MIN a |
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15 |
COLON |
COLON |
— |
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16 |
ALM INDICATOR |
ALM-A |
ALM-B |
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No. 4659-9/34
LC85632
Figure 2 shows the sections where LEDs are lit for each drive phase. This figure is based on the generalized drawing shown in figure 1, and the shaded sections show the segments that are lit by the corresponding phase.
Figure 2 LED Sections Lit by the Drive Phases
No. 4659-10/34
LC85632
Figure 3 shows actual wiring examples for 12 hour and 24 hour displays for the Tottori Sanyo, Ltd., SL-1042-30T LED panel. However, since the SL-1042-30T LED panel does not have an alarm A display LED, an external LED is used for alarm A display. Also, the calendar day/month display cannot be used with this circuit.
Figure 3 LED Panel Wiring Examples
No. 4659-11/34