Sanyo LC83010N Specifications

Ordering number:ENN3945A

CMOS IC

LC83010N, 83010NE

Audio Digital Signal Processor

Overview

The LC83010N, 83010NE is a single-chip digital signal
processor (DSP). It is designed for use in the application
fields such as a digital processing of audio signals.
The LC83010N, 83010NE CMOS processor has various
on-chip filtering circuits such as a graphic equalizer for
reproduction of sound quality. It also has simulation cir­cuit for reverberation (sound reflection and echo), so that
sound field with surround and delay can be created.

The LC83010N and LC83010NE are upgraded versions of
the LC83010 and the LC83010E. The LC83010N and
LC83010NE have a 64fs clock output that enables improved
interfacing with external A/D converters. TEST5 has been
renamed FS640/T5 and incorporates both the new clock
output and the original test output.

Features

LSI functions

• Dual Harvard Architecture: Enables simultaneous pro­cessing (multiply and addition) of stereo signals in a single
instruction cycle.
The LC83010N, LC83010NE processor has the follow­ing two independent units:

· Multiplier : 24 bits × 16 bits (fixed-point decimal)

· ALU : 32-bit arithmetic calculation, 24-bit arithmetic

and logical operations.

· ACCumulator (ACC) : 32 bits

· Temporal Registers (TMP0 to TMP7) : 32-bit for each

· Internal Memory Data RAM 128 × 24 bits

Coefficient RAM 256 × 16 bits
Constant ROM 256 × 24 bits

• Program memory Capacity (RAM) : 320 × 32 bits

• A variety of I/O interfaces.

· Audio signal I/O :

1 channel for input (applicable to various formats)
3 channel for output (applicable to up to 4 types of data
format)

· Surround DRAM access signal :
16 accesses/CH Max. (within 1 fs)
Up to 2 256K (64K × 4 bits) DRAMs or 1M (256K × 4
bits) DRAMs can be directly connected to this chip.

· Uses external DRAMS with RAS access times of 120
ns or lower.

· Serial input/output interface with a microcomputer.

Synchronous 8-bit serial input : 1

[Mail box (16 bits × 8) function available]

Synchronous 8-bit serial output : 1

• Interrupt function (Vectored interrupt with the INT pin)

• Stack Nesting Levels : 4

• On-chip Interval Timer :
12 bits (timer clock = sampling frequency)

• Cycle time : 108ns (sampling frequency = 48kHz)

• Single 5V power supply.

• Package : 64-pin DIPs (LC83010N).

80-pin QFPs (LC83010NE).

Note) When soldering QFP devices, do not use the solder

dip method.

• Evaluation chip : LC83EV010N (PGA100)

· Applications

· Graphic Equalizer

· Power calculation for spectrum analyzer display

· Sound field creation (using external DRAMs)

· 4 Speakers + REC output

Development Environment

• Software Tools

· Assembler

· Debugger with simulation

• Hardware Tools

· IBM PC-AT compatible machines or AX per sonal com­puters

· In Circuit Emulator (ICE)

Any and all SANYO products described or contained herein do not have specifications that can handle
applications that require extremely high levels of reliability, such as life-support systems, aircraft’s
control systems, or other applications whose failure can be reasonably expected to result in serious
physical and/or material damage. Consult with your SANYO representative nearest you before using
any SANYO products described or contained herein in such applications.

SANYO assumes no responsibility for equipment failures that result from using products at values that
exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges,or other
parameters) listed in products specifications of any and all SANYO products described or contained
herein.

SANYO Electric Co.,Ltd. Semiconductor Company

TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110-8534 JAPAN

O1001TN (KT)/N251JN KI No.3945–1/18

Package Dimensions

unit:mm

3071-DIP64S

[LC83010N]

57.2

0.95 0.48 1.78 1.01

Block Diagram

LC83010N, 83010NE

unit:mm

3174-QIP80E

3364

16.8

19.05

5.0max

3.2

0.25

321

4.0

0.51min

SANYO : DIP64S

17.2

[LC83010NE]

23.2

0.8 0.8

1.0

64

65

0.8

14.0

80

1.6

124

0.35

20.0

21.6

1.6

0.15

41

40

25

3.0max

2.7

0.8

SANYO : QIP80E

15.6

0.8

No.3945–2/18

Pin Assignments
(DIP64S)

LC83010N, 83010NE

(QIP80E)

Top view

No.3945–3/18

Pin Function

emaNniPO/I noitpircseDlanoitcnuF

VDD2,1
VSS2,1

1ISA
2ISA

1KCB
2KCB

IKCRL
OKCRL

OSA

KCBOA

KCWOA

Audio I/F (Interface)

DRAM I/F

Microcomputer I/F

Control pins

1FDTOA
2FDTOA

KCBFD

KCWFD
SAR
SAC

DAERD

TRWD

8ot0A
7ot0D

IS

KCIS
QRIS
KAIS

YDRS

OS

KCOS
QROS

KAOS

5ot0PO/I)rotsiserpu-lluppihc-nohtiw(stroptuptuO/tupnIesoprup-lareneG

1CSO
2CSO

O483SFOniptuptuosf483

TNII )rotsiserpu-lluppihc-nohtiw(niptupnitseuqertpurretnI

SERI )rotsiserpu-lluppihc-nohtiw(niptupniteseR

CLESI

5T/O46SF

LC83010N, 83010NE

I
I
I
I
I
O/I

I
O
O
O
O
O
O
O
O
O
O
O
O
O

O/I

I

I

I
O

I
O

I

I
O

I
O

4ot1TSET

I
O

)tuptuo

1tupnilairesatadoiduA
2tupnilairesatadoiduA

atad1ISArofniptupnikcolctiB

)RCybelbatcelesO/I(atad2ISArofniptupnikcolctiB

tuptuolairesatadoiduA

)sf84dnasf23rof(atadOSArofniptuptuokcolctiB

atadOSArofniptuptuokcolcdroW

)1ecneserphgihrof(atadoiduarofniptuptuolaireS
)2ecneserphgihrof(atadoiduarofniptuptuolaireS

)sf84dnasf23rof(atad2FDTOAdna1FDTOArofniptuptuokcolctiB

atad2FDTOAdna1FDTOArofniptuptuokcolcdroW
sMARDlanretxeotlangisSARrofniptuptuO
sMARDlanretxeotlangisSACrofniptuptuO

sMARDlanretxeotlangisdaeratadrofniptuptuO
sMARDlanretxeotlangisetirwatadrofniptuptuO

K46(sMARDlanretxeotslangissserddarofsniptuptuO × K652,7Aot0A:stib4 × )8Aot0A:stib4

.desuera7Dot0Dsnip,edomnoitarugifnocMARDelbuodehtnI.desu

)atadlairestib-8(retupmocorcimlortnocmorfatadlairesrofniptupnI

atadISrofniptupnikcolclaireS

tupniatadlairesrofniptupnilangistseuqeR

)atadlairestib-8(retupmocorcimgnillortnocaotatadlairesrofniptuptuO

atadOSrofniptupnikcolclaireS

tuptuoatadlairesrofniptupnilangistseuqeR

.noitarepolamrongnirudsretrevnocD/Alanretxeroftuptuokcolc

).ecruosrewopevitisopehtotdetcennocebdluohssnipesehT(snipylppusrewopV5+

).leveldnuorgehtotdetcennocebdluohssnipesehT(snipylppusrewopDNG

)atadlennahcR:L;atadlennahcL:H(langishsiugnitsidlennahcR/LrofniptupnI
)atadlennahcR:L;atadlennahcL:H(langishsiugnitsidlennahcR/LrofniptupnI

era3Dot0Dsnip,edomnoitarugifnocMARDelgnisehtnI.sMARDlanretxehtiwrefsnartatadrofsniptuptuo/tupnI

retupmocorcimamorflangistseuqertupniehtotesnopseregdelwonkcArofniptuptuO

refsnartatadafodneehtgnitacidniretupmocorcimgnillortnocamorflangisydaeRarofniptupnI

retupmocorcimamorflangistseuqertuptuoehtotesnopseregdelwonkcArofniptuptuO

)sf483(.ecruoslanretxenamorftupnikcolcrofrorotallicsolatsyrcahtiwnoitcennocrofniP

)edomtupnikcolclanretxeninepotfelebdluohs(rotallicsolatsyrcahtiwnoitcennocrofniP

redividlanretni(lanretni:H,)IKCRL(lanretxe:L;rotsisernwod-lluppihc-nohtiwniptupnitceleslangislennahcR/L

.leveldnuorgehtotdetcennocebdluohssnipeseht,yllamroN.sniptupnilangistseT

sf46asadnaedomtsetnituptuotsetasasnoticnuf5T/O46SF.tuptuotset/tuptuokcolcsf46.sniptuptuolangistseT

No.3945–4/18

Pin Configuration Types

noitacificepsleveL epyttiucriCemaNniP

tuptuolevelLTT

LC83010N, 83010NE

,KCWOAKCBOA,OSA

,2FDTOA,1FDTOA,OKCRL
,O483SF,8Aot0A,KCWFD

5T/O46SF

,TRWD,DAERD,SAC,SAR

levelmuidemSOMC

tuptuotnerruc

tupnittimhcS

tupnittimhcSlevelL IKCRL,2ISA,1ISA,1KCB

tupnilamroN 4ot1TSET

rotsiser

rotsisernwod

pu-lluplanretnihtiwtupnI

-lluplanretnihtiwtupnI

KAIS,KAOS,OS

YDRS,QRIS

TNI,SER

CLES

,QROS,KCIS,IS,KCOS

tuptuolevelLTT

tupnittimhcSlevelwoL

tuptuo

tupnilamroN

tnerrucmuidemSOMuP

7Dot0D,2KCB

5Pot0P

No.3945–5/18

LC83010N, 83010NE

Specifications

Absolute Maximum Ratings at Ta = 25˚C, VSS = 0V

retemaraPlobmySsnoitidnoCsgnitaRtinUetoN

egatlovylppusmumixaMV

egatlovtuptuO

egatlovtupnIVNI– ot3.0VDD3.0+V

tnerructuptuokaeP

tnerructuptuoegarevA

noitapissidrewopelbawollAxamdP 006Wm

erutarepmetgnitarepOrpoT – 07+ot03

erutarepmetegarotSgtsT – 521+ot04

xam – 0.7+ot3.0V

DD

10Vtuptuo2CSO

20V2CSOehtroftpecxesniP – ot3.0VDD3.0+V

IPO1F/IMARD,F/IoiduA – 4+ot2Am1
IPO2F/IretupmocorciM – 01+ot2Am2
IPO35Pot0P – 01+ot5.0Am3
IAO1nipreP:F/IoiduA – 4+ot2Am4
IAO2nipreP:F/IMARD,F/IoiduA – 4+ot2Am5
IAO3nipreP:F/IretupmocorciM – 01+ot2Am2
IAO4nipreP:5Pot0P – 01+ot5.0Am3

∑IAO1
∑IAO2
∑IAO3
∑IAO4

Ta=–30 to +70˚C

egatlovehtotpU

ybdecudorp

noitallicso

latoT:F/IoiduA – 54+ot11Am4

latoT:F/IMARD,F/IoiduA – 51+ot4Am5

latoT:F/IretupmocorciM51+ot4Am2

latoT:5Pot0P – 03+ot3Am3

V

˚C
˚C

* When soldering QFP devices, do not use the solder dip method.
Allowable Operating Conditions at T a = –30 to +70˚C, V

retemaraPlobmySsnoitidnoC

External clock

input conditions

Self-oscillation

conditions

Crystal oscillation

egatlovylppusgnitarepOV

egatlovlevel-hgihtupnI

egatlovlevel-woltupnI

)emitelcycnoitcurtsnI(ycneuqerfgnitarepO

ycneuqerFf

htdiwesluP

emitesiR

emitllaF

ycneuqerfnoitallicsof

doirepgnizilbatsnoitallicsof

DD

VHI1F/IMARD,F/IoiduA4.2V6
VHI24ot1TSET,CLES,5Pot0PV7.0
VHI3F/IretupmocorciM,TNI,SER

VLI1F/IMARD,F/IoiduA 8.0V6
VLI24ot1TSET,CLES,5Pot0PV3.0
VLI3F/IretupmocorciM,TNI,SER

f

PO

)CYCT(

TXE

f

HTXE

f

LTXE

f

RTXE

f

FTXE

TXE

STXE

DD

zHk84:xam × 483 × 10.1

.1erugifeeS

.3erugifeeS sm

= 4.75V to 5.25V, VSS = 0V, unless otherwise noted

sgnitaR

nimpytxam

57.452.5V

DD

V57.0

DD

V52.0

.dewollasirorrenoitallicsoaltsyrc%1otpU

.nip1CSOehtotseilppA

)nepo:2CSO,tupni:1CSO(

.2erugifeeS,2CSO,1CSO 26.81zHM

71.21
)561(

71.2126.81zHM

02sn

V
V7

V

DD

V7

DD

26.81
sn)701(

01sn

tinUetoN

zHM
)sn(

emitputesataDt

Audio data input conditions

emitdlohataDt

elcyckcolctibrefsnarTt

htdiweslupkcolctibrefsnarTt

CYCB

WCB

.4erugifeeS

S

H

523sn

001sn

.snip2KCBdna1KCBehtotseilppA

57sn

57sn

Continued on next page.

No.3945–6/18