Sanyo LC7985ND Specifications

Ordering number: EN 3255C

CMOS LSI

LC7985NA, LC7985ND

LCD Controller/Driver

Overview

The LC7985 series devices are low-power CMOS ICs that
incorporate dot-matrix character generator, display con­troller and driver functions in a single device, making
them ideal for use in portable equipment containing LCD
displays.

The LC7985 series feature 5 × 7-pixel and 5 × 10-pixel
character fonts including either eight or four user-defined
characters, single-line and two-line display modes, built-in
drivers for displays up to eight characters in size, and easy
expansion to control displays of up to 80 characters by
adding LC7930N display drivers.

The LC7985 series interface directly to both 4-bit and 8­bit microcontrollers. The instruction set includes display
clear, cursor home, display ON/OFF, character blink, and
cursor and display shift instructions. The built-in reset cir­cuit automatically initializes the devices at power-ON.

The LC7985 series operate from a 5V supply and are
available in 80-pin QIPs.

Features

Package Dimensions

unit: mm

3044B - QFP80A

[LC7985NA]

unit: mm

3177 - QFP80D

[LC7985ND]

• Controller and driver for dot-matrix LCD displays

•5 × 7-pixel and 5 × 10-pixel character fonts

• 160, 5 × 7-pixel characters and 32, 5 × 10-pixel charac­ters in character generator ROM

• Eight, 5 × 7-pixel characters or four, 5 × 10-pixel char­acters in character generator RAM

• 80-character display data RAM

• Built-in drivers for 1-line × 8-character and 2-line × 8­character displays

• Easy expansion to 1-line × 80-character or 2-line × 40­character displays

• 4-bit or 8-bit microcontroller interface

• 11 microcontroller instructions

• Built-in reset circuit

• Built-in oscillator

• 5V supply

• 80-pin QIP

SANYO Electric Co., Ltd. Semiconductor Business Headquarters

TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110 JAPAN

70197HA (ID) / N062JN No. 3255—1/30

Pin Assignment

LC7985NA, LC7985ND

Block Diagram

Top view

No. 3255—2/30

Specifications

≥

≥

≥

≥

≥

−

−

−

−

−

µ

µ

µ

µ

LC7985NA, LC7985ND

Absolute Maximum Ratings

at Ta = 25 ± 2 ° C, V

SS

= 0V

Parameter Symbol Ratings Unit

Supply voltage range V
LCD drive supply voltage range

*1

V

1

Input voltage range V
Operating temperature range Topr
Storage temperature range Tstg

Note: *1. V

Allowable Operating Ranges

must obey the relationship : V

DD

V

V

DD

V

1

2

3

at Ta = − 20 to +75 ° C

V

V

4

5

Parameter Symbol Conditions

Supply voltage range V

Supply voltage

*1

Input high level voltage

Input low level voltage

DD

V

D5

V

D1

V

IH1

V

IH2

V

IH1

V

IH2

V

= V

- V

D5

DD

V

= V

- V

D1

DD

except OSCI 2.2 V
OSCI only V
except OSCI 0.6 V
OSCI only 1.0 V

DD

to V

I

5
1

5

V

DD

min typ max

4.5 5.5 V

1.5 V

- 1.0 V

DD

0.3 to +7.0 V

13.5 to V

0.3 to V
20 to +75 ° C

55 to +125 ° C

Ratings

+ 0.3 V

DD

+ 0.3 V

DD

V

x 0.25 V

D5

DD
DD

Unit

V
V

Note: *1. These voltages guarantee correct operation of the LC7985NA and LC7985ND. They do not guarantee correct operation of the LCD panel.

V

must also be observed.

LCD

Electrical Characteristics

at Ta = − 20 to +75 ° C, V

Parameter Symbol Conditions

Output high-level voltage

Output low-level voltage

Driver fall voltage

*1

Leakage current I
Pull-up current

*2

Current drain

External clock

*3

Frequency f
Duty cycle DUTY 45 50 55 %
Rise time t
Fall time t

V

V

V

V

V

V

I

I

OH1

OH2

OL1

OL2

COM

SEG

L

I

P

DD1

DD2

CP

R
F

= 0V, V

SS

= 5V ± 10%, unless otherwise noted

DD

Ratings

min typ max

I

= − 0.205mA

OH

Input / Output pins
I

= − 0.04mA Output pins 0.9V

OH

I

= 1.2mA

OL

Input / Output pins
I

= 0.04mA Output pins – – 0.1V

OL

I

= 0.05mA

d

All common pins
I

= 0.05mA

d

All segment pins
V

= V

to V

I

SS

DD

V

= 5V 50 125 250

DD

2.4––V

DD

––V

– – 0.4 V

– – 2.9 V

– – 3.8 V

––1

Ceramic resonator oscillator,
V

= 5V, f

DD

no output load

= 250kHz,

OSC

– 0.55 0.8

Feedback resistor oscillator,
V

= 5V, f

DD

no output load

= 270kHz,

OSC

– 0.35 0.6

125 250 350 kHz

– – 0.2
– – 0.2

DD

Unit

V

A
A

mA

s
s

No. 3255—3/30

LC7985NA, LC7985ND

−

Parameter Symbol Conditions

f

OSC1

Internal oscillator frequency

LCD display voltage

Note: *1. V
Note: *2. Applied pins are RS, R/W, and DB0 to DB7.

is the voltage from VDD, V1, V4 and V5 to the LCD common drive pins OC1 to OC16.

COM

V

is the voltage from VDD, V2, V3 and V5 to the LCD segment drive pins OC1 to OC40.

SEG

f

OSC2

V

LCD1

V

LCD2

Note: *3. External clock

Switching Characteristics

at Ta = -20 to +75 ° C, VDD = 5V ± 10%, VSS = 0V

Parameter Symbol Conditions

E cycle time t
E high-level pulsewidth t
E rise time t
E fall time t
RS and R/W to E setup time t
E to RS and R/W address hold time t
DB0 to DB7 to E data setup time t
Write cycle E to DB0 to DB7 data hold

time
Read cycle E to data valid delay time t
Read cycle E to DB0 to DB7 data hold

time
CP low-level pulsewidth t
CP high-level pulsewidth t
CP to LOAD setup time t
D to CP data setup time t
CP to D data hold time t
LOAD to M delay time t

ECYC

EW

ER
EF
SU
AH

DSU

t

DHW

DD

t

DHR

WL

WH
CSU
DSU

DH

DM

Ratings

min typ max

Unit

Ceramic filter oscillator 245 250 255
Feedback resistor oscillator,

= 91k Ω ± 3%

R

f

1/5 bias, V
1/4 bias, V

LCD
LCD

= V
= V

DD
DD

− V

V

5
5

190 270 350

4.6 – 11

3.0 – 11

kHz

Ratings

min typ max

1000 – – ns

450 – – ns

– – 25 ns
– – 25 ns

140 – – ns

10 – – ns

195 – – ns

10 – – ns

See measurement circuit. – – 320 ns

20 – – ns

800 – – ns
800 – – ns
500 – – ns
300 – – ns
300 – – ns

−

1000 – 1000 ns

Unit

V

Reset characteristics at Ta = -20 to +75 ° C

Parameter Symbol Conditions

VDD rise time t
VDD off time t

DDR

DDOFF

min typ max

0.1 – 10
1– –ms

Ratings

Unit

µ

s

Clock Generator

The internal oscillator that generates the clock for the internal circuit requires an external filter, a feedback resistor or an
external clock input as shown in the following sections.

No. 3255—4/30

LC7985NA, LC7985ND

External clock

The input duty cycle should be between 45 and 55% as shown in the following figure.

T

h

Duty

--------------- -

ThTl+

×=

100%

Note.

Ceramic filter

Feedback resistor

Measurement Circuit

Note. Rf

= 1MΩ ± 10%, CI = CO = 680pF ± 10%, Rd = 3.3kΩ ± 5%

Note. The resistor should be mounted as close as possible to OSCI and OSCO.

Note. R

= 2.4kΩ, C = 130pF, R = 11k

L

Ω

No. 3255—5/30

Read/write cycle timing

LC7985NA, LC7985ND

LC7930N interface timing

Power supply

No. 3255—6/30

LC7985NA, LC7985ND

Pin Description

Name Num I/O Connect to Functions

RS 1 I MPU Data register or instruction register select input. Data register when "1" and instruction register when "0".

R/W 1 I MPU Read or write select input “0” indicates write, “1” ; read

E 1 I MPU Execution start input to write or read

DB

DB

to DB

4

to DB

0

4 I/O MPU

7

4 I/O MPU

3

LOAD 1 O LC7930N Clock to latch the D serial data output to LC 7930N

CP 1 O LC7930N Clock to shift the D serial data

M 1 O LC7930N Output to shift the LCD drive signal to alternating current signal
D 1 O LC7930N Display expansion serial data output “0” indicates unselected, “1” ; selected

OC

OS

V1 to V
V

to OC

1

to OS

1

DD, VSS

16 O LCD LCD common driver outputs. All common signals unused are unselected wave forms.

16

40 O LCD LCD segment driver outputs

40

5

5 source Supply voltage for LCD display drive
2 source VDD : +5V, VSS : 0V

OSCI, OSCO 2 Oscillator feedback resistor and ceramic filter connection, and external clock input

4-bit microcontroller interface data bus and 8-bit microcontroller interface high-order four bits data bus
connections. Three-state bidirectional. DB

can be used as a busyflag.

7

8-bit microcontroller interface low-order four bits data bus connections. No connection when 4-bit interface
size is selected. Three-state bidirectional.

No. 3255—7/30

Functional Description

Registers

LC7985NA, LC7985ND

The LC7985 has two 8-bit registers—instruction register
(IR) and data register (DR)—that are selected as shown in
the following table.

RS R/W Operation

0 0 IR write, instruction execution
0 1 Busy flag (DB7) and address counter (DB0 to DB6) output
1 0 DR write, internal DR to DD RAM or CG RAM data transfer
1 1 DR read, internal DD RAM or CG RAM to DR data transfer

The instruction register is write-only. It contains instruc­tion codes or DD RAM and CG RAM addresses written
by the microcontroller.

Busy Flag

When busy flag is 1, the previous instruction is executing,
and when 0, the instruction has completed. The next
instruction cannot be received until BF is 0. The micro­controller should, therefore, confirm that BF is 0 before
writing the next instruction.

Display Data RAM (DD RAM)

The data register holds data read from or written to either
DD RAM or CG RAM. Data written to the data register by
the microcontroller is automatically transferred to the cur­rent DD RAM or CG RAM address. Data read from
DD RAM or CG RAM is buffered in the data register.

When the microcontroller writes a DD RAM or CG RAM
address to the instruction register, the data at that address
is copied into the data register. The microcontroller then
reads the data in the data register to complete the transfer.
Once that data is read, the data from the next DD RAM or
CG RAM address is copied into the data register in prepa­ration for the next data read.

Address Counter

The address counter is used for both the DD RAM and the
CG RAM. The address output on DB0 to DB7 is the
counter value before the currently executing instruction
began.

The display data RAM stores 80, 8-bit character codes,
and the LC7985 can display a maximum of 80 characters.
The address counter contains the location for the next dis­play memory read or write operation as shown in the fol­lowing figure.

Display data addresses are in hexadecimal. For example,
the address counter contents for location 4E are shown in
the following figure.

To prevent undesirable effects such as display flicker dur­ing DD RAM accesses, the internal memory and the
microprocessor interface have separate timing signals.

No. 3255—8/30

LC7985NA, LC7985ND

Single-line display mode (N = 0)

The DD RAM addresses and their corresponding display positions for an 80-character display are shown in the following
figure.

A single LC7985, however, can drive up to eight characters. The display positions and DD RAM addresses for an
unshifted 8-character display are shown in the following figure.

The DD RAM addresses following left and right display shifts are shown in the following figure. Note that the displayed
characters wrap around from addresses 4FH to 00H.

An LC7985 and a single LC7930N can drive a 16-character display. The display positions and DD RAM addresses for an
unshifted display are shown in the following figure.

The DD RAM addresses following left and right display shifts are shown in the following figure.

The number of displayed characters can be increased by adding more LC7930Ns. An LC7985 and nine LC7930Ns can
drive an 80-character display as shown in the following figure.

No. 3255—9/30