Sanyo LC7982A Specifications

Ordering number : EN5946

CMOS IC

LC7982A

LCD Dot Matrix Graphics Display Controller

Overview

The LC7982A is an LCD dot matrix graphics display controller IC. It stores display data sent from an 8-bit microcontroller in external display RAM and generates dot matrix LCD drive signals. Applications can select either of two modes: graphics mode, in which each bit in external RAM controls the on/off state of an individual pixel (dot) on the LCD, and character mode, in which character codes are stored in external RAM and the dot pattern is generated using the built-in character generator ROM. Thus the LC7982A can support a wide range of applications. The LC7982A is fabricated in a CMOS process, and in conjunction with a CMOS microcontroller, can implement low-power LCD display systems. This device differs from the LC7981 only in the data stored in the built-in character generator ROM.

Features

•LCD dot matrix and graphics display controller

•Display control capacity

Graphics mode		512 K dots (216 bytes)
Character mode		4096 characters (212 bytes)
• Character generator ROM		7360 bits
· European character support
Character font: 5	× 7 dots	160 characters		192 characters
Character font: 5	× 11 dots	32 characters		total

(Can be expanded by up to 4 KB using external ROM.)

•Supports interfacing with 8-bit microcontrollers.

•Display duty (program selectable)

— From static to 1/256 duty

•Extensive set of command functions

—Scroll, cursor on/off/blink, character blinking, bit manipulation

•Display methods : Method A and method B (program selectable)

•Built-in oscillator circuit (Using an external resistor and capacitor)

•Low power

•+5V single-voltage power supply

Package Dimensions

unit: mm

3055A-QFP60C

[LC7982A]

SANYO: QFP60C (QIP60C)

Any and all SANYO products described or contained herein do not have specifications that can handle applications that require extremely high levels of reliability, such as life-support systems, aircraft’s control systems, or other applications whose failure can be reasonably expected to result in serious physical and/or material damage. Consult with your SANYO representative nearest you before using any SANYO products described or contained herein in such applications.

SANYO assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all SANYO products described or contained herein.

SANYO Electric Co.,Ltd. Semiconductor Bussiness Headquarters

TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110-8534 JAPAN

O1698RM (OT) No. 5946-1/18

LC7982A

Specifications

Absolute Maximum Ratings at Ta = 25°C, GND = 0 V

Parameter	Symbol	Conditions	Ratings	Unit
Maximum supply voltage	VDD max		–0.3 to +7.0	V
Input voltage	VI		–0.3 to VDD +0.3	V
Output voltage	VO		–0.3 to VDD +0.3	V
Allowable power dissipation	Pd max	Ta = 75°C	200	mW
Operating temperature	Topr		–20 to +75	°C
Storage temperature	Tstg		–55 to +125	°C

Allowable Operating Ranges at Ta = –20 to +75°C, GND = 0 V

Parameter

Symbol

Conditions

Ratings

Unit

min

typ

max

Supply voltage

VDD

4.75

5.25

V

High-level input voltage

VIH1

Input and I/O pins other than

and CR.

2.2

VDD

V

SYNC

Low-level input voltage

VIL1

Input and I/O pins other than

and CR.

0

0.8

V

SYNC

High-level input voltage

VIH2

0.7 VDD

VDD

V

SYNC,

CR

Low-level input voltage

VIL2

0

0.3 VDD

V

SYNC,

CR

IOH = –0.6 mA, DB0 to DB7,

High-level output voltage

VOH1

WE,

2.4

VDD

V

MA0 to MA15, MD0 to MD7

IOL = 1.6 mA, DB0 to DB7,

Low-level output voltage

VOL1

WE,

0

0.4

V

MA0 to MA15, MD0 to MD7

High-level output voltage

VOH2

IOH = –0.6 mA,

SYNC,

CPO, FLM,

VDD – 0.4

VDD

V

CL1, CL2, D1, D2, MA, MB

Low-level output voltage

VOL2

IOL = 0.6 mA,

SYNC,

CPO, FLM,

0

0.4

V

CL1, CL2, D1, D2, MA, MB

[Internal Clock Operation]

Clock oscillator frequency

fOSC

Cf = 15 pF ±5%, Rf = 39 kΩ ±2%*1

500

600

700

kHz

[External Clock Operation]

Clock operating frequency

fCP

*2

2.5

MHz

Clock duty

Duty

*3

47.5

50

52.5

%

Clock rise time

trcp

*3

50

ns

Clock fall time

tfcp

*3

50

ns

Electrical Characteristics at Ta = –20 to +75°C, GND = 0 V, VDD = 5 V ± 5%

Parameter	Symbol			Conditions				Ratings		Unit
							min	typ	max
Input leakage current	IIN
		VIN = 0 to VDD,	CS,	E, RS, R/W,	RES		–5		5	µA
Current drain	ICC1	RC oscillator, fOSC = 600 kHz						2	4	mA
	ICC2	External clock, fCP = 2.5 MHz						3	5	mA
Pull-up current	IPL	VIN = GND, DB0 to DB7, RD0 to RD7, MD0 to MD7						10	20	µA

(Note 1)	(Note 2)	(Note 3)
	Open
	Open
	Oscillator circuit

Cf = 15 pF ± 5%

Rf = 39 kΩ ± 2% Duty = Th × 100% Th + T1

(When fOSC = 600 kHz (typical))

No. 5946-2/18

LC7982A

Timing Characteristics

•Bus read/write operation 1 Read cycle

DB0 to DB7

Write cycle

DB0 to DB7

Ta = –20 to +75°C, VDD = 5V ± 5%, GND = 0 V

	Parameter	Symbol	Conditions		Ratings		Unit
				min	typ	max
	Address setup time	tAS		90			ns
	Address hold time	tAH		10			ns
	Data delay time (read)	tDDR	CL = 50 pF			140	ns
	Data hold time (read)	tDHR		10			ns
	Data setup time (write)	tDSW		220			ns
	Data hold time (write)	tDHW		20			ns

Note: Test waveform definition

Measurement point

Input pins are driven to 2.4 V and 0.45 V, and the timing is measured at 1.5 V

No. 5946-3/18

LC7982A

•Bus read/write operation 2 Data read cycle

Data write cycle

Ta = –20 to +75°C, VDD = 5V ± 5%, GND = 0 V

Parameter

Symbol

Instruction register value

Ratings

Unit

min

typ

max

(HP+2) × 103

Read cycle time

tRCY

0DH

+200

ns

fOSC

(2HP+2) × 103

Write cycle time

tWCY1

0EH, 0FH

+200

ns

fOSC

Write cycle time

tWCY2

0CH

(HP+2) × 103

ns

+200

fOSC

Write cycle time

t

WCY

3

00H, 01H, 02H, 03H, 04H,

2000

+200

ns

08H, 09H, 0AH, 0BH

fOSC

Notes: • For character display, HP is the number of dots in the horizontal direction per character,

and for graphics mode, HP is the number of bits shown on the display from each byte of display data.

•fOSC is the oscillator frequency, in units of MHz.

•All measurements are made at 1.5 V.

•Parallel operation (master mode)

Ta = –20 to +75°C, VDD = 5V ± 5%, GND = 0 V

				Parameter	Symbol	Conditions		Ratings		Unit
							min	typ	max
		SYNC delay time			tDSY				100	ns
		SYNC pulse width			tWSY		350			ns

Notes: • With no loads on any of the output pins.

• Measurements are made at 0.5 VDD.

No. 5946-4/18

LC7982A

• External RAM and ROM interface

MA0 to

MA15

MD0 to

MD7

RD0 to

RD7

Read Cycle at Ta = –20 to +75°C, VDD = 5 V ± 5%, GND = 0 V

	Parameter	Symbol	Conditions		Ratings		Unit
				min	typ	max
	MA0 to MA15 read address delay time	tDMAR				95	ns
	MD0 to MD7, RD0 to RD7 setup time	tSMDR		105			ns

Write Cycle at Ta = –20 to +75°C, VDD = 5 V ± 5%, GND = 0 V

	Parameter	Symbol	Conditions		Ratings		Unit
				min	typ	max
	Memory address setup time	tSMAW		50			ns
	WE pulse width	tWWE		350			ns
	Memory data setup time	tSMDW		250			ns
	Memory address hold time	tHMAW		50			ns
	Memory data hold time	tHMDW		50			ns

Notes: • With no loads on any of the output pins.

•All measurements are made at 1.5 V.

•Driver IC interface

D1, D2

Ta = –20 to +75°C, VDD = 5 V ± 5%, GND = 0 V

	Parameter	Symbol	Conditions		Ratings		Unit
				min	typ	max
	Clock cycle time	tCYC		400			ns
	Clock phase difference	tDCL				100	ns
	Clock rise and fall times	tCRF				30	ns
	D1 and D2 phase difference	tDD				100	ns
	MA and MB phase difference	tDMA				200	ns
	FLM phase difference	tDFM				200	ns

Notes: • With no loads on any of the output pins.

• Measurements other than those with a specified measurement point are made at 0.5 VDD.

No. 5946-5/18

LC7982A

Pin Assignment

Top view

Block Diagram

DB0 to DB7

Input and output interface circuit

			Refresh address
	Dot counter		counter (1)
			Refresh address
	Data		counter (2)
	input		Cursor address
	register
			counter
	Dot register
			Cursor signal
	Mode		generator
	control	Control
	register
			Line address
	Data		counter

output register

	Instruction	signal
	register
		Control
	Busy	signal
	flag
		Oscillator
		circuit

Multiplexer

MD0 to MD7

Expansion

ROM

Character generator ROM

RD0 to RD7

Multiplexer

Parallel to series converter

Parallel to series converter

•When expansion ROM is used, MA0 to MA11 are used as the RAM address and MA12 to MA15 are used as the expansion ROM address.

No. 5946-6/18