Sanyo LC7982A Specifications

Ordering number : EN5946

O1698RM (OT) No. 5946-1/18

Overview

The LC7982A is an LCD dot matrix graphics display controller IC. It stores display data sent from an 8-bit microcontroller in external display RAM and generates dot matrix LCD drive signals. Applications can select either of two modes: graphics mode, in which each bit in external RAM controls the on/off state of an individual pixel (dot) on the LCD, and character mode, in which character codes are stored in external RAM and the dot pattern is generated using the built-in character generator ROM. Thus the LC7982A can support a wide range of applications. The LC7982A is fabricated in a CMOS process, and in conjunction with a CMOS microcontroller, can implement low-power LCD display systems. This device differs from the LC7981 only in the data stored in the built-in character generator ROM.

Features

• LCD dot matrix and graphics display controller

• Display control capacity Graphics mode 512 K dots (216bytes) Character mode 4096 characters (212bytes)

• Character generator ROM 7360 bits

· European character support

Character font: 5 × 7 dots 160 characters Character font: 5 × 11 dots 32 characters (Can be expanded by up to 4 KB using external ROM.)

• Supports interfacing with 8-bit microcontrollers.

• Display duty (program selectable) — From static to 1/256 duty

• Extensive set of command functions — Scroll, cursor on/off/blink, character blinking, bit

manipulation

• Display methods : Method A and method B (program selectable)

• Built-in oscillator circuit (Using an external resistor and capacitor)

• Low power

• +5V single-voltage power supply

Package Dimensions

unit: mm

3055A-QFP60C

LC7982A

SANYO Electric Co.,Ltd. Semiconductor Bussiness Headquarters

TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110-8534 JAPAN

LCD Dot Matrix Graphics Display Controller

CMOS IC

Any and all SANYO products described or contained herein do not have specifications that can handle applications that require extremely high levels of reliability, such as life-support systems, aircraft’s control systems, or other applications whose failure can be reasonably expected to result in serious physical and/or material damage. Consult with your SANYO representative nearest you before using any SANYO products described or contained herein in such applications.

SANYO assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all SANYO products described or contained herein.

SANYO: QFP60C (QIP60C)

[LC7982A]

192 characters total

Specifications

Absolute Maximum Ratings at Ta = 25°C, GND = 0 V

Allowable Operating Ranges at Ta = –20 to +75°C, GND = 0 V

Electrical Characteristics at Ta = –20 to +75°C, GND = 0 V, VDD= 5 V ±5%

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LC7982A

Parameter Symbol Conditions Ratings Unit

Maximum supply voltage V

max –0.3 to +7.0 V

Input voltage V

–0.3 to VDD+0.3 V

Output voltage V

–0.3 to VDD+0.3 V Allowable power dissipation Pd max Ta = 75°C 200 mW Operating temperature Topr –20 to +75 °C Storage temperature Tstg –55 to +125 °C

Parameter Symbol Conditions

Ratings

Unit

min typ max

Supply voltage V

4.75 5.25 V

High-level input voltage V

1 Input and I/O pins other than SYNC and CR. 2.2 V

Low-level input voltage V

1 Input and I/O pins other than SYNC and CR. 0 0.8 V

High-level input voltage V

2 SYNC, CR 0.7 V

Low-level input voltage V

2 SYNC, CR 0 0.3 V

High-level output voltage V

= –0.6 mA, DB0 to DB7, WE,

2.4 V

MA0 to MA15, MD0 to MD7

Low-level output voltage V

= 1.6 mA, DB0 to DB7, WE,

0 0.4 V

MA0 to MA15, MD0 to MD7

High-level output voltage V

= –0.6 mA, SYNC, CPO, FLM,

– 0.4 V

CL1, CL2, D1, D2, MA, MB

Low-level output voltage V

= 0.6 mA, SYNC, CPO, FLM,

0 0.4 V

CL1, CL2, D1, D2, MA, MB [Internal Clock Operation] Clock oscillator frequency f

OSC

Cf = 15 pF ±5%, Rf = 39 kΩ ±2%

500 600 700 kHz [External Clock Operation] Clock operating frequency f

2.5 MHz

Clock duty Duty

47.5 50 52.5 %

Clock rise time trcp

50 ns

Clock fall time tfcp

50 ns

Parameter Symbol Conditions

Ratings

Unit

min typ max

Input leakage current I

VIN= 0 to VDD, CS, E, RS, R/W, RES –5 5 µA

Current drain

1 RC oscillator, f

OSC

= 600 kHz 2 4 mA

2 External clock, fCP= 2.5 MHz 3 5 mA

Pull-up current I

VIN= GND, DB0 to DB7, RD0 to RD7, MD0 to MD7 10 20 µA

(Note 1) (Note 2) (Note 3)

Cf = 15 pF ±5% Rf = 39 kΩ ±2% (When f

OSC

= 600 kHz (typical))

Duty =

× 100%

Th + T1

Open

Oscillator circuit

Timing Characteristics

• Bus read/write operation 1 Read cycle

Write cycle

Ta = –20 to +75°C, VDD= 5V ±5%, GND = 0 V

Note: Test waveform definition

Input pins are driven to 2.4 V and 0.45 V, and the timing is measured at 1.5 V

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LC7982A

DB0 to DB7

Parameter Symbol Conditions

Ratings

Unit

min typ max

Address setup time t

90 ns

Address hold time t

10 ns

Data delay time (read) t

DDR

CL= 50 pF 140 ns

Data hold time (read) t

DHR

10 ns

Data setup time (write) t

DSW

220 ns

Data hold time (write) t

DHW

20 ns

Measurement point

• Bus read/write operation 2 Data read cycle

Data write cycle

Ta = –20 to +75°C, VDD= 5V ±5%, GND = 0 V

Notes: • For character display, HP is the number of dots in the horizontal direction per character,

and for graphics mode, HP is the number of bits shown on the display from each byte of display data.

• f

OSC

is the oscillator frequency, in units of MHz.

• All measurements are made at 1.5 V.

• Parallel operation (master mode)

Ta = –20 to +75°C, VDD= 5V ±5%, GND = 0 V

Notes: • With no loads on any of the output pins.

• Measurements are made at 0.5 V

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LC7982A

Parameter Symbol Instruction register value

Ratings

Unit

min typ max

Read cycle time t

RCY

0DH ns

Write cycle time t

WCY

1 0EH, 0FH ns

Write cycle time t

WCY

2 0CH ns

Write cycle time t

WCY

00H, 01H, 02H, 03H, 04H,

08H, 09H, 0AH, 0BH

(HP+2) × 10

+200

OSC

(2HP+2) × 10

+200

OSC

(HP+2) × 10

+200

OSC

2000

+200

OSC

Parameter Symbol Conditions

Ratings

Unit

min typ max

SYNC delay time t

DSY

100 ns

SYNC pulse width t

WSY

350 ns

• External RAM and ROM interface

Read Cycle at Ta = –20 to +75°C, VDD= 5 V ±5%, GND = 0 V

Write Cycle at Ta = –20 to +75°C, VDD= 5 V ±5%, GND = 0 V

Notes: • With no loads on any of the output pins.

• All measurements are made at 1.5 V.

• Driver IC interface

Ta = –20 to +75°C, VDD= 5 V ±5%, GND = 0 V

Notes: • With no loads on any of the output pins.

• Measurements other than those with a specified measurement point are made at 0.5 V

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LC7982A

Parameter Symbol Conditions

Ratings

Unit

min typ max

MA0 to MA15 read address delay time

DMAR

95 ns

MD0 to MD7, RD0 to RD7 setup time

SMDR

105 ns

Parameter Symbol Conditions

Ratings

Unit

min typ max

Memory address setup time t

SMAW

50 ns

WE pulse width t

WWE

350 ns

Memory data setup time t

SMDW

250 ns

Memory address hold time t

HMAW

50 ns

Memory data hold time t

HMDW

50 ns

Parameter Symbol Conditions

Ratings

Unit

min typ max

Clock cycle time t

CYC

400 ns

Clock phase difference t

DCL

100 ns

Clock rise and fall times t

CRF

30 ns

D1 and D2 phase difference t

100 ns

MA and MB phase difference t

DMA

200 ns

FLM phase difference t

DFM

200 ns

MA0 to MA15

MD0 to MD7

RD0 to RD7

D1, D2

Pin Assignment

Block Diagram

• When expansion ROM is used, MA0 to MA11 are used as the RAM address and MA12 to MA15 are used as the expansion ROM address.

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LC7982A

Input and output interface circuit

Multiplexer

Busy

flag

Data input

Data

output

Instruction

Oscillator

circuit

Mode

control

Dot counter

Refresh address

counter (1)

Refresh address

counter (2)

Cursor address

counter

Line address

counter

Cursor signal

generator

Character

generator

ROM

Expansion

ROM

MD0 to MD7

RD0 to RD7

DB0 to DB7

Multiplexer

Parallel to series

converter

Parallel to series

converter

Dot register

Control signal

Top view

Block Functions

Registers The LC7982A has five internal registers: the instruction register, the data input register, the data output register, the dot register, and the mode control register.

• The instruction register holds the instruction code, which includes the start address and the cursor address. This register is a 4-bit register, and the lower 4 bits (DB0 to DB3) of the data bus are written to this register.

• The data input register is used to temporarily hold data for external RAM, the dot register, the mode control register, and other registers. It is an 8-bit register.

• The data output register is used to temporarily hold data read output from external RAM, and is an 8-bit register. The cursor address passes through the data input register and is written to the cursor address counter, and when a memory readout instruction is loaded into the instruction register, IC internal operations read from external RAM and load it into the data output register. Data transfer to the microcontroller completes when the microcontroller reads the data output register at the next instruction.

• The dot register holds the character pitch, the number of dots in the vertical direction, and other display data. Data from the microcontroller passes through the data input register and is written to this register.

• The mode control register holds display state information for the LCD, such as display on/off state and the cursor on/off/blinking state. It is a 6-bit register. Data from the microcontroller passes through the data input register and is written to this register.

Busy Flag This flag is set to 1 when the LC7982A is performing internal operations. In this state, the next instruction cannot be accepted. The state of the busy flag is output from DB7 when RS is 1 and R/W is 1. The microcontroller application software must first verify that the busy flag is 0 before writing the next instruction. However, after a data read instruction or a data write instruction, the microcontroller may execute the next instruction without checking the busy flag after the maximum value of the read cycle or write cycle elapses, respectively.

Dot Counter The dot counter generates LCD display timing according to the contents of the dot register.

Refresh Address Counter The refresh address counters control the addresses of the external RAM, the character generator ROM, and expansion ROM. There are two refresh address counters, refresh address counter (1) and refresh address counter (2). Refresh address counter (1) is used for the upper screen, and refresh address counters (2) is used for the lower screen. In graphics mode, these registers output 16-bit data that is used as the external RAM address signals. In character mode, the upper 4 bits are ignored and the 4 bits of the line address counter are output in place of those four bits. These 4 bits are used as the expansion ROM address.

Character Generator ROM The character generator ROM holds the data for 192 characters, a total of 7360 bits. It takes a character code from external RAM and a line code from the line address counter as its address signals, and outputs 5 bits of dot data. Although this ROM holds a font with 192 characters, of which 160 are 5 × 7 dot characters and 32 are 5 × 11 dot characters, up to 256 8 × 16 dot characters can be supported by using expansion ROM.

Cursor Address Counter Instructions can be used to set up this 16-bit counter in advance. This counter holds the address when reading or writing external RAM (either display dot data or character codes). The cursor address counter is automatically incremented after reading or writing display data or after executing a bit set or bit clear instruction.

Cursor Signal Generator A cursor can be displayed in character mode under instruction control. A cursor is automatically generated when the cursor address counter and the line address counter reach the stipulated values.

Parallel to Serial Converter Parallel data from external RAM, the character generator, or expansion RAM is converted to series data by the two parallel to series converter circuits and output at the same time to the LCD drive circuits for the upper and lower screens as series data.

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LC7982A

Pin Functions

No. 5946-8/18

LC7982A

Pin No. Pin Function

21 to 28 DB0 to DB7 Data bus. These are 3-state shared I/O pins and are used for data transfers to and from the microcontroller.

15 CS Chip select: The IC is set to the selected state when CS = 0.

17 R/W

Read/write: R/W = 1

..........

Microcontroller ← LC7982A

R/W = 0

..........

Microcontroller → LC7982A

18 RS

....

Instruction register

RS = 0

....

Data register

16 E

Enable: Data writes are performed when E falls from high to low. Data can be read when E = 1.

6, 7, 8 CR, R, C RC oscillator connections

14 RES Reset: When this pin is set 0, the display is turned off and slave mode and HP = 6 are selected.

1 to 4

MA0 to MA15

Display RAM address outputs 49 to 60 In character display mode, MA12 to MA15 are output as the external CG raster address. 30 to 37 MD0 to MD7 Display data bus: Three-state shared input and output signals 38 to 45 RD0 to RD7 ROM data inputs: Dot data from an external character generator is input using these pins.

13 WE Write enable: The RAM write signal 46 CL2 Display data shift clock 11 CL1 Display data latch signal 10 FLM Frame signal 19 MA LCD drive signal: Alternation signal

.....

Method A

5 MB LCD drive signal: Alternation signal

.....

Method B

47, 48 D1, D2

Display data serial output: D1

..............

Upper screen

..............

Lower screen

9 CPO Slave mode clock

Parallel operation synchronizing signal: Three-state shared input and output signal.

12 SYNC Master mode:Outputs a synchronizing signal.

Slave mode: Inputs a synchronizing signal.

Display Control Instructions

The display is controlled by writing data to the instruction register and the 13 data registers. The instruction register and the data registers are differentiated using the RS signal. First, with RS set to 1 the application writes 8-bit data to the instruction register and specifies the code for the data register. Then, with RS set to 0, the application writes 8-bit data to the data register, and the specified instruction is executed. Note that another instruction cannot be written while the previous instruction is executing. Since the busy flag is set during this period, applications must verify that the busy flag is 0 before writing an instruction. However, after a data read instruction or a data write instruction, the microcontroller may execute the next instruction without checking the busy flag after the maximum value of the read cycle or write cycle elapses, respectively

• Mode control Applications specify the mode control register by writing 00H to the instruction register. (The form "00H" is used to express values in hexadecimal.)

• Character pitch setting

VP indicates the number of dots in the vertical direction per character. Applications should determine this value based on the desired vertical separation between characters. This setting is only meaningful in character display mode, and is ignored in graphics mode. In character display mode, HP indicates the number of dots in the horizontal direction per character, and also includes the gap between the current character and the character displayed to the right. In graphics mode, HP indicates the number of bits displayed from each byte of display data from RAM. HP can be set to one of three values.

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LC7982A

Register R/W RS DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 Instruction register 0 1 0 0 0 0 0 0 0 0 Mode control register 0 0 0 0 Mode data

DB5 DB4 DB3 DB2 DB1 DB0 Cursor/blinking CG

Graphics/character display 0 0 Cursor off 0 1

Cursor on

1 0

Cursor off/character blinking

1 1

Cursor blinking

1/0 1/0 0 0 Cursor off

0 1

Cursor on

1 0

Cursor off/character blinking 1 1 Cursor blinking 0 0 1 0

Internal CGExternal CG

Character display

mode

Graphics mode

Display

on/of

Master/

slave

Blinking

Cursor

Mode

Internal/ external

1: Master mode 0: Slave mode

1: Display on 0: Display off

Register R/W RS DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 Instruction register 0 1 0 0 0 0 0 0 0 1 Character pitch register 0 0 (VP - 1) binary 0 (HP - 1) binary

Hp DB2 DB1 DB0 Setting

6 1 0 1 Horizontal character pitch of 6 dots 7 1 1 0 Horizontal character pitch of 7 dots 8 1 1 1 Horizontal character pitch of 8 dots

• Character count setting

In character display mode, HNspecifies the number of characters displayed in the horizontal direction. In graphics mode, HNspecifies the number of bytes displayed in the horizontal direction. The total number of dots displayed on the screen in the horizontal direction is given by the following formula. n = HP × H

HNcan be set to an even number in the range 2 to 256 (decimal).

• Time division setting (display duty)

NXspecifies the time division setting. That is, the display duty is set to 1/NX. NXcan be set to a value in the range 1 to 256 (decimal).

• Cursor position setting

In character display mode, CP specifies the line where the cursor is displayed. For example, if CP is set to 8 (decimal), the cursor will be displayed under the character for a 5 × 7 font. The length of the cursor in the horizontal direction will be equal to horizontal direction character pitch HP. While CP can be set to any value in the range 1 to 16 (decimal), if it is set to a value less than or equal to the vertical direction character pitch VP (CP ≤ VP), the cursor display will take priority when cursor display is enabled. Note that if CP > VP, the cursor will not be displayed. The length of the cursor in the horizontal direction will be equal to HP.

• Display start position low-order address

• Display start position high-order address

These instructions together write the display start address value into the display start address register. The display start address specifies the RAM address where the data to be displayed at the upper left of the screen is stored. The start address is a 16-bit value formed from high-order and low-order bytes.

• Cursor address (low order) setting (RAM read/write low-order address)

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LC7982A

– 1) binary

0 0 (Start address low-order byte) binary

(Low-order byte)

0 0 (Start address high-order byte) binary

(High-order byte)

0 0 (Cursor address low-order byte) binary

(Low-order byte)

Register R/W RS DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 Instruction register 0 1 0 0 0 0 0 1 0 0 Cursor position register 0 0 0 0 0 0 (CP – 1) binary

• Cursor address (high order) setting (RAM read/write high-order address)

These instructions together write the cursor address value into the cursor address register. The cursor address indicates the address used for refering to RAM for the display data or character code. That is, the data at the address specified by the cursor address will be read or written. In character display mode, the cursor is displayed at the position specified by the cursor address.

While the cursor address is a 16-bit value formed from high-order and low-order bytes, applications must only use cursor addresses that obey the following restrictions.

The cursor address counter is a 16-bit increment-only counter with set and reset functions. When the nth bit changes from 1 to 0, bit n+1 is incremented. When the low-order byte is set, if the set caused the MSB in the low-order byte to change from 1 to 0, the LSB in the high-order byte will be incremented. Therefore, applications must set both the loworder and the high-order bytes in that order when setting the cursor address.

• Display data write

When 8 bits of data are written by writing the instruction code 0CH to the instruction register when RS is 0, that data will be written as either display data or a character code to the RAM address specified by the cursor address counter. The value of the cursor address counter is incremented by 1 after the write.

• Display data read

Applications can read out data in RAM after the LC7982A has been set to the readout state by writing the instruction code 0DH to the instruction register when RS is 0. The data readout procedure is described below.

When this instruction is executed, the contents of the data output register will be output from the pins DB0 to DB7. After that, the RAM data specified by the cursor address will be transferred to the data output register. Additionally, the cursor address will be incremented by 1. As a result, the correct data will not be read out on the first readout after the cursor address is set, but the specified data will be read out on the second read. Accordingly, applications that read data out after setting the cursor address must perform a single dummy read operation.

• Bit clear

• Bit set

The bit clear and bit set instructions set a specified bit in a byte in display data RAM to 0 or 1, respectively. The bit clear instruction clears the bit specified by NBto 0, and the bit set instruction sets the bit to 1. The RAM address is determined by the cursor address, and the cursor address is automatically incremented by 1 after the instruction is executed. NBmust be a value in the range 1 to 8. A value of 1 specifies the LSB and a value of 8 specifies the MSB.

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LC7982A

0 0 (Cursor address high-order byte) binary

(High-order byte)

When the application rewrites (sets) The application must first set the low-order both the low-order and high-order bytes. byte and then set the high-order byte.

When the application only needs to rewrite After writing the low-order byte, the applithe low-order byte cation must also write the high-order byte.

The application should simply write the

When the application only needs to rewrite high-order byte. the high-order byte There is no need for it to write the

low-order byte.

Register R/W RS DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 Instruction register 0 1 0 0 0 0 1 1 0 0 RAM 0 0 MSB (Pattern data or character code) LSB

Register R/W RS DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 Instruction register 0 1 0 0 0 0 1 1 0 1 RAM 1 0 MSB (Pattern data or character code) LSB

– 1) binary

• Busy flag readout

When the LC7982A is set to readout mode when RS is 1, the state of the busy flag will be output from DB7. The busy flag will be 1 during the execution of any of the above thirteen instructions, and will be 0 when instruction execution has completed and the LC7982A can accept the next instruction. When the busy flag is 1, the LC7982A cannot accept instructions. Therefore, applications must check the busy flag and verify that it is 0 before executing an instruction or writing data to the LC7982A. However, after a data read instruction or a data write instruction, the microcontroller may execute the next instruction without checking the busy flag after the maximum value of the read cycle or write cycle, respectively. The busy flag is not changed by writes to the instruction register when RS is 1. Therefore, it is not necessary to check the busy flag immediately after writing the instruction register. It is not necessary to issue any instruction register commands to read out the busy flag.

Relationship between HP, HN, VP, CP, and NXand the LCD Panel

No. 5946-12/18

LC7982A

HN(Character positions)

Symbol Function Description Value

HP Horizontal character pitch Character pitch in the horizontal direction 6 to 8 dots H

Horizontal characters

Number of characters per line in the horizontal direction or number of words per line An even number

(in graphics mode) in the range 2 to 256 VP Vertical character pitch Character pitch in the vertical direction 1 to 16 dots CP Cursor position Number of the line where the cursor will be displayed 1 to 16 lines N

Vertical lines Display duty 1 to 256 lines

Note: If m is the number of dots in the vertical direction on the screen, and n is the number of dots in the horizontal direction, then the following relationships

will be held: 1/m = 1/N

= Display duty

n = HP × H

m/VP = Number of lines displayed CP ≤ VP

Display Modes

Display mode

Display data from the

RAM LCD panel

microcontroller

Character mode

Graphics mode

No. 5946-13/18

LC7982A

Start address

HP: 6, 7, or 8 dots

8 dots 8 dots

HP: 8 dots

Display patterns

(8 bits)

Character codes

(8 bits)

Sample Application Circuit 1

No. 5946-14/18

LC7982A

LCD module

MA12 to MA15

MA0

MA15

DB0 to DB7

MD0

MD7

RD0

RD7

Sample Application Using Combined Graphic and Character Display

No. 5946-15/18

LC7982A

MA0 to

MA10

MD0 to

MD7

A0 to A10

I/O0 to I/O7

MA0 to

MA10

MD0 to

MD7

A0 to A10

DB0 to DB7

I/O0 to I/O7

Sample Structures

• Graphics mode

• Character display mode (1) (On-chip character generator)

• Character display mode (2) (External character generator)

• Parallel operation

No. 5946-16/18

LC7982A

LCD module

MD0 to MD7 MA0 to MA15

LCD module

MD0 to MD7 MA0 to MA11

LCD module

RD0 to RD7

MA12 to MA15

MD0 to MD7

MA0 to MA11

LCD module (1) LCD module (2)

(Master)

(Slave)

Common signals are shared

•

LC7982A Built-in Character Generator (Only the characters enclosed in the heavy broken line differ from the LC7981.)

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LC7982A

Upper 4 bits

Lower 4 bits

A10943

PS No. 5946-18/18

LC7982A

This catalog provides information as of October, 1998. Specifications and information herein are subject to change without notice.

Specifications of any and all SANYO products described or contained herein stipulate the performance, characteristics, and functions of the described products in the independent state, and are not guarantees of the performance, characteristics, and functions of the described products as mounted in the customer’s products or equipment. To verify symptoms and states that cannot be evaluated in an independent device, the customer should always evaluate and test devices mounted in the customer’s products or equipment.

SANYO Electric Co., Ltd. strives to supply high-quality high-reliability products. However, any and all semiconductor products fail with some probability. It is possible that these probabilistic failures could give rise to accidents or events that could endanger human lives, that could give rise to smoke or fire, or that could cause damage to other property. When designing equipment, adopt safety measures so that these kinds of accidents or events cannot occur. Such measures include but are not limited to protective circuits and error prevention circuits for safe design, redundant design, and structural design.

In the event that any or all SANYO products (including technical data, services) described or contained herein are controlled under any of applicable local export control laws and regulations, such products must not be exported without obtaining the export license from the authorities concerned in accordance with the above law.

No part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopying and recording, or any information storage or retrieval system, or otherwise, without the prior written permission of SANYO Electric Co., Ltd.

Any and all information described or contained herein are subject to change without notice due to product/technology improvement, etc. When designing equipment, refer to the “Delivery Specification” for the SANYO product that you intend to use.

Information (including circuit diagrams and circuit parameters) herein is for example only; it is not guaranteed for volume production. SANYO believes information herein is accurate and reliable, but no guarantees are made or implied regarding its use or any infringements of intellectual property rights or other rights of third parties.

Sanyo LC7982A Specifications

Specifications and Main Features

Frequently Asked Questions

User Manual