Sanyo LC79430D Specifications

Overview

The LC79430D is a large-scale dot matrix LCD common
driver LSI. The LC79430D contains an 80-bit
bidirectional shift register and is equipped with a 4-level
LCD driver. The input/output pins for cascade connection
can be used to further increase the IC’s number of bits.
The LC79430D can be used in conjumction with segment
driver LC79400D, LC79401D (QFP100D) to drive a
wide-screen LCD panel.

Functions and Features

• On-chip LCD drive circuit (80 bits)

• Display duty selection ranging from 1/64 to 1/256

• On-chip input/output pins support further increases in
bit number

• Supports externally supplied bias voltage

• On-chip 80-bit bidirectional shift register (supports 40­bit × 2 division)

• Supports single mode (80-bit shift register) and dual
mode (40-bit × 2 shift register) applications
(1) O1 → O80
(2) O80 → O1
(3) O1 → O40 and O41 → O80
(4) O80 → O41 and O40 → O1
All four of the shift direction selection listed above all
supported.

• Operating power supply voltage/operating temperature
include
VDD(logic section) : 5 V ±10% / –20 to +75°C
VDD–VEE(LCD section) : 12 V to 32 V / –20 to +75°C

• CMOS process

Package Dimensions

unit: mm

3180-QFP100D

Single mode

Single mode

CMOS LSI

D309THA (OT) /21593JN A8-9626 No. 4348-1/6

SANYO: QIP100D

[LC79430D]

SANYO Electric Co.,Ltd. Semiconductor Bussiness Headquarters

TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110 JAPAN

Dot Matrix LCD Driver

LC79430D

Ordering number : EN4348B

Parameter Symbol Conditions Ratings Unit

Maximum supply voltage (LOGIC) V

DD

max –0.3 to +7.0 V

Maximum supply voltage (LCD) V

DD–VEE

max *1 0 to 35 V

Maximum input voltage V

IN

max –0.3 to VDD+0.3 V

Storage temperature range Tstg –40 to +125 °C

Note : *1 The following relations between elements should be maintainged: VDD≥ V1 > V2 > V5 > VEE, VDD– V2 ≤ 7 V, V5 – VEE≤ 7 V.

Specifications

Absolute Maximum Ratings at Ta = 25°C ±2°C, VSS= 0 V

No. 4348-2/6

LC79430D

Parameter Symbol Conditions

Ratings

Unit

min typ max

Supply voltage (LOGIC) V

DD

4.5 5.5 V

Supply voltage (LCD) V

DD–VEE

*2, *3 12 32 V

Input high level voltage V

IH

DIO1, DIO80, CP, M, DMIN,

0.8 V

DD

V

MODE, RS/LS, DISP OFF

Input low level voltage V

IL

DIO1, DIO80, CP, M, DMIN,

0.2 V

DD

V

MODE, RS/LS, DISP OFF

CP (Shift clock) f

CP

CP 1 MHz

CP (Pulse width) t

WC

CP 63 ns

Setup time t

SETUP

DIO1 → CP, DIO80 → CP,

100 ns

DMIN → CP

Hold time t

HOLD

DIO1 → CP, DIO80 → CP,

100 ns

DMIN → CP

CP rise fall time

t

R

CP 50 ns

t

F

CP 50 ns

Note: *2 The following relations between elements should be maintained: VDD≥ V1 > V2 > V5 > VEE. VDD– V2 ≤ 7 V, V5 – VEE≤ 7 V.

*3 When the power supply is turned on, power to the LCD drive is turned on after or simultaneously with the turning on of the logic section’s power

supply. When the power supply is turned off, the logic power supply is turned off after or at the same time the LCD driver power supply is turned off.

Note: *4 V

DE

= V1 or V2 or V5 or VEE, V1 = VDD, V2 = 16/17 (VDD–VEE), V5 = 1/17 (VDD–VEE)

Allowable Operating Ranges at Ta = –20 to +75°C, VSS= 0 V

Parameter Symbol Conditions

Ratings

Unit

min typ max

Input high level current I

IH

VIN= VDD, VDD= 5.5 V; DIO1, DIO80,

1 µA

CP, M, DMIN, MODE, RS/LS, DISP OFF

Input low level current I

IL

VIN= VSS, VDD= 5.5 V; DIO1, DIO80,

–1 µA

CP, M, DMIN, MODE, RS/LS, DISP OFF

Output high level voltage V

OHIOH

= –0.4 mA, VDD= 4.5 V; DIO1, DIO80 VDD–0.4 V

Output low level voltage V

OLIOL

= 0.4 mA, VDD= 4.5 V; DIO1, DIO80 0.4 V

R

ON

(1)

V

DD–VEE

= 30 V,  V

DE

– Vo  = 0.5 V,

1.0 KΩ

Driver on registor

V

DD

= 4.5 V *4; O1 TO O80

R

ON

(2)

V

DD–VEE

= 20 V,  V

DE

– Vo  = 0.5 V,

1.0 KΩ

V

DD

= 4.5 V *4; O1 TO O80

Consumable current (1) I

SS

VDD–VEE= 30 V, CP = 14 kHz,

100 µA

no-load, V

DD

= 5.5 V; V

SS

Consumable current (2) I

EE

VDD–VEE= 30 V, CP = 14 kHz,

100 µA

no-load, V

DD

= 5.5 V; V

EE

Input capacity C

IN

f = 1 MHz; CP 5 pF

Electrical Characteristics at Ta = 25±2°C, VSS= 0 V, VDD= 5 V ±10%

Parameter Symbol Conditions

Ratings

Unit

min typ max

Output delay time

t

PLHCL

= 15 pF; CP → DIO1, CP → DIO80 250 ns

t

PHLCL

= 15 pF; CP → DIO1, CP → DIO80 250 ns

Switching Characteristics at Ta = 25±2°C, VSS= 0 V, VDD= 5 V±10%