SANYO LC75366M, LC75366 Datasheet

CMOS LSI

Ordering number : EN4929A

63096HA (OT)/62095HA (OT) No. 4929-1/11

SANYO Electric Co.,Ltd. Semiconductor Bussiness Headquarters

TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110 JAPAN

Two-Channel Electronic Volume Control

LC75366, 75366M

Overview

The LC75366 (DIP20) and the LC75366M (MFP20) are
electronic volume controls that can be controlled by serial
input data and provide volume, balance and loudness
functions.

Features

• Silicon gate CMOS process for low switching noise

Functions

• Volume: 0 dB to –68 dB (in 2 dB steps) and –∞;

36 positions.
A balance function can be implemented by controlling
the left and right channel volume settings independently.

• Loudness: Taps are provided at the –20 dB positions in
the 10 dB step resistor ladder used by the volume
control function. A loudness function can be
implemented by attaching external RC circuits at these
tap points.

• An address selection pin (the S pin) allows two
LC75366 chips to be used on the same bus.

• Serial data input: Supports CCB* format communication
with the system controller.

Package Dimensions

unit: mm

3021B-DIP20

• CCB is a trademark of SANYO ELECTRIC CO., LTD.

• CCB is SANYO’s original bus format and all the bus
addresses are controlled by SANYO.

unit: mm

3036B-MFP20

Specifications

Absolute Maximum Ratings at Ta = 25°C, VSS= 0 V

Parameter Symbol Conditions Ratings Unit

Maximum supply voltage V

DD

max V

DD

12 V

Maximum input voltage

V

IN

max1 CL, DI, CE, S VSS– 0.3 to VDD+ 0.3 V

V

IN

max2 L10dBIN, L2dBIN, R10dBIN, R2dBIN VSS– 0.3 to VDD+ 0.3 V
Allowable power dissipation Pd max Ta ≤ 85°C 140 mW
Operating temperature Topr –40 to +85 °C
Storage temperature Tstg –50 to +125 °C

[LC75366]

SANYO: DIP20

SANYO: MFP20

[LC75366M]

Allowable Operating Ranges at Ta = 25°C, VSS= 0 V

Electrical Characteristics at Ta = 25°C, VSS= 0 V

Pin Assignment

No. 4929-2/11

LC75366, 75366M

Parameter Symbol Conditions min typ max Unit

THD (1)

V

IN

= 1 Vrms, f = 1 kHz, all settings flat overall,

0.006 %

Total harmonic distortion

V

DD

= 9 V

THD (2)

V

IN

= 1 Vrms, f = 20 kHz, all settings flat overall,

0.015 %

V

DD

= 9 V

Crosstalk CT

V

IN

= 1 Vrms, f = 20 kHz, all settings flat overall,

85 dB

Rg = 1 kΩ

Output at maximum attenuation V

O

min

V

IN

= 1 Vrms, f = 20 kHz, volume setting: –∞,

–80 dB

with a 470 µF capacitor between L/R Vref and V

SS

Total resistance

R

VOL

(1) 10 dB steps 28.2 47 65.8 kΩ

R

VOL

(2) 2 dB steps 12 20 28 kΩ

L10dBIN, R10dBIN, LCT1, L2dBIN, R2dBIN, RCT1,

Output off leakage current Ioff L10dBOUT, R10dBOUT, LCT2, L2dBOUT, R2dBOUT, –10 +10 µA

RCT2, LVref, RVref

Input high level current I

IH

VI = VDD(CL, CE and DI pins) 10 µA

Input low level current I

IL

VI = VSS(CL, CE and DI pins) –10 µA

Output noise voltage V

N

All settings flat overall (IHF-A), VDD= 9 V, Rg = 1 kΩ 2 10 µV

Current drain I

DD

VDD– VSS= 11 V 1 mA
CT1 180 300 420 Ω

Analog switch on resistance

R

ON

For use between CT2 and Vref 90 150 210 Ω

(Design target value)

0 dB, –∞ 0.6 1.0 1.4 kΩ
Other than the above 6.0 10.0 14.0 kΩ

Parameter Symbol Conditions Ratings Unit

Supply voltage V

DD

V

DD

4.0 to 11.0 V

Input high level voltage

V

IH

(1) CL, DI, CE 0.3 VDD+ 1 to V

DD

V

V

IH

(2) S 0.8 VDDto V

DD

V

Input low level voltage

V

IL

(1) CL, DI, CE VSSto 0.2 V

DD

V

V

IL

(2) S VSSto 0.2 V

DD

V

Input voltage amplitude V

IN

L10dBIN, L2dBIN, R10dBIN, R2dBIN VSSto V

DD

Vp-p

Input pulse width t

øW

CL 1 or longer µs

Setup time t

set up

CL, DI, CE 1 or longer µs

Hold time t

hold

CL, DI, CE 1 or longer µs

Operating frequency fop CL Up to 500 kHz

Equivalent Circuit Block Diagram

Test Circuits

1. Total harmonic distortion

No. 4929-3/11

LC75366, 75366M

2. Output noise voltage

3. Crosstalk

No. 4929-4/11

LC75366, 75366M