SANYO LC73862, LC73861 Datasheet
Ordering number: EN4431A
CMOS LSI
LC73861, LC73862
DTMF Receiver LSI
Overview
The LC73861 and LC73862 are DTMF signal detector receiver
that incorporates all the necessary filters for telephone
answering machines.
Package Dimensions
unit : mm
3001B-DIP8
[LC73861, LC73862]
Features
.
16-DTMF tone signal decoder
.
DTMF receiver with all necessary filters built-in
.
Dial tone filter
.
High-group bandpass filter
.
Low-group bandpass filter
.
Extended dynamic range
.
Serial data output
.
Microcontroller guard-time compatible
.
4.5 to 5.5 V operating supply voltage range
SANYO : DIP8
Specifications
Absolute Maximum Ratings at Ta = 25°C, VSS=0V
Parameter Symbol Conditions Ratings Unit
Maximum supply voltage V
Maximum input voltage V
Maximum input current I
Maximum output voltage V
Allowable power dissipation Pd max Ta % 85°C 500 mW
Operating temperature Topr –40 to +85 °C
Storage temperature Tstg –50 to +125 °C
max –0.3 to +6.0 V
DD
max –0.3 to VDD+0.3 V
IN
max –10 to +10 mA
IN
max –0.3 to VDD+0.3 V
OUT
Allowable Operating Conditions at Ta = –40°C to +85°C, VSS=0V
Parameter Symbol Conditions min typ max Unit
Operating supply voltage V
High-level input voltage V
Low-level input voltage V
DD
IH
IL
ACK pin 0.7V
ACK pin 0.3V
4.5 5.5 V
DD
DD
DC Electrical Characteristics at Ta = 25°C ± 2°C, VDD=5V,VSS=0V
Parameter Symbol Conditions min typ max Unit
Operating supply current I
High-level output current I
Low-level output current I
Input impedance Zin INPUT pin 10 kΩ
(op) 3 7 mA
DD
OH
OL
V
= 4.6 V, SD and EST pins –0.4 mA
OUT
V
= 0.4 V, SD and EST pins 1 mA
OUT
SANYO Electric Co.,Ltd. Semiconductor Bussiness Headquarters
TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110 JAPAN
93097HA(II)/90793JN B8-0375 No.4431-1/5
V
V
LC73861, LC73862
AC Electrical Characteristics at Ta = 25°C ± 2°C, VDD=5V,VSS=0V,f
Parameter Symbol Conditions min typ max Unit
Valid input signal level See notes 1, 2, 3, 5, 6 and 9. –49.5 0 dBm
Positive twist accept See notes 2, 3, 4, 9 and 11. 6 dB
Frequency deviation accept See notes 2, 3, 5 and 9.
Frequency deviation reject See notes 2, 3 and 5. ±3.5 %
Third tone tolerance See notes 2, 3, 4, 5, 9 and 10. –16 dB
Dial tone tolerance See notes 2, 3, 4, 5, 8, 9 and 10. 22 dB
Noise tolerance See notes 2, 3, 4, 5, 7, 9 and 10. –12 dB
Tone present detect time t
Tone absent detect time t
Data shift rate 1 MHz
Data output delay time t
Setup time delay t
Data hold time t
Oscillator frequency f
Load capacitance C
DP
DA
PAD
DL
DH
OSC
See Timing Chart. 3 20 ms
See Timing Chart. 0.5 20 ms
See Timing Chart. 100 ns
See Timing Chart. 0 ns
See Timing Chart. 30 ns
LC73861 4.190109 4.194304 4.198498 MHz
LC73862 3.5759 3.5795 3.5831 MHz
OSCI and OSCO 30 pF
XO
±1.5% ±2
= 4.194304 MHz
OSC
Notes
1. 0dBm=1mWpower when driving a 600 Ω load.
2. All 16 DTMF signal frequencies.
3. 40 ms DTMF signal period and 40 ms pause period.
4. Nominal DTMF frequency.
5. Low-frequency group and High-frequency group signal levels are the same.
6. DTMF signal frequency deviation is within ±1.5% ±2 Hz.
7. Bandwidth limited (0 to 3 kHz) Gaussian noise.
8. 350 Hz and 440 Hz dial tone frequencies.
9. Error rate of less than 1 in 10,000.
10. Referenced to the lowest frequency component of the DTMF signal.
11. Twist = High-frequency group tone level ÷ Low-frequency group tone level.
Hz
Pin Assignment
Top view
Pin Description
Number Name I/O Description
1 INPUT I Input coupling capacitor required. Biased internally to V
2 OSCO O An oscillating circuit is formed by connecting a 4.194304 MHz (LC73861) / 3.579545 MHz (LC73826)
3 OSCI I
4V
5 SD O Outputs 4-bit serial decoded DTMF output, least significant bit first.
6 ACK I The ACK pin is used to shift out data to the SD pin. Four pulses are needed in order to shift out the
7 EST O Indicates the presence of a DTMF signal when HIGH. (This pin can be monitored and after a short
8V
SS
DD
oscillator and a capacitor (if needed) between these pins. (To determine whether an external
capacitor is needed or not, contact the manufacturer of the oscillator.)
Supply pin, normally 0 V
4-bit DTMF code. The data is latched by the shift register before the rising edge of the first pulse.
delay, data can be accessed by 4 pulses to ACK.)
O Supply pin, normally 4.5 V to 5.5 V
DD
/2.
No.4431-2/5
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