Sanyo LC7152NM Specifications

Ordering number: EN 3889C

CMOS IC

LC7152, 7152M, 7152NM, 7152KM

Universal Dual-PLL Frequency Synthesizers

Overview

The LC7152, 7152M, 7152NM, 7152KM are universal
dual-PLL frequency synthesizers for use in weak signal type
cordless telephone applications in the USA, South Korea, and
Japan, and broadcast satellite (BS) tuners in the USA and
Europe.

Features

.

Dual charge pump built in for fast channel switching

.

Digital lock detector enables PLL lock status check with
crystal oscillator precision

.

Programmable reference frequency divider supports various
applications

.

The LC7152NM is a built-in power-on reset circuit version
of the LC7152M

.

The LC7152KM is an enhanced frequency characteristics
version of the LC7152M

Functions

.

2-system PLL built-in (dual PLL)

.

16-bit programmable local-oscillator divider 1.5 to 55 MHz
(V

= 2.0 to 3.3 V), LC7152KM: 55 to 80 MHz (VDD=

DD

2.7 to 3.3 V)

.

14-bit programmable reference-frequency divider
320 Hz to 640 kHz reference frequency using a 10.24 MHz
crystal oscillator

.

Digital lock detector

.

Dual charge pump

.

Amplifier built-in for an active LPF

.

Serial transmission data input (CCB format)

.

LC7152NM with power-on reset circuit (pins OUTA and
OUTB become open at power-on)

.

2.0 to 3.3 V supply voltage

.

DIP24S and MFP24S packages

.

CCB is a trademark of SANYO ELECTRIC CO., LTD.

.

CCB is SANYO’s original bus format and all the bus
addresses are controlled by SANYO.

Package Dimensions

unit : mm

3067-DIP24S

[LC7152]

24

1

0.81 1.78

unit : mm

21.2

0.48

3112-MFP24S

[LC7152M, 7152NM, 7152KM]

24

112

12.6

0.35

13

6.4

7.62

12

3.25

3.9max

3.3

0.51min

0.95

SANYO : DIP24S (300 mil)

13

5.4

0.15

1.8max

1.5

0.1

1.0

0.8

SANYO : MFP24S

6.35

0.625

0.25

7.6

Any and all SANYO products described or contained herein do not have specifications that can handle
applications that require extremely high levels of reliability, such as life-support systems, aircraft’s
control systems, or other applications whose failure can be reasonably expected to result in serious
physical and/or material damage. Consult with your SANYO representative nearest you before using
any SANYO products described or contained herein in such applications.

SANYO assumes no responsibility for equipment failures that result from using products at values that
exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other
parameters) listed in products specifications of any and all SANYO products described or contained
herein.

SANYO Electric Co.,Ltd. Semiconductor Company

TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110-8534 JAPAN

61199RM (II)/41495TH(ID) No.3889-1/13

LC7152, 7152M, 7152NM, 7152KM

Specifications

Absolute Maximum Ratings at Ta = 25°C, VSS=0V

Parameter Symbol Conditions Ratings Unit

Maximum supply voltage V

Maximum input voltage

Maximum output voltage

Maximum output current

Allowable power dissipation Pd max

Operating temperature Topr –40 to +85 °C
Storage temperature Tstg –55 to +125 °C

Allowable Operating Ranges at Ta = –40 to +85°C, VSS=0V

max V

DD

V

max(1) CE, CL, DI, AIA, AIB –0.3 to +7.0 V

IN

V

max(2) XIN, PIA, PIB, TEST –0.3 to VDD+0.3 V

IN

max(1) LDI, LDB –0.3 to +7.0 V

V

O

V

max(2) AOA, AOB, OUTA, OUTB –0.3 to +15 V

O

V

max(3)

O

I

max(1) LDA, LDB, OUTA, OUTB 0to3 mA

O

I

max(2) AOA, AOB 0 to 6 mA

O

DD

PDA1, PDA2, PDB1,
PDB2, XOUT

–0.3 to +7.0 V

–0.3 to VDD+0.3 V

Ta% 85°C, LC7152 350 mW
Ta% 85°C, LC7152M,

7152NM, 7152KM

160 mW

Parameter Symbol Conditions

V

(1) V

Supply voltage

Input high-level voltage

Input low-level voltage

Output voltage

Input frequency

Input amplitude
Crystal oscillator frequency f

DD

V

(2) VDD:Serial data retention voltage, see Figure1, *1 1.5 V

DD

(3)

V

DD

V

(1) CE, CL, DI:VDD= 2.0 V 1.5 5.5 V

IH

V

(2) CE, CL, DI:VDD= 3.3 V 1.7 5.5 V

IH

V

(1) CE, CL, DI:VDD= 2.0 V 0 0.4 V

IL

V

(2) CE,CL,DI:VDD= 3.3 V 0 0.6 V

IL

V

(1) LDA, LDB 0 5.5 V

O

V

(2) AOA, AOB, OUTA, OUTB 013V

O

f

(1) XIN:Sine wave, capacitively coupled 1.0 13 MHz

IN

f

(2) PIA, PIB: Sine wave, capacitively coupled *2 1.5 55 MHz

IN

f

(3) PIA, PIB: Sine wave, capacitively coupled *3 55 80 MHz

IN

V

(1) XIN: Sine wave, capacitively coupled 200 600 mVrms

IN

V

(2) PIA, PIB: Sine wave, capacitively coupled *2,3 100 600 mVrms

IN
X’tal

DD

:Power-on reset voltage, tR^ 20 ms,

V

DD

see Figure1, *1

XIN, XOUT: CI % 50 Ω CL % 16 pF *4 4 10.24 11 MHz

Note *1 LC7152NM

FA/FB (serial data input frequency select bits)

[0] [1]

*2 f
*3 f

(2) 1.5 to 23 MHz 20 to 55 MHz 2.0 to 3.3 V

IN

(3) ————— 55 to 80 MHz 2.7 to 3.3 V LC7152KM

IN

*4 Cl is the crystal impedance and CL is the load capacitance.

Ratings

min typ max

Unit

2.0 3.3 V

0.05 V

V

DD

Device

LC7152, 7152M,
LC7152NM, 7152KM

No.3889-2/13

LC7152, 7152M, 7152NM, 7152KM

Electrical Characteristics in the allowable operating ranges

Parameter Symbol Conditions

V

(1) PDA1, PDB1: IO= 1 mA VDD– 1.0 V

Output high-level voltage

Output low-level voltage

Output off-leakage current

Input high-level current

Input low-level current

Internal feedback resistance

OH

V

(2) PDA2, PDB2: IO= 2 mA VDD– 1.0 V

OH

V

(1) PDA1, PDB1: IO1 mA 1.0 V

OL

V

(2) PDA2, PDB2: IO= 2 mA 1.0 V

OL

V

(3) OUTA, OUTB: IO=1mA 1.0 V

OL

V

(4) LDA, LDB: IO=2mA 1.0 V

OL

V

(5) AOA, AOB: IO= 0.5 mA, AIA = AIB = 1.2 V 0.5 V

OL

V

(6) AOA, AOB: IO= 1 mA, AIA = AIB = 1.3 V 0.5 V

OL

I

(1) LDA. LDB: VO= 5.5 V 5.0 µA

OFF

I

(2) PDA1, PDB1, PDA2, PDB2: VO= 0/3.3 V 0.01 10.0 nA

OFF

I

(3) AOA, AOB, OUTA, OUTB: VO=13V 5.0 µA

OFF

(1) CE, CL, DI: VI= 5.5 V 5.0 µA

I

IH

I

(2) XIN: VI= 3.3 V, VDD= 3.3 V 2.0 6.5 µA

IH

I

(3) PIA, PIB: VI= 3.3 V, VDD= 3.3 V 3.5 10.0 µA

IH

I

(4) AIA, AIB: VI= 3.3 V 0.01 10.0 nA

IH

I

(5) TEST: VI= 3.3 V, VDD= 3.3 V 120 µA

IH

I

(1) CE, CL, DI: VI= 0 V 5.0 µA

IL

I

(2) XIN: VI=0V,VDD= 3.3 V 2.0 6.5 µA

IL

I

(3) PIA, PIB: VI=0V,VDD= 3.3 V 3.5 10.0 µA

IL

I

(4) AIA, AIB: VI= 0 V 0.01 10.0 nA

IL

I

(5) TEST: VI=0V,VDD= 3.3 V 5.0 µA

IL

R

(1) XIN: VDD= 3.3 V 1.0 MΩ

f

R

(2) PIA, PIB:VDD= 3.3 V 600 kΩ

f

Internal pull-down resistance Rd TEST: V
Input capacitance C

I

Supply current*1

Supply current*2

I
I
I

DD
DD
DD
DD

IN

XIN, PIA, PIB 2.5 pF
(1) VDD(= 2.0 V):fIN= 55 MHz 3.0 8.0 mA
(2) VDD(= 3.3 V):fIN= 55 MHz 7.0 14.0 mA
(4) VDD(= 2.0 V):fIN= 55 MHz 1.5 4.5 mA
(5) VDD(= 3.3 V):fIN= 55 MHz 3.9 8.0 mA

= 3.3 V 30 kΩ

DD

Ratings

min typ max

Unit

Note *1. Dual PLL operation (both PLL-A and PLL-B), SB= 0, XIN= 10.24 MHz (crystal), PIA and PIB input = 100mVrms at

f

, all other inputs at VSS, all other outputs open.

IN

*2. Standby mode: Single PLL operation (PLL-A operating and PLL-B stopped), SB = 1, XIN = 10.24 MHz (crystal), PIA

input = 100mVrms at f

, all other inputs at VSS, all other outputs open.

IN

Pin Assignment

No.3889-3/13

Equivalent Block Diagram

LC7152, 7152M, 7152NM, 7152KM

Pin Functions

Symbol Pin No. Function
PIB 16 Side-B oscillator signal input
XIN 1
XOUT 24
PIA 14 Side-A oscillator signal output
V

DD

V

SS

CE 2
CL 3 Clock
DI 4 Data
TEST 8 IC Test
NC 7, 18 No connections
LDB

17 Power supply
15 Ground

Crystal oscillator

Serial data
input

5 Side-B unlock detection

Chip enable

Symbol Pin No. Function
PDB2 23 Sub charge pump
PDB1 22 Main charge pump
AIB 21
AOB 20
OUTB
LDA
PDA2 9 Sub charge pump
PDA1 10 Main charge pump
AIA 11
AOA 12
OUTA

19 General-purpose output port

6 Side-A unlock detection

13 General-purpose output port

Low-pass filter transistors

Low-pass filter transistors

No.3889-4/13