Sanyo LC66E516 Specifications
Any and all SANYO products described or contained herein do not have specifications that can handle
applications that require extremely high levels of reliability, such as life-support systems, aircraft’s
control systems, or other applications whose failure can be reasonably expected to result in serious
physical and/or material damage. Consult with your SANYO representative nearest you before using
any SANYO products described or contained herein in such applications.
SANYO assumes no responsibility for equipment failures that result from using products at values that
exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges,or other
parameters) listed in products specifications of any and all SANYO products described or contained
herein.
CMOS IC
4-bit Single Chip Microcontroller with EPROM
Ordering number:ENN*2928A
LC66E516
SANYO Electric Co.,Ltd. Semiconductor Business Headquarters
TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110-8534 JAPAN
Preliminary
Overview
The LC66E516 is a 4-bit single-chip microcontroller with
an EPROM on-chip, and can be used for developing and
evaluating application programs for the LC665XX series
4-bit single-chip microcontrollers.
The LC66E516 microcontroller is a 4-bit single-chip IC
with an EPROM on-chip and brought to you in ceramic
DIC64S package with a window and ceramic QFC64 package with a window. This window permits the user to erase
EPROM program data as many times as he or she wants.
Then, it could be said that this single-chip IC is best suited
for developing application programs.
The LC66E516 microcontroller has the same function and
the pin assignment as those of the 4-bit single-chip mask
programmed ROM-version LC66E516 microcontroller . The
on-chip EPROM is 16k bytes in size.
Features
• Optional functions user-selectable by speciflying EPROM
option data.
The 56 optional functions on the LC665XX series singlechip microcontrollers can be selected by writing appropriate data to the on-chip EPROM. This function specification by the user allows application system to be developed and tested under the same working environment as
that of production chip. In other words, the same interface circuit functions as those of production chips can be
built up by the user.
Please note that the above-mentioned optional functions
include port output type(open-drain or pull-up), output
pin logic level at reset, watchdog timer selection and the
like.
• On-chip 16KB EPROM
The on-chip EPROM enable the user to develop and evaluate application programs which can be run on every
LC665XX series microcontroller. Please note that the
LC665XX series microcontrollers are LC66506B,
LC66508B, LC66512B, LC66516B, LC66556A,
LC66558A, LC66562A, LC66566A, LC66556B,
LC66558B, LC66562B, LC66566B and that they are listed
in the table on page 18 with a few pieces of information.
• Write/Read operation with an EPROM writer
Used with the dedicated writer board (W66E516DH for
DIC, W66E516QH for QFC), an EPROM writer available on your local market permits the user to write or read
data to or form the 16KB on-chip EPROM. Please note
that the EPROM writer should be an ADVANTEST product or the EVA800/850 accessory writer used for the 27128
type EPROM.
• Pin-compatible with a mask programmed ROM-version
single-chip microcontroller (LC66516B, for example)
• Instruction cycle time:0.92µs to 10µs
• Single +5V power supply (Ta=10°C to 40°C)
O2501TN (KT)/71595HA/0268TA(KI) No.2928–1/18
LC66E516
Usage notes
The LC66E516 single-chip IC is intended for use by those who are in charge of the development and evaluation of application programs for the LC665XX series 4-bit single-chip microcontrollers. please keep in mind the following when the
user application developers are to work with this single-chip microcontroller.
• Notes on LC66E516 internal operations after reset
As the figure shows, the LC66E516 microcontroller starts normal
program execution at least 3 instruction cycles later after the oscillation by the OSC function block becomes stable. In other words,
the RES pin level (active low) must be active for at least 3 instruction cycles after the oscillation becomes stabilized. As the figure
also shows, the oscillation stabilization requires more than 10 milliseconds. It is also shown that option data setting requires 8 instruction cycles after the RES pin level changes to the inactive level (or
voltage level). After all those operations are carried out, the
to V
IH
LC66E516 microcontroller starts program execution normally from
address 0 in the EPROM (that is, the content at address 0 is automatically set in the program counter (PC)). At this point, Please
note that port output type will be open-drain, not pull-up output
type, as long as the RES pin stays active.
• Notes on evaluation of user application programs for the LC66506, LC66508, LC66512, LC66556, LC66558, LC66562,
microcontrollers
The above six mask programmed ROM-version microcontrollers are equipped with different ROMs in size from that of
the LC66E516 microcontroller. Therefore, the following things should be taken into consider ation when you are to mak e
an access to the ROM on the LC66E516 microcontroller.
First, it should be kept in mind that the last 8 addresses between 3FF8 and 3FFF are used by the user in order to specify
functional option data. This 8-byte area is called option specification area. This option specification area must be exclusively used for storing function option data. The option specification will be discussed in detail later in this catalog.
As far as the cross assembler to be employed is concerned, the user should use the one for the LC66516 microcontroller.
In addition, when you write your user application program, you cannot make any access to addresses beyond the area of
a mask programmed ROM. Such addresses cannot exist an ywhere on mask programmed ROM-version microcontrollers.
T o avoid such an illegal access to those nonexistent area, it is recommended that jump (or branc h) operations with a JMP
instruction and so on be used in your user application program. Furthermore, please write "0" to the area beyond that of
a mask programmed ROM. In this case, needless to say, the last 8 addresses of the EPR OM should be e xcluded fr om the
"0" padding.
When evaluating the LC66506, LC66508, LC66556, LC66558, do not use the SB instruction.
• Program protection from exposure to light
Exposure to light will destroy the precious EPROM data that you ha v e entered with much labor. In order to protect them,
it should be strongly recommended that the EPROM window should be covered with an opaque label while you are at
work with the EPROM.
• For the LC66E516/P516, if the RES is set to "L" level during the HOLD mode (HOLD=L), be sure to change the HOLD
level from "L" to "H" and then change the RES level from "L" to "H" when releasing the HOLD mode.
No.2928–2/18
LC66E516
Option-specified output type
“FFO
H
” is set.
4.0V to 6.0V/0.92 to 10
µs (tool:5V ±5%)
–30 to +70°C
2.5mA max.(4MHz ceramic resonator oscillation)
3.5mA max.(4MHz external clock source)
2.5mA max.(3MHz typ.RC oscillation)
(tool:evaluation impossible)
LC6655X series
65536 cycles
Approx. 64ms at 4MHz (Tcyc=1
µs)
16384 cycles
Approx. 32ms at 2MHz (Tcyc=2
µs)
Approx. 64ms at 1MHz (Tcyc=4
µs)
4.5V to 5.5V/0.92 to 10
µs
Open-drain output (other than P0, P1) (floating)
H/L output(P0, P1)with pull-up
“FFO
H
” is set.
65536 cycles
Approx. 64ms at 4MHz (Tcyc=1
µs)
LC665XX series(masked ROM version)
10 to 40°C
C=100pF
R=2.7kΩ(tool:R=2.2kΩ)
C=100pF
R=2.2kΩ
5.0mA max. (4MHz ceramic resonator oscillation)
6.0mA max. (4MHz external clock source)
5.0mA max. (3MHz typ. RC oscillation)
LC6650X series(including tool)
DIP64S
QFP64E
Not applicable
2.5mA max.(4MHz ceramic resonator oscillation)
3.5mA max.(4MHz external clock source)
DIP64S
QFP64A
LC66E516
Option-specified output type
“FFC
H
” is set.
DlC64S with window
QFC64 with window
2.2V to 5.5V/3.92 to 10
µs
3.0V to 5.5V/1.96 to 10
µs
Case outline (package)
• Port output type during reset
• Value(including the value after HOLD mode
release)of timer 0 during reset
Item
Differences in system
• Hardware wait time (number of cycles)at HOLD
mode released state
• External constants for RC oscillation
• Current drain during HALT mode ON (l
DD
HALT)
Differences in main characteristics
• Operating supply voltage/operating speed
• Operating free-air temperature (Topr)
Comparison of LC66E516 and the masked ROM version(LC665XX)
No.2928–3/18
Pin Assignments
DIC64S with window QFC64 with window
LC66E516
Block Diagram
No.2928–4/18
Pin Function
Pin name
P00/D0
P01/D1
P02/D2
P03/D3
P10/D4
P11/D5
P12/D6
P13/D7
P20/Sl0/A0
P21/SO0/A1
P22/SCK0/A2
P23/INT0/A3
LC66E516
Input/
output
Input/output port pins P00 to P03
I/O · Pch: Pull-up (Pu) MOS
· Used for input/output operation in 4-bit
units or bit units.
· Used for controlling HALT mode
operation.
Input/output port pins P10 to P13
I/O
· Used for input/output operation in 4-bit
units or bit units.
I/O
· Used for input/output operation in 4-bit
units or bit units.
· P20: Common with serial input SI0
P21: Common with serial output SO0
P22: Common with serial clock SCK0
· P23: Common with INT0 interrupt
request input, timer 0-used
event count input, pulse width
measurement input
Functional description
Input/output port pins P20 to P23
Output driver circuit
output type
type
· Nch: Small sink current
output type
· Pch: Pull-up (Pu) MOS
type
· Nch: Small sink current
output type
· Pch: CMOS type
· Nch: Small sink current
output type
· +15V withstand voltage at
Nch open drain (OD)
output
Option
· Pull-up (Pu) MOS
output type or Nch
open-drain (OD)
output type
· Output pin level at
reset
· Pu MOS output
type or Nch OD
output type
· Output pin level at
reset
· CMOS output type
or Nch OD output
type
During EPROM
mode operation
Data input/output
pins
(D0 to D3)
Data input/output
pins
(D4 to D7)
Address input
(A0 to A3)
P30/INT1/A4
P31/POUT0/A5
P32/POUT1/A6
P33/HOLD
P40/A7
P41/A8
P42/A9
P43/A10
P51/A12
P52/A13
P53
Input/output port pins P30 to P32
I/O
· Used for input/output operation in 3-bit
units or bit units and for input operation
in 4-bit units (together with the P33 pin)
or bit units.
· P30 : Common with INT1 interrupt
request input
· P31 : Common with burst pulse output
from timer 0
· P32 : Common with burst pulse output
from timer 1 and PWM output
I
HOLD mode control signal input
· Used for activating HOLD operation
mode with HOLD = L (active low) by
using a HOLD instruction.
· Used for restarting the CPU operation
from the HOLD mode operation by
changing the HOLD pin level from L to
H.
· Used as input port pin P33 to form a 4 bit input port with P30 to P32.
· The CPU blocks cannot be reset even if
the RES (active low) pin level changes
from H to L, with the HOLD pin level
= L. This means that you cannot write
a user application program requiring
the P33/HOLD pin to enter the L level
state at the moment the system is
powered on.
Input/output port pins P40 to P43
I/O
· Used for input/output operation in 4-bit
units or bit units.
· These four pins, combined with port
pins P50 to P53, can be used for
input/output operation in 8-bit units.
· These four pins, together with port pins
P50 to P53, can be used for 8-bit
ROM data output.
Input/output port pins P50 to P53
I/OP50/A11
· Used for input/output operation in 4-bit
units or bit units.
· These four pins, combined with port
pins P40 to P43, can be used for
input/output operation in 8-bit units.
· These four pins, together with port pins
P40 to P43, can be used for 8-bits ROM
data output.
· Pch: CMOS type
· Nch: Small sink current
output type
· +15V withstand voltage
for Nch OD output
· Pch: Pull-up (Pu) MOS
type
· Nch: Small sink current
output type
· Pch: Pull-up (Pu) MOS
type
· Nch: Small sink current
output type
· CMOS output type
or Nch OD output
type
· Pu MOS output type
or Nch OD output
type
· Pu MOS output type
or Nch OD output
type
Continued on next page.
Address input
(A4 to A6)
Address input
(A7 to A10)
Address input
(A11 to A13)
No.2928–5/18
Continued from preceding page.
Pin name
P60/SI1
P61/SO1
P62/SCK1
P63/PIN1
Input/
output
I/O
LC66E516
Input/output port pins P60 to P63
· Used for input/output operation in 4-bit
units or bit units.
· P60: Common with serial input SI1
· P61: Common with serial output SO1
· P62: Common with serial clock SCK1
· P63: Common with timer 1-used event
count input
Output driver circuit
output type
· Pch: CMOS type
· Nch: Small sink current
output type
· +15V withstand voltage
for Nch OD output
OptionFunctional description
· CMOS output type
or Nch OD output
type
During EPROM
mode operation
P70
P71
P72
P73
P80
P81
P82
P83
P90/INT2
P91/INT3
P92/INT4
P93/INT5
PA0
PA1
PA2
PA3
PB0
PB1
PB2
PB3
PC0
PC1
PC2/VREF0
PC3/VERF1
Output port pins P70 to P73
O
· Used for output operation in 4-bit units or
in bit units.
· If you use an input-related instruction in
your application program, the content of
the output latch will be input.
Output port pins P80 to P83
O
· Used for output operation in 4-bit units or
bit units.
· If you use an input-related instruction in
your application program,the content of
the output latch will be read in.
· Pch OD output type optionally available.
More about this later.
Input/output port pins P90 to P93
I/O
· Used for input/output operation in 4-bit
units or bit units.
· P90: Common with INT2 interrupt request
input
· P91: Common with INT3 interrupt request
input
· P92: Common with INT4 interrupt request
input
· P93: Common with INT5 interrupt request
input
O
Output port pins PA0 to PA3
· Used for input operation in 4-bit units or bit
units.
· If you use an input-related instruction in
your application program, the content of
the output latch will be read in.
Output port pins PB0 to PB3
O
· Used for output operation in 4-bit units or
bit units.
· If you use an input-related instruction in
your application program, the content of
the output latch will be read in.
I/O
Input/output port pins PC0 to PC3
· Used for input/output operation in 4-bit
units or bit units.
· PC2: Common with VREF0 comparator
comparison voltage terminal
· PC3: Common with VREF1 comparator
comparison voltage terminal
· Pch: Pull-up (Pu) MOS
type
· Nch: Medium sink
current output type
· +15V withstand voltage
for Nch OD output type
· Pch: CMOS type
· Nch: Small sink current
type
· Pch: CMOS type
· Nch: Small sink current
type
· Pch: Pull-up (Pu) MOS
type
· Nch: Medium sink
current type
· +15V withstand voltage
for Nch OD output type
· Pch: Pull-up (Pu) MOS
type
· Nch: Medium sink
current type
· Pch: CMOS type
· Nch: Small sink current
type
· Pu MOS output type
or Nch output type
· CMOS output type
or Pch OD output
type
· Output pin level at
reset
· CMOS output type
or Nch OD output
type
· Pu MOS output type
or Nch OD output
type
· Pu MOS output type
or Nch OD output
type
· CMOS output type
or Nch OD output
type
PD0/CMP0
PD1/CMP1
PD2/CMP2/PRS
PD3/CMP3/PGM
PE0/TRA/CE
PE1/TRB/OE
Input port pins PD0 to PD3
I
· These four pins can be programmed for
comparator inputs in user application
programs. PD0 input will be compared
with VREF0. Other inputs will be
compared with VREF1. Please note that
there are four comparators available in this
system and these four comparators are
grouped into two (one group: CMP0 and
CMP1. the other group: CMP2 and CMP3),
and that the comparators must be selected
in group units.
I Input port pins PE0 to PE1
· These two tristate input port pins can be
controlled in your application programs.
EPROM control
signal inputs
(PRS and PGM)
EPROM controi
signal inputs
(OE and CE)
Continued on next page.
No.2928–6/18
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