Sanyo LC6528N Specifications
Ordering number : ENN4363D
LC6527N/F/L, 6528N/F/L
CMOS IC
LC6527N/F/L, 6528N/F/L
Single Chip 4-Bit Microcontroller
for Small-Scale Control-Oriented Applications
The LC6527N / F / L, LC6528N / F / L belong to our single-chip 4-bit microcontroller LC6500 series fabicated using
CMOS process technology and are suited for use in small-scale control-oriented applications. Their basic asrchitecture
and instruction set are the same. Application areas include the standard logic circuits and applications where the number
of controls is small. The LC6527N / F / L, LC6528N / F / L have relation to the LC6527C / H, LC6528C / H. The C
version can be replaced by N version, and the H version (a part of the function is different). The L version is added as a
low voltage version. The following show the careful difference of C and N version when you replace C version with N
version.
C version N version
Operating Temperature -30°C to +70°C -40°C to +85°C
1-pin C oscillation exist not exist
400kHz MURATA C1=C2=330pF C1=C2=220pF
R=0Ω R=2.2kΩ
800kHz MURATA C1=C2=220pF C1=C2=100pF
R=0Ω R=2.2kΩ
KYOCERA C1=C2=220pF C1=C2=110pF
R=0Ω
1MHz MURATA C1=C2=220pF C1=C2=100pF
CF Oscillation Constant
(Note) The suffix of recommend oscillation is changed C version and N version, but the characteristic is no change.
R=0Ω R=2.2kΩ
Features
1) CMOS technology for a low-power operation (with instruction-controlled standby function)
2) ROM / RAM
LC6527N / F / L ROM : 1K ✕ 8bits, RAM : 64 ✕ 4bits
LC6528N / F / L ROM : 0.5K ✕ 8bits, RAM : 32 ✕ 4bits
3) Instruction set : 51 kinds selectable from 80 instructions common to the LC6500 series
4) Wide operating voltage range from 2.2V to 6.0V (L version)
5) Instruction cycle time of 0.92µs (F version)
Any and all SANYO products described or contained herein do not have specifications that can handle
applications that require extremely high levels of reliability, such as life-support systems, aircraft's
control systems, or other applications whose failure can be reasonably expected to result in serious
physical and/or material damage. Consult with your SANYO representative nearest you before using
any SANYO products described or contained herein in such applications.
SANYO assumes no responsibility for equipment failures that result from using products at values that
exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other
parameters) listed in products specifications of any and all SANYO products described or contained
herein.
Ver. 1.01A
72294
SANYO Electric Co.,Ltd. Semiconductor Company
TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110-8534 JAPAN
13001 RM (IM) YATSU
No.4363-1/28
LC6527N/F/L, 6528N/F/L
6) Flexible I / O port
• Number of ports : 4 ports / 13 pins max.
• All ports : Input / output common
Input / output voltage 15V max. (open drain type)
Output current 20mA max. (sink current) (LED direct drivable)
• Option selectable for your intended system
A. Open drain output, pull-up resistor : Single-bit select for all ports
B. Output level at the reset mode : 4-bit select of H / L level for port C / D
7) Stack level : 4 levels
8) Timer : 4-bit prescaler+8-bit programmable timer
9) Clock oscillation option selectable for your intended system
• Oscillator option :2-pin RC oscillation (N, L version)
2-pin ceramic resonator oscillation, 1-pin external clock input (N, F, L version)
• Predivider option : No predivider, 1 / 3 predivider, 1 / 4 predivider (N, L version)
Function Table
Item LC6527N / 28N LC6527F / 28F LC6527L / 28L
ROM 1024 ✕ 8 bits (27N) 1024 ✕ 8 bits (27F) 1024 ✕ 8 bits (27L)
512 ✕ 8 bits (28N) 512 ✕ 8 bits (28F) 512 ✕ 8 bits (28L)
RAM 64 ✕ 4 bits (27N) 64 ✕ 4 bits (27F) 64 ✕ 4 bits (27L)
Memory
Instruction set 51 51 51
tion
Instruc-
Timer 4-bit prescaler+8-bit timer 4-bit prescaler+8-bit timer 4-bit prescaler+8-bit timer
Stack level 4 4 4
Standby function Standby available Standby available Standby available
On-chip
function
Number of ports I / O 13 max. I / O 13 max. I / O 13 max.
I / O voltage 15V max. 15V max. 15V max.
Output current 10mA typ. 20mA max. 10mA typ. 20mA max. 10mA typ. 20mA max.
port
I / O circuit configuration Open drain (N-channel) or pull-up resistor-provided output selectable bit by bit.
Input / output
Output level at reset mode “H” or “L” level selectable port by port (port C, D only)
Minimum cycle time 2.77µs (VDD≥4V) 0.92µs (VDD≥4.5V) 3.84µs (VDD≥2.2V)
Supply voltage 3 to 6V 4.5 to 6V 2.2 to 6V
teristic
Charac-
Current dissipation 2.5mA typ. 4mA typ. 2.5mA typ.
Resonator RC (850kHz, 400kHz typ.) RC (400kHz typ.)
predivider option 1 / 1, 1 / 3, 1 / 4 1 / 1 1 / 1, 1 / 3, 1 / 4
Oscillation
Other
Package DIP18, MFP18* DIP18, MFP18* DIP18, MFP18*
(Note) Information on the resonator and oscillation circuit constants will be presented as soon as the recommended
circuit is determined.
*MFP18 : under development
32 ✕ 4 bits (28N) 32 ✕ 4 bits (28F) 32 ✕ 4 bits (28L)
by HALT instruction by HALT instruction by HALT instruction
6.0µs (VDD≥3V)
ceramic (400k, 800k,1MHz, ceramic 4MHz ceramic (400k, 800k,1MHz,
4MHz) 4MHz)
No.4363-2/28
LC6527N/F/L, 6528N/F/L
Pin Assignment Package Dimentions
LC6527N / F / L unit : mm
LC6528N / F / L 3007B
OSC1
TEST
V
SS
RES
PA0
PA1
PA2
PA3
V
DD
1
2
3
4
5
6
7
8
9
Common to DIP • MFP
18
17
16
15
14
13
12
11
10
ILC00139
OSC2 / PH0
PD3
PD2
PD1
PD0
PC3
PC2
PC1
PC0
(1.84)
18
1
2.54
24.0
10
6.4
7.62
9
(3.25)
3.85max
3.3
1.20.5
0.51min
SANYO : DIP18(300mil)
0.25
• Do not immerse the package in the solder
dip tank when mounting the MFP on the substrate.
unit : mm
3095
18
1
12.6
0.35
10
5.4
6.35
9
1.27
1.22
1.5
0.1
0.15
1.8max
0.625
SANYO : MFP-18(300mil)
7.6
(Note) The package is the reference figure without the
description of the rank. Please inquire us for the
formal package.
No.4363-3/28
Pin Name
OSC1, OSC2 : R, C or ceramic resonator for OSC PH0 : Input / output common port H 0
RES : Reset TEST : Test
PA 0-3 : Input / output common port A 0-3
PC 0-3 : Input / output common port C 0-3
PD 0-3 : Input / output common port D 0-3
System Block Diagram
LC6527N/F/L, 6528N/F/L
LC6527N / F / L, LC6528N / F / L
PA0-3
Port A Port C Port D Port H
E A
PC0-3 PD0-3 PH0
I / O BUS
I / O Buffer
RAM
(Note 2)
DP
SYSTEM BUS
Note 1
PC
STACK1
STACK2
STACK3
STACK4
CF ZF
OSC2
STS
Note 1
OSC
OSC1
I.R
TMF
ROM
(Note 2)
I.DEC
TMALU
TEST
RES
V
DD
V
SS
ILC00140
Note1. The PH0 pin or OSC2 pin is selected by the mask option.
Note2. LC6527N / F / N ROM : 1024 bytes RAM : 64 words
LC6528N / F / N ROM : 512 bytes RAM : 32 words
No.4363-4/28
LC6527N/F/L, 6528N/F/L
Development Support Tools
The following are available to support the program development for the LC6527, LC6528.
(1) User’s Manual
“LC6527, LC6528 User’s Manual” No. 24-6016 (’86.10.1.)
Note : Do not use “LC6523 Series User’s Manual” No.16A-7015 and No.16-9064.
(2) Development Tool Manual
For the EVA-800 or the EVA-850 system, refer to “EVA-800. LC6527, LC6528 Development Tool Manual”.
(3) Development Tools
A. For program evaluation
1. Piggy back (LC65PG23 / 26)
2. 23T27 ; The pin-to-pin conversion socket for the piggy back LC65PG23 / 26.
B. EVA-86000 system for program development is on development.
C. For program evaluation
microcontroller built-in EPROM (LC65E29)+conversion substrate (29T027)
Note. For notes for program evaluation, do not fail to refer to ‘4-3. Notes when evaluating programs’in
“LC6527, LC6528 User’s Manual”.
to EVA-410 or EVA-420
CN-1
EPROM
LC6596
FAP-20-03#2
CN-3
FAS-20-03B
45cm
FGP-20-01#2 removed the10 pin and 11 pin can be
used for the DIP18.
2.54mm pitch
flat cable
1 pin
2.54mm pitch
DIP18
FAP-40-03#2
NFP-30A-0112
(34A)
CN2
EPROM (2732, 2764)
Piggy back
LC65PG23 / 26
Conversion board
23T27
ILC00141
ILC00142
Fig.1 Evaluation kit terget board Fig. 2 Program evaluation
(EVA-TB6523C / 26C / 27C / 28C)
No.4363-5/28
LC6527N/F/L, 6528N/F/L
D. For program development (EVA-800 or EVA-850 system)
1. MS-DOS for host system (Note 1)
2. Cross assembler......MS-DOS base cross assembler : <LC65S.EXE>
3. Host control program
4. Evaluation chip : LC6596
5. Emulator : EVA-800 or EVA-850 emulator and evaluation boards EVA800-TB6527 / 28
Appearance of Development Support System
• Host processor control program
• LC65S.EXE cross assembler
MS--DOS personal computer
EVA-800 or EVA-850
emulator (note 2)
CN1, CN2
LC6596
Evaluation chip board
CN3
CABLE9
FS-20
SAP20
1 pin
User's application board
Remove the 10 and 11 pin, and use for DIP18
EVA800-TB6527 / 28
ILC00143
(Note 1) MS-DOS : Trademark of Microsoft Corporation
(Note 2) The EVA-800, EVA-850 are general term for emulator. A suffix (A, B,...) is added at the end of EVA-800 and
EVA-850 as they are improved to be a newer version. Do not use the EVA-800 and EVA-850 with no suffix
added.
No.4363-6/28
LC6527N/F/L, 6528N/F/L
Pin Description
Pin name Pins I / O Function Option Reset Mode
V
DD
V
SS
OSC1 1 Input • Pin for externally connecting RC, 1) 1-pin external clock input –
PA 0 to 4 Input / • I / O port A0 to 3 1) Open drain type output • “H” output (Output
PA3 output 4-bit input (IP instruction) 2) With pull-up resistor Nch transistor : OFF)
PC0 to 4 Input / • I / O port C0 to 3 1) Open drain type output • “H” output
PC3 output same as for PA0 to 3 (Note) • “L” output
PD0 to 4 Input / • I / O port D0 to 3 Same as for PC0 to 3 Same as for PC0 to 3
PD3 output Same as for PC0 to 3
PH0 / 1 Input / • I / O port H0 Same as for PA0 to 3 Same as for PA0 to 3
OSC2 output Same as for PA0 to 3 (Note)
RES 1 Input • System reset input
TEST 1 Input • LSI test pin
1 – Power supply – –
1–
ceramic resonator for system 2) 2-pin RC OSC
clock generation. 3) 2-pin ceramic resonator
• For 1-pin external clock input, OSC
the PH0 / OSC2 pin is used as 4) Predivider option
I / O port PH0. 1. No predivider
• For 2-pin RC OSC, 2-pin ceramic 2. 1 / 3 predivider
resonator OSC, the PH0 / OSC2 3. 1 / 4 predivider
pin is used as OSC pin OSC2.
4-bit output (OP instruction) 1), 2) : Specified bit by bit
Single-bit decision (BP, BNP
instruction)
Single-bit set / reset (SPB, RPB
instruction)
• Standby is controlled by PA3.
• The PA3 pin must be free from
chattering during the HALT
instruction execution cycle.
• Option permits output at the reset 2) With pull-up resistor (Option-selectable)
mode to be “H” or “L”. 3) Output at reset mode : “H”
(Note) No standby control function 4) Output at reset mode : “L”
is provided. • 1), 2) : Specified bit by bit
• 3), 4) : Specified in a
group of 4 bits
• Single-bit configuration
• For 2-pin OSC, this pin is used as
the OSC2 pin, providing no
function as I / O port.
(Note) No standby control function
is provided
• For power-up reset, C is connected
externally.
• For reset restart, “L” level is
applied for 4 clock cycles or more.
Normally connected to V
SS
No.4363-7/28
LC6527N/F/L, 6528N/F/L
Oscillator circuit option
Option Name Circuit Conditions, etc.
1. External clock The PH0 / OSC2 pin is used as port
2. 2-pin RC OSC The PH0 / OSC2 pin is used as OSC
Cext
OSC1
OSC1
PH0 / OSC2
PH0.
ILC00102
pin OSC2, providing no function
as port.
Rext
3. Ceramic resonator The PH0 / OSC2 pin is used as OSC
C1
OSC1
ILC00144
OSC pin OSC2, providing no function
Ceramic
resonator
C2
PH0 / OSC2
R
ILC00145
as port.
Predivider Option
Option Name Circuit Conditions, etc.
1. No predivider • Applicable to all of 3 OSC options.
(1 / 1) • The OSC frequency, external clock do not
fOSC
OSC circuit
Timing
ILC00105
2. 1 / 3 predivider • Applicable to only 2 OSC options of
fOSC
OSC circuit
1 / 3
predivider
fOSC
3
Timing
exceed 1444kHz. (LC6527N, 6528N)
• The OSC frequency, external clock do not
generator
exceed 4330kHz. (LC6527F, 6528F)
• The OSC frequency, external clock do not
exceed 1040kHz. (LC6527L, 6528L)
external clock, ceramic resonator OSC.
• The OSC frequency, external clock do not
exceed 4330kHz.
generator
ILC00106
3. 1 / 4 predivider • Applicable to only 2 OSC options of
fOSC
OSC circuit
1 / 4
predivider
fOSC
4
Timing
ILC00107
external clock, ceramic resonator OSC.
• The OSC frequency, external clock do not
exceed 4330kHz.
generator
Note : The OSC option and predivider option are summarized below. Full care must be exercised.
No.4363-8/28
LC6527N/F/L, 6528N/F/L
Table of OSC, predivider Option of LC6527N / 28N, 27F / 28F and 27L / 28L
LC6527N, LC6528N
Circuit Configuration Frequency Predivider Option VDD Range
(Cycle time)
Ceramic resonator OSC 400kHz 1 / 1 (10µs) 3 to 6V Unusable with 1 / 3, 1 / 4
predivider
800kHz 1 / 1 (5µs) 4 to 6V
1 / 3 (15µs) 4 to 6V
1 / 4 (20µs) 4 to 6V
1MHz 1 / 1 (4µs) 4 to 6V
1 / 3 (12µs) 4 to 6V
1 / 4 (16µs) 4 to 6V
4kHz 1 / 3 (3µs) 4 to 6V Unusable with 1 / 1 predivider
1 / 4 (4µs) 4 to 6V
1-pin external clock 200k to 677kHz 1 / 1 (20 to 6µs) 3 to 6V
600k to 2000kHz 1 / 3 (20 to 6µs) 3 to 6V
800k to 2667kHz 1 / 4 (20 to 6µs) 3 to 6V
200k to 1444kHz 1 / 1 (20 to 2.77µs) 4 to 6V
600k to 4330kHz 1 / 3 (20 to 2.77µs) 4 to 6V
800k to 4330kHz 1 / 4 (20 to 3.70µs) 4 to 6V
External clock by 2-pin Same as above
RC OSC circuit
2-pin RC Used with 1 / 1 predivider, 3 to 6V
recommended constants. If used with 4 to 6V
other than recommended constants, the frequency,
predivider option, VDD range must be the same as for
1-pin external clock.
External clock input to the The ceramic oscillation circuit cannot be driven by external clock.
ceramic oscillation circuit To drive the circuit with external clock, select the external clock option or the 2-pin
RC option.
Remarks
LC6527F, LC6528F
Circuit Configuration Frequency Predivider Option VDD Range
(Cycle time)
Ceramic resonator OSC 4MHz 1 / 1 (1µs) 4.5 to 6V
1-pin external clock 200k to 4330kHz 1 / 1 (20 to 0.92µs) 4.5 to 6V
External clock input to the The ceramic oscillation circuit cannot be driven by external clock.
ceramic oscillation circuit To drive the circuit with external clock, select the external clock option.
Remarks
No.4363-9/28
Loading...