Sanyo LC58E76 Specifications

Ordering number : EN*4434

O3098HA (OT)/42194TH (OT) No. 4434-1/17

LC58E76

SANYO Electric Co.,Ltd. Semiconductor Bussiness Headquarters

TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110-8534 JAPAN

On-Chip EPROM Microcomputer

4-Bit Single Chip Microprocessor with LCD Driver,

12 Kbytes of EPROM and 1 Kbit of RAM On-Chip

CMOS IC

Any and all SANYO products described or contained herein do not have specifications that can handle
applications that require extremely high levels of reliability, such as life-support systems, aircraft’s
control systems, or other applications whose failure can be reasonably expected to result in serious
physical and/or material damage. Consult with your SANYO representative nearest you before using
any SANYO products described or contained herein in such applications.

SANYO assumes no responsibility for equipment failures that result from using products at values that
exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other
parameters) listed in products specifications of any and all SANYO products described or contained
herein.

Overview

The LC58E76 is an on-chip EPROM microcontroller in
the LC587X series of CMOS 4-bit single chip
microcontrollers.
The LC58E76 provides the same functionality as the
LC5876 mask ROM version, and has the same pin layout.
The LC58E76 has a 16-kbyte EPROM capacity, and
corresponds to the LC5872, LC5873, LC58E74 and
LC5876.
The LC58E76 is provided in an 80-pin ceramic window
package, and programs can be written and erased
repeatedly. Thus it is optimal for use during program
development.

Applications

The LC58E76 can be used for program and function
evaluation in the following applications.

• System control of consumer products that use LCD
displays, such as cameras, CD players and tuners

• Remote controllers for products such as VCRs or tuners

• System control of instruments that use LCD displays,
such as miniature test equipment and medical
equipment.

• The LC58E76 is optimal for products that use LCD
displays, in particular, battery operated products.

Features

• Optional functions can be switched by EPROM data
settings.
The LC58E76 includes both program and option
selection EPROM on-chip. The option selection
EPROM can be used to specify almost all of the
LC587X options, including crystal/ceramic oscillator
specifications, port hold transistor selection and segment
PLA specifications. These option specifications allow

functional and operational testing in the actual PC board
used in the mass-produced end product.

• On-chip 16 kbyte program EPROM
The on-chip 16 kbyte program EPROM allows the
LC58E76 to be used to evaluate all four members of the
LC587X series. (See the series structure table on the
next page.)

• Program and option data read/write
The program and option data can be read and written
with a standard commercial EPROM writer by using a
dedicated EPROM writing board. (256K equivalent)
(Either a Sanyo or an Advanced EPROM writer should
be used.)

• Pin correspondence
The LC58E76 is pin compatible with the mask ROM
versions. (There is no chip correspondence.)

Package Dimensions

unit: mm

3152A-QFC80

[LC58E76]

SANYO: QFC80

Series Structure

Usage Notes

The LC58E76 is designed for use in developing and evaluating programs for the microprocessors in the
LC587X series. However, there are differences between the LC58E76 and the mask ROM versions. Keep the
following points in mind when using the LC58E76.

1. Notes on Reset
When the RES pin input changes from high to low, the reset state is cleared after the prescribed oscillator
stabilization period has elapsed. The options and the segment PLA are set up during the first 256 cycles following the
clearing of the reset state. Instructions are executed starting at location 0 after this setup phase has completed. (The
options are undefined and the segment outputs are held at the VSSlevel when the RES pin is high and during the first
256 cycles following the clearing of the reset state.)

2. Cover the LC58E76’s window with an opaque seal when writing data to EPROM.

3. The LC58E76 and the mask ROM versions differ in the following points.

Note: Although the strobes number 00 to 1E can be used with CF 2 MHz and lower specifications, strobes number 0E, 0F and 1E cannot be used with the

CF 4 MHz specifications.

No. 4434-2/17

LC58E76

Type No.

LC5872 LC5873 LC5874 LC5876 LC58E76

Item
ROM capacity 2 k

× 16 bits 3 k × 16 bits 4 k × 16 bits 6 k × 16 bits EPROM: 16 kbytes

RAM capacity 256 × 4 bits 256 × 4 bits 256× 4 bits 256 × 4 bits 256 × 4 bits

Package QIP80 QIP80 QIP80 QIP80

QFC80 ceramic window
package

The on-chip EPROM

Notes Available in quantity Available in quantity Available in quantity Available in quantity window version will be

available shortly.

Item LC58E76 Mask ROM versions (LC587X) Note
Operating temperature 10 to 40°C –30 to 70°C
Operating supply voltage 2.8 to 5.5 V 2.0 to 6.0 V

5 µA typ. (3 V, 32 kHz crystal) 4 µA typ. (3 V, 32 kHz crystal)
20 µA typ. (5 V, 32 kHz crystal) 15 µA typ. (5 V, 32 kHz crystal)

Operating supply currents 400 µA typ. (5 V, 400 kHz ceramic) 400 µA typ. (5 V, 400 kHz ceramic) Hold mode

500 µA typ. (5 V, 2 MHz ceramic) 500 µA typ. (5 V, 2 MHz ceramic)
700 µA typ. (5 V, 4 MHz ceramic) 700 µA typ. (5 V, 4 MHz ceramic)

Common segment output Segment pins: VSS level (CMOS output) Static operation
states at reset Common pins: N-channel open drain (LCD drive output)

Segment output states
after the reset state is Off state Off state/lit state
cleared

Oscillator circuit

CF/Xtal/CF + Xtal

CF/Xtal/CF + Xtal

specifications RC/RC+Xtal/EXT/EXT+Xtal
Crystal oscillator circuit

32K/38K/65K (Note that this is 65K in the

32K/38K/65K

reset state)

Open (reset on high)

RES pin specifications Open (reset on high)

Open (reset on low)
Pull-up (reset on low)
Pull-down (reset on high)

N ports Open drain output Open drain output/CMOS output

Static Static
1/2 bias, 1/2 duty 1/2 bias, 1/2 duty
1/2 bias, 1/3 duty 1/2 bias, 1/3 duty

LCD drive specifications

1/2 bias, 1/4 duty 1/2 bias, 1/4 duty
1/3 bias, 1/3 duty 1/3 bias, 1/3 duty
1/3 bias, 1/4 duty 1/3 bias, 1/4 duty
(Substitute static when the LCD driver is not (Substitute static when the LCD driver is not
used.) used.)

Number of specifiable

00 – 1E 00 – 1E
However, 0E and 0F cannot be used with However, 0E and 0F cannot be used with

strobes

the 4 MHz specifications. the 4 MHz specifications.

• Option switching in the
EPROM version is
performed by writing
data to the option
EPROM.

• Option switching in
mask ROM versions is
performed by
specifying mask
options.

Pin Assignments

Note: 1. The TST pin must be connected to VSSin normal operation.

2. When mounting the LC58E76, do not use solder dip techniques.

System Block Diagram

LC58E76 System Block Diagram

No. 4434-3/17

LC58E76

PIn No. Symbol PIn No. Symbol PIn No. Symbol PIn No. Symbol

1
2
3
4
5
6
7
8

9
10
11
12
13
14
15
16
17
18
19
20

COM2
COM1
CUP1
CUP2
RES
INT
SO1
SO2
SO3
SO4
A1
A2
A3
A4
P1
P2
P3
P4
XTOUT
XTIN

21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40

V

DD

2

V

DD

1

V

SS

V

DD

CFIN
CFOUT
S1
S2
S3
S4
K1
K2
K3
K4
M1
M2
M3
M4
N1
N2

41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60

N3
N4
TST
Seg1
Seg2
Seg3
Seg4
Seg5
Seg6
Seg7
Seg8
Seg9
Seg10
Seg11
Seg12
Seg13
Seg14
Seg15
Seg16
Seg17

61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80

Seg18
Seg19
Seg20
Seg21
Seg22
Seg23
Seg24
Seg25
Seg26
Seg27
Seg28
Seg29
Seg30
Seg31
Seg32
Seg33
Seg34
Seg35
COM4
COM3

I/O, serial I/O
ports

Input ports

Output ports

I/O ports

I/O ports

I/O ports

I/O ports

Output ports

RAM : Data memory
ROM : Program memory
DP : Data pointer register
BNK : Bank register
APG : RAM page flag
AC : Accumulator
ALU : Arithmetic and logic unit

B : B register
OPG : ROM page flag
PC : Program counter
IR : Instruction register
STS1 : Status register 1
STS2 : Status register 2
STS3 : Status register 3

STS4 : Status register 4
STS5 : Status register 5
PLA : Program logic for

segment data and strobes

WAIT.C : Wait time counter

Pin Functions

No. 4434-4/17

LC58E76

Pin I/O

QFC-80

Function Option At reset

Pin No.

V

DD

— 24

V

SS

— 23

VDD1 — 22
V

DD

2 — 21

CUP1 — 3
CUP2 — 4

CFIN Input 25

CFOUT Output 26

XTIN Input 20

XTOUT Output 19

S1 27
S2 28
S3

Input

29

S4 30

K1 31
K2 32
K3

I/O

33

K4 34

M1 35
M2

I/O

36
M3 37
M4 38

A1 11
A2

I/O

12
A3 13
A4 14

P1 15
P2

I/O

16
P3 17
P4 18

Power supply
LCD drive power supply

Switching pin used to supply the LCD drive voltage to the VDD1 and
VDD2 pins

• Connect a nonpolar capacitor between CUP1 and CUP2 when 1/2 or
1/3 bias is used.

• Leave open when a bias other than 1/2 or 1/3 is used.

• CF specifications

• Not used

• The pull-up or pull­down resistors are
on.

Note: These pins go

to the floating
state when
reset is cleared.

• The pull-up or pull­down resistors are
on.

Note: These pins go

to the floating
state when
reset is cleared.

• Input mode

• Output latch data is
set high.

NON 1/1 bias 1/2 bias 1/3 bias

V

DD

VDD1
V

DD

2

V

SS

• 32k specifications

• 65k specifications

• 38k specifications

• Not used

• Transistors to hold
a low or high level

• Selection of either
pull-up or pull­down resistors

• Transistors to hold
a low or high level

• Selection of either
pull-up or pull­down resistors

The same as K1 toK4The same as K1 to

K4

The same as K1 to
K4

The same as K1 to
K4

The same as K1 to
K4

The same as K1 to
K4

System clock oscillator connections

• Ceramic resonator connection (CF specifications)

• RC component connection (RC specifications)

• External signal input pin (CFOUT is left open)
This oscillator is stopped by the execution of a STOP or SLOW
instruction.

Reference calculation (clock specifications, LCD alternation frequency),
system clock oscillator

• 32 kHz crystal resonator connection

• 65 kHz crystal resonator connection
This oscillator is stopped by the execution of a STOP instruction.

Input-only ports

• Input pins used to read data into RAM

• Built-in 7.8 ms and 1.95 ms chatter exclusion circuits

• Built-in pull-up/pull-down resistors
Note: The 7.8 ms and 1.95 ms times are the times when ø0 is

32.768 kHz.

I/O ports

• Input pins used to read data into RAM

• Output pins used to output data from RAM

• Built-in 7.8 ms and 1.95 ms input-mode chatter exclusion circuits. The
selection of 7.8 or 1.95 ms is linked to that for the S ports.

Note: The 7.8 ms and 1.95 ms times are the times when ø0 is

32.768 kHz.

I/O ports

• Input pins used to read data into RAM

• Output pins used to output data from RAM

• M4 is used as the external clock input pin in TM2 mode 3.
* The minimum period for the external clock is twice the cycle time.

• Built-in pull-up/pull-down resistors

I/O ports

• Input pins used to read data into RAM

• Output pins used to output data from RAM

• Built-in pull-up/pull-down resistors

I/O ports
Function: The same as pins A1 to A4

Continued on next page.

Continued from preceding page.

No. 4434-5/17

LC58E76

Pin I/O

QFC-80

Function Option At reset

Pin No.

SO1 7
SO2

I/O

8
SO3 9
SO4 10

N1 39
N2

Output

40
N3 41
N4 42

INT Input 6

RES Input 5

TST Input 43

I/O ports
Function: The same as pins A1 to A4
Pins SO1 to SO3 area also used for the serial interface.

• Use of these pins in serial mode can be selected under program
control.

• Pin functions: SO1: Serial input pin

SO2: Serial output pin

SO3: Serial clock pin
The serial clock pin can be switched between internal and external,
and between rising edge output and falling edge output.

• Transistors to hold
a low or high level

• Selection of either
pull-up or pull­down resistors

• Internal serial clock
divisor selection

I 1/1
II 1/2
III 1/4

The same as K1 to
K4

The output levels on
pins N1 to N4 can be
specified as an option.

• Pin N1 to N4
output circuit type:
I N-channel

open drain

• Pin N1 to N4
output level

I High level
II Low level

• Transistors to hold
a low or high level

• Selection of either
pull-up or pull­down resistors

• Signal conversion
(rising/falling)
selection

* Only when the

input resistor open
specification is
selected

• LCD driver/
general-purpose
output switching

• LCD drive type
switching
— STATIC
— 1/2 bias – 1/2

duty

— 1/2 bias – 1/3

duty

— 1/2 bias – 1/4

duty

— 1/3 bias – 1/3

duty

— 1/3 bias – 1/4

duty

• General-purpose
output circuit
switching
— CMOS
— P-channel

open drain

— N-channel

open drain

• Output latch control
in standby modes

• LCD drive
All segments off

• General-purpose
outputs
Low level

Note: When a

combination of
LCD drive and
general- pur­pose outputs,
the output
state is either
all segments
off or low level.

• These pins go to
the V

SS

level
during the reset
period.

Output-only ports

• Output pins used to output data from RAM

• An alarm signal can be output from pin N4. (Note that this is only
when the N4 output latch is low.)

• An alarm signal modulated at 1, 2 or 4 kHz can be output. (These
frequencies are output when ø0 is 32.768 kHz.)

• A carrier signal can be output from N3. (Note that this is only when
the N3 output latch is low.)

Input ports

• External interrupt request inputs

• Input pins used to read data into RAM

• Input detection can be performed on either rising or falling edges.

• Built-in pull-up/pull-down resistors

LSI reset input

• The LC58E7008 resets on a high level input

Note: • An external resistor is required.

• The reset pulse must be at least 200 µs.

Test input
Connect to V

SS

in normal operation.

• LCD panel drive/general-purpose output

— LCD panel drive

I STATIC
II 1/2 bias – 1/2 duty
III 1/2 bias – 1/3 duty
IV 1/2 bias – 1/4 duty
V 1/3 bias – 1/3 duty
VI 1/3 bias – 1/4 duty

Types I to V can be specified as mask options.

— General-purpose output mode

I CMOS
II P-channel open drain
III N-channel open drain

Types I to III can be specified as mask options.

• LCD/general-purpose output control is handled by the segment PLA,

and thus program control is not required.

• These pins support output latch control on reset and in standby

states when the oscillators are stopped.

• Arbitrary combinations of LCD drive and general-purpose outputs can

be used.

Seg1,
Seg2 to
Seg35

Output

44,

45 to

78

Continued on next page.

Continued from preceding page.

Usage Notes

The following tools and software are required when the LC58E76 is used.

The LC5870 Series Software Development Tools: For creating programs and option data.
Note that only MS-DOS machines are supported as the development host machine. See the LC5870 Series Software
Development Tools manuals for details on the use of these tools.

EC5876.EXE: This is a program that converts and merges program and option data for the LC5870 series so that it can
be written to the LC58E76 EPROM.

EPROM writing board (adapter socket: W58E68Q): This is a socket adapter that allows a general-purpose PROM writer
to be used to write program data to the LC58E76.

General-purpose PROM writer: The EVA-520 programmer that comes with the LC5870 Series Software Development
Tools cannot be used. A general-purpose PROM writer must be used.

This section describes the procedures used with the LC58E76 and the EC5876.EXE program, which is one of the tools
mentioned above. More details on LC5870 Series program development are available in LC5870 Series Users Manual
and the manuals for the LC5870 Series Development Tools and the general-purpose PROM writer.

No. 4434-6/17

LC58E76

Pin I/O

QFC-80

Function Option At reset

Pin No.

COM1 2
COM2 1
COM3

Output

80

COM4 79

These pins are n­channel open-drain
outputs during the
reset period.

LCD panel drive common polarity outputs
The table below shows how these pins are used depending on the duty
used. (Values for alternation frequency reflect a typical specification of

32.768 MHz for ø0)

Note: A cross ( × ) indicates that the pin is not used with that duty type.

Static duty 1/2 duty 1/3 duty 1/4 duty

COM1

❍ ❍ ❍ ❍

COM2

× ❍ ❍ ❍

COM3

× × ❍ ❍

COM4

× × × ❍

Alternation

32 Hz 32 Hz 42.7 Hz 32 Hz

frequency