Sanyo LC5812 Specifications

Any and all SANYO products described or contained herein do not have specifications that can handle
applications that require extremely high levels of reliability, such as life-support systems, aircraft’s
control systems, or other applications whose failure can be reasonably expected to result in serious
physical and/or material damage. Consult with your SANYO representative nearest you before using
any SANYO products described or contained herein in such applications.

SANYO assumes no responsibility for equipment failures that result from using products at values that
exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges,or other
parameters) listed in products specifications of any and all SANYO products described or contained
herein.

CMOS IC

4-Bit Microcomputer

with Internal LCD Driver

Ordering number:ENN2058A

LC5812

SANYO Electric Co.,Ltd. Semiconductor Company

TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110-8534 JAPAN

Overview

The LC5812 series models are 4-bit, single-chip, high-per­formance microcomputers equipped with LCD drivers.
They are produced by CMOS technology. Their numerous
features include low-voltage operation and low current
drain.
A 4 bit parallel-processing ALU, program memory (R OM),
data memory (RAM), input and output ports, a timer, a clock
generator, and LCD drivers, among other things, are inte­grated on a single chip.
A set of 134 instructions, including the operation and pro­cessing instructions executable in 4-bit units and various
conditional branch instructions and LCD driver data trans­fer instructions form an easy-to-use and effective instruc­tion system.
In HALT mode the user can readily implement the clock
function during low-power dissipation. To minimize the
current required, overall internal operation is stopped ex­cept for the oscillation and frequency divider circuits and
the LCD drivers.
In HOLD mode the operation of the system clock oscilla­tion is stopped so that the current drain becomes much less.
The LC5812 is very useful for controlling electronic tun­ers, cameras, and other portable devices at low v oltage, with
low power dissipation.

Package Dimensions

unit:mm

3044B-QIP80A

[LC5812]

20.0

14.0

3.0

1.0

0.35

0.8

1.0

26.0

20.0

0.8

0.8

64

65

80

1

0.35

22.6

3.0

0.8

41

24

0.15

2.45max

1.7

16.6

1.7

2.15

40

25

1.7

SANYO : QIP80A

Features

• A wide supply voltage range

emitelcyCegnaregatlovylppuSskrameR

2185CLsµ221V

sµ221V

H2185CL

sµ16V
sµ04V
sµ02V

2SS
2SS
2SS
2SS
2SS

V6.3–ot0.2–=latsyrck23
V0.5–ot0.2–=latsyrck23
V0.5–ot3.2–=latsyrck56
V0.5–ot5.3–=rotanosercimareck004
V0.5–ot5.4–=rotanosercimareck008

Continued on next page.

N3001TN (KT)/3029TA/D1961KI/9115KI, TS No.2058–1/17

LC5812

Continued from preceding page.

• Micro-level oprerating current.
Only micro-level current is needed to operate the equipment if the HALT function is used efficiently. Although the
exact current drain depends on the oscillation frequency (and the oscillator) and the program structure, a typical current
requirement is about 5µA to run the clock program if the optimum technique is used to design the program.

• Enhanced HALT/HOLD release and interrupt functions.

· Five types of HALT/HOLD release functions and five types of interrupt functions.

· External interrupt function (included in the above 5 interrupt functions).

· Up to 8 levels of subroutine nesting (common with interrupts).

• Enhanced hardware for greater processing capability.

· Built-in segment PLA circuit : Is able to join the LCD driver outputs to any patterns on the LCD panel without

software.

· Built-in decimal up/down counter.

· Built-in 8-bit programmable timer.

· The entire RAM area can be used as a working area (bank switching).

· Built-in data pointer.

· All instructions per step operation.

· Built-in clock oscillator and frequency divider circuit.

• Various LCD output terminals for LCD panel drive (42 terminals).

lenapDCLstnemgesDCLforebmuN
ytud3/1saib3/1).xam(stnemges621
ytud3/1saib2/1).xam(stnemges621
ytud2/1saib2/1).xam(stnemges48

citatS).xam(stnemges24

• The LCD panel drive output terminal can be switched to the general-purpose output terminal.

• A number of input and output terminals are provided.

Input dedicated port : 2 ports/8 pins
Input/output port : 2 ports/8 pins
Output dedicated port : 1 port/4 pins

• An initial reset terminal is provided.

• Built-in oscillation circuit for system clock.

Two kinds of oscillation circuits are available : one for the system clock and the other for clock oscillation.

• Number of instructions : 134

• ROM : 2,048×16bits

• RAM : 152×4bits

• Form of shipment : QIP80 (or chip)

Application Development Support System

An evaluation chip (LC5897) and special devices for the application development tool will be provided.

• SDS410 system
Enables the user to create an application development program in assembler language (edit-assembling).

• EVA510+TB5812+DCB1+Application Evaluation Board+LC5897
Modification and debugging of the application development program are possible by connecting to the SDS410.
The EVA510 is identical with the EVA410 except that the control ROM has been replaced.

• TB5812+DCB1+Application Evaluation Board+LC5897
Load and evaluation is possible using the EPROM (2732) in which the data for the application development program is
contained.

Note) The application evaluation board is created by the user.

Either LEDs or on LCD can be used as the display element.

Application Examples

• Portable equipment (camera control, various card controls, high-quality electric calculators and timers).

• Acoustic equipment (electronic control, electronic tuning, and clocks).

• Household electrical apparatus (remote control, and timer control).

• Telephone equipment (telephone control, and display control).

No.2058–2/17

LC5812

DP : Data pointer STS3 : Status register 3
BNK : Bank register STS4 : Status register 4
WR : Working register CF : Carry flag
AC : Accumulator ZF : Zero flag
ALU : Arithmetic and logical unit WRF0 : Working flag 0
INT : Interrupt control circuit WRF1 : Working flag 1
PC : Program counter BCF : Test flag
UP/DOWN CNT : SCF1 : S port flag

Decimal up/down counter SCF2 : STS4 flag
TIM : Preset timer SCF3 : K port flag
IR : Instruction register SCF4 : Divider overflow flag
STOP : HOLD control circuit SCF5 : UP/DOWN CNT overflow flag
HALT : HALT control circuit SCF6 : Timer overflow flag
SCG : System clock generator SCF7 : INT signal change flag
STS1 : Status register 1 ICF : Internal clock flag
STS2 : Status register 2

No.2058–3/17

LC5812

Application Circuit – Example (1/3 bias – 1/3 duty)

Pad Arrangement of IC Chip

Chip size : 7.46mm×5.69mm
Thickness : 480µm
Pad size : 120µm×120µm

No.2058–4/17

Pin Layout

Pad name and coordinates

QIP80 pin arrangement

Pad

No.

72

1

10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42

2
3
4
5
6
7
8
9

V
X
XOUT
CRIN
CROUT
S3
P1
P2
P3
P4
COM2
COM3
Seg
Seg
Seg
Seg
Seg
Seg
Seg
Seg
Seg
Seg
Seg
Seg
Seg
Seg
Seg
Seg
Seg
Seg
Seg
Seg
Seg
TEST3
TEST
TEST
K4
K3
K2
K1
RES
INT

73
74
75
76
77
78
79
80

1
2
3
4
5
6
7
8

9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25

–

–

26
27
28
29
30
31

Pad

Name
DD

IN

X

(µm)Y(µm)

–3581
–3581
–3581
–3581
–3581
–3581
–3581
–3581
–3581
–3581
–3581
–3367
–2823
–2528
–2233
–1938
–1643
–1347
–1052
– 757
– 462
– 156

+ 150
+ 456
+ 762
+1068
+1374
+1680
+1986
+2292
+2598
+2904
+3210
+3581
+3581
+3581
+3581
+3581
+3581
+3581
+3581
+3581

+ 214
+3

– 176
– 369
– 549
–1048
–1228
–1408
–1588
–2380
–2696
–2696
–2696
–2696
–2696
–2696
–2696
–2696
–2696
–2696
–2696
–2696
–2696
–2696
–2696
–2696
–2696
–2696
–2696
–2696
–2696
–2696
–2696
–2696
–1795
–1584
–1402
–1049
– 868
– 515
– 335

+ 698

QIP80 pin arrangement

Pad

No.

32

43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83

TEST2
TEST1
M4
M3
M2
M1
S2
S1
CUP2
TEST
CUP1
Seg
Seg
Seg
Seg
Seg
Seg
Seg
Seg
Seg
Seg
Seg
Seg
Seg
Seg
Seg
Seg
Seg
Seg
Seg
Seg
Seg
COM1
S4
CNT1
CNT2
LIGHT
ALARM
V
V
V

33
34
35
36
37
38
39
40

–

41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71

LC5812

Pad

Name

+3581
+3581
+3581
+3581
+3581
+3581
+3581
+3581
+3581
+3581
+3300
+3059
+2764
+2469
+2174
+1878
+1583
+1288
+ 993
+ 687
+ 381
+75

– 231
– 537
– 843
–1149
–1455
–1761
–2067
–2373
–2679
–2985
–3581
–3581
–3581
–3581
–3581
–3581

SS3
SS2
SS1

–3581
–3581
–3581

X

(µm)Y(µm)

+ 878
+1105
+1285
+1465
+1645
+1825
+2005
+2317
+2497
+2696
+2696
+2696
+2696
+2696
+2696
+2696
+2696
+2696
+2696
+2696
+2696
+2696
+2696
+2696
+2696
+2696
+2696
+2696
+2696
+2696
+2696
+2696
+2696
+2101
+1849
+1298
+1114
+ 934
+ 754
+ 574
+ 394

• The values (X, Y) indicate the coordinates of each pad center with the center of the chip as the origin.

• The TEST terminal should be open during normal operation.

• If the chip is used, the substrate must be tied to V

DD

.

No.2058–5/17

Pin Function

LC5812

Terminal

X IN Input

X OUT Output

S1
S2
S3
S4

P2
P3
P4
M1
M2
M3
M4

K1
K2
K3
K4

name

Input/

Output

Input

Input/

Output

Input

Circuit

configuration

Connects 32.768kHz or 65.536kHz crystal
between XIN and X
Used for the timer reference clock and system
clock.
X

incorporates a 20pF capacitor to VDD.

OUT

Input-dedicated port.
Has a 7ms or 32ms chatter removal circuit.
By applying VDD to S1 through S4
simultaneously, the internal IC devices are reset
(mask option).
(The chatter removal time is for the 32.768kHz
option.)

I/O port with mode switched by instructions to
perform the following operations :
(1) Input port : Writes data in RAM.
(2) Output port : Outputs data from RAM.

(1) Used to send data to RAM via 7ms or 32ms

chatter removal circuit.

(2) Is able to operate the decimal counter in the

IC circuit with a K2 and K4 signal, according
to instruction.
(The chatter removal time is for the 32.768kHz
option.)

for oscillation.

OUT

(1) For 32K
(2) For 65K
* Option (2) is available only on the

LC5812H.

(1) Selection of L-level Hold Tr.
(2) Use of initial reset by simultaneous

application of VDD to S1 through
S4.

Selection of L-level Hold Tr.

Selection of L-level Hold Tr.

Status during resetFunction Option

Pull-down resistance
is ON during reset.

INT Input

RES Input

CNT1
CNT2

LIGHT Output

Output

Controls the external interrupt request.
(The mask option interlocks with port K.)

Resets the internal IC devices (1) Reset at the H-level

Output-dedicated port (1) "L" output during reset.

Output-dedicated port.
Suitable for outputting the signals which drive the
light transistor.

Selection of L-level Hold Tr.

(with pull-down resistor)

(2) Reset at L-level

(with pull-up resistor)

(2) "H" output during reset.
* Options 1 and 2 can be specified for

each of CNT1 and CNT2.

(1) "L" output during reset.
(2) "H" output during reset.

"L" or "H" output
(according to mask
option).

"L" or "H" output
(according to mask
option).

Continued on next page.

No.2058–6/17