Sanyo LC35256FT-70U Specifications

Sanyo LC35256FT-70U Specifications

Ordering number : ENN*6302

CMOS IC

LC35256FM, FT-55U/70U

256K (32768 words × 8 bits) SRAM

Control Pins: OE and CE

Preliminary

Overview

The LC35256FM and LC35256FT are asynchronous silicon-gate CMOS SRAMs with a 32K-word by 8-bit structure. These are full-CMOS devices with 6 transistors per memory cell, and feature low-voltage operation, a low operating current drain, and an ultralow standby current.

Control inputs include OE for fast memory access and CE (chip enable) for power saving and device selection. This makes these devices optimal for systems that require low power or battery backup, and makes memory expansion easy. The ultralow standby current allows these devices to be used with capacitor backup as well.

Features

Supply voltage range: 4.5 to 5.5 V

Access time at 5 V operation: LC35256FM, FT-55U: 55 ns (maximum) LC35256FM, FT-70U: 70 ns (maximum)

Standby current: 3.0 µA (Ta 70°C)

5.0µA (Ta 85°C)

Operating temperature: –40 to +85°C

Data retention voltage: 2.0 to 5.5 V

All I/O levels: TTL compatible

Input/output shared function pins, 3-state output pins

No clock required

Package

28-pin SOP (450 mil) plastic package: LC35256FM 28-pin TSOP (8 × 13.4 mm) plastic package: LC35256FT

Package Dimensions

unit: mm

3187A-SOP28D

[LC35256FM]

28

15

 

0.15

 

 

 

9.8

8.4

11.8

 

 

 

1.0

1

14

 

 

18.0

 

 

 

 

0.1 2.3

 

 

0.4

1.27

 

 

SANYO: SOP28D

unit: mm

3221-TSOP28 (Type I)

[LC35256FT]

21

 

8

 

 

 

 

 

11.8

13.4

 

 

 

 

0.5

22

28 1

7

1.27max

 

 

0.55

0.2

0.125

 

 

 

8.1

 

 

 

 

 

 

 

 

 

0.08

 

SANYO: TSOP28 (Type I)

Any and all SANYO products described or contained herein do not have specifications that can handle applications that require extremely high levels of reliability, such as life-support systems, aircraft’s control systems, or other applications whose failure can be reasonably expected to result in serious physical and/or material damage. Consult with your SANYO representative nearest you before using any SANYO products described or contained herein in such applications.

SANYO assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all SANYO products described or contained herein.

SANYO Electric Co.,Ltd. Semiconductor Company

TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110-8534 JAPAN

52600RM (OT) No. 6302-1/7

LC35256FM, FT-55U/70U

Pin Assignment (Top view)

 

 

 

TSOP28

 

 

 

 

 

 

 

 

 

SOP28D

 

 

 

 

 

 

OE

22

21

 

 

 

 

A10

A14

 

 

 

 

VCC

 

 

 

 

 

 

 

 

 

 

 

 

1

 

28

 

A11

 

 

23

20

 

 

 

 

CE

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

A9

 

 

24

19

 

 

 

 

I/O8

A12

2

 

27

 

WE

 

 

 

 

 

 

A8

 

 

25

18

 

 

 

 

I/O7

A7

 

 

 

 

A13

A13

 

 

26

17

 

 

 

 

I/O6

3

 

26

 

 

 

 

 

 

WE

 

 

27

16

 

 

 

 

I/O5

A6

 

 

 

 

A8

VCC

 

 

28

15

 

 

 

 

I/O4

4

 

25

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

A14

 

 

1

14

 

 

 

 

GND

A5

5

 

24

 

A9

A12

 

 

2

13

 

 

 

 

I/O3

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

A7

 

 

3

12

 

 

 

 

I/O2

A4

6

 

23

 

A11

 

 

 

 

 

A6

 

 

4

11

 

 

 

 

I/O1

 

 

 

 

 

 

 

 

 

 

A5

 

 

5

10

 

 

 

 

A0

A3

7

 

22

 

 

OE

 

 

 

 

 

 

A4

 

 

6

9

 

 

 

 

A1

 

 

 

 

 

 

 

 

 

 

A3

 

 

7

8

 

 

 

 

A2

A2

8

 

21

 

A10

 

 

 

 

 

 

 

 

 

 

 

A1

 

 

 

 

 

 

 

 

 

 

 

 

LC35256FT

 

 

 

 

 

 

 

9

 

20

 

 

CE

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

A0

 

 

 

 

I/O8

 

 

 

 

 

 

 

 

 

 

 

10

 

19

 

 

 

 

 

 

 

 

 

 

 

 

I/O1

 

 

 

 

I/O7

 

 

 

 

 

 

 

 

 

 

 

11

 

18

 

 

 

 

 

 

 

 

 

 

 

 

I/O2

 

 

 

 

I/O6

 

 

 

 

 

 

 

 

 

 

 

12

 

17

 

 

 

 

 

 

 

 

 

 

 

 

I/O3

 

 

 

 

I/O5

 

 

 

 

 

 

 

 

 

 

 

13

 

16

 

 

 

 

 

 

 

 

 

 

 

 

GND

 

 

 

 

I/O4

 

 

 

 

 

 

 

 

 

 

 

14

 

15

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

LC35256FM

Block Diagram

A6

 

A7

 

A8

buffer

A9

A10

Address

 

A11

 

A12

 

A13

 

A14

 

I/O1

 

I/O8

 

CE

 

WE

 

OE

 

Row decoder

Input data buffer

Input data control circuit

VCC

Memory cell array

512 × 512

GND

Column I/O

Output

circuit

data

 

buffer

Column decoder

 

Address buffer

A0 A1 A2 A3 A4 A5

No. 6302-2/7

LC35256FM, FT-55U/70U

Pin Functions

A0 to A14

Address input

 

 

 

 

 

 

 

 

 

 

 

Read/write control input

 

WE

 

 

 

 

Output enable input

 

OE

 

 

 

 

 

 

 

 

 

Chip enable input

 

CE

 

 

 

 

 

 

I/O1 to I/O8

Data I/O

 

 

 

 

 

 

VCC, GND

Power supply, ground

Function Table

 

 

 

 

 

 

 

 

 

 

 

 

Mode

 

CE

 

OE

 

WE

I/O

Supply current

 

 

 

 

 

 

 

 

 

 

 

 

Read cycle

 

L

 

L

 

H

Data output

ICCA

Write cycle

 

L

 

X

 

L

Data input

ICCA

Output disable

 

L

 

H

 

H

High impedance

ICCA

Unselected

 

H

 

X

 

X

High impedance

ICCS

Specifications

Absolute Maximum Ratings

Parameter

Symbol

Conditions

Ratings

Unit

 

 

 

 

 

Maximum supply voltage

VCC max

 

7.0

V

Input pin voltage

VIN

 

–0.3* to VCC + 0.3

V

I/O pin voltage

VI/O

 

–0.3 to VCC + 0.3

V

Operating temperature

Topr

 

–40 to +85

°C

 

 

 

 

 

Storage temperature

Tstg

 

–55 to +125

°C

 

 

 

 

 

Note: * The minimum value is –3.0 V for pulse widths under 30 ns.

I/O Capacitances at Ta = 25°C, f = 1 MHz

Parameter

Symbol

Conditions

 

Ratings

 

Unit

 

 

 

min

typ

max

 

 

 

 

 

 

 

 

 

 

 

I/O pin capacitance

CI/O

VI/O = 0 V

 

6

10

pF

Input pin capacitance

CI

VIN = 0 V

 

6

10

pF

Note: All units are not tested; only samples are tested.

DC Allowable Operating Ranges at Ta = –40 to +85°C, VCC = 4.5 to 5.5 V

Parameter

Symbol

Conditions

 

Ratings

 

Unit

 

 

 

min

typ

max

 

 

 

 

 

 

 

 

 

 

 

Supply voltage

VCC

 

4.5

5.0

5.5

V

Input voltage

VIH

 

2.2

 

VCC + 0.3

V

VIL

 

–0.3*

 

+0.8

V

 

 

 

Note: * The minimum value is –3.0 V for pulse widths under 30 ns.

No. 6302-3/7

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