Ordering number : ENN*6302
CMOS IC
LC35256FM, FT-55U/70U
256K (32768 words × 8 bits) SRAM
Control Pins: OE and CE
Preliminary
Overview
The LC35256FM and LC35256FT are asynchronous silicon-gate CMOS SRAMs with a 32K-word by 8-bit structure. These are full-CMOS devices with 6 transistors per memory cell, and feature low-voltage operation, a low operating current drain, and an ultralow standby current.
Control inputs include OE for fast memory access and CE (chip enable) for power saving and device selection. This makes these devices optimal for systems that require low power or battery backup, and makes memory expansion easy. The ultralow standby current allows these devices to be used with capacitor backup as well.
Features
•Supply voltage range: 4.5 to 5.5 V
•Access time at 5 V operation: LC35256FM, FT-55U: 55 ns (maximum) LC35256FM, FT-70U: 70 ns (maximum)
•Standby current: 3.0 µA (Ta ≤ 70°C)
5.0µA (Ta ≤ 85°C)
•Operating temperature: –40 to +85°C
•Data retention voltage: 2.0 to 5.5 V
•All I/O levels: TTL compatible
•Input/output shared function pins, 3-state output pins
•No clock required
•Package
28-pin SOP (450 mil) plastic package: LC35256FM 28-pin TSOP (8 × 13.4 mm) plastic package: LC35256FT
Package Dimensions
unit: mm
3187A-SOP28D
[LC35256FM]
28 |
15 |
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0.15 |
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9.8 |
8.4 |
11.8 |
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1.0 |
1 |
14 |
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18.0 |
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0.1 2.3 |
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0.4 |
1.27 |
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SANYO: SOP28D
unit: mm
3221-TSOP28 (Type I)
[LC35256FT]
21 |
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8 |
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11.8 |
13.4 |
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0.5 |
22 |
28 1 |
7 |
1.27max |
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0.55 |
0.2 |
0.125 |
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8.1 |
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0.08 |
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SANYO: TSOP28 (Type I)
Any and all SANYO products described or contained herein do not have specifications that can handle applications that require extremely high levels of reliability, such as life-support systems, aircraft’s control systems, or other applications whose failure can be reasonably expected to result in serious physical and/or material damage. Consult with your SANYO representative nearest you before using any SANYO products described or contained herein in such applications.
SANYO assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all SANYO products described or contained herein.
SANYO Electric Co.,Ltd. Semiconductor Company
TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110-8534 JAPAN
52600RM (OT) No. 6302-1/7
LC35256FM, FT-55U/70U
Pin Assignment (Top view)
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TSOP28 |
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SOP28D |
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OE |
22 |
21 |
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A10 |
A14 |
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VCC |
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1 |
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28 |
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A11 |
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23 |
20 |
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CE |
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A9 |
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24 |
19 |
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I/O8 |
A12 |
2 |
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27 |
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WE |
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A8 |
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25 |
18 |
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I/O7 |
A7 |
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A13 |
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A13 |
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26 |
17 |
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I/O6 |
3 |
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26 |
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WE |
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27 |
16 |
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I/O5 |
A6 |
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A8 |
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VCC |
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28 |
15 |
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I/O4 |
4 |
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25 |
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A14 |
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1 |
14 |
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GND |
A5 |
5 |
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24 |
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A9 |
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A12 |
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2 |
13 |
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I/O3 |
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A7 |
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3 |
12 |
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I/O2 |
A4 |
6 |
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23 |
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A11 |
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A6 |
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4 |
11 |
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I/O1 |
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A5 |
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5 |
10 |
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A0 |
A3 |
7 |
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22 |
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OE |
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A4 |
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6 |
9 |
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A1 |
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A3 |
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7 |
8 |
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A2 |
A2 |
8 |
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21 |
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A10 |
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A1 |
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LC35256FT |
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9 |
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20 |
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CE |
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A0 |
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I/O8 |
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10 |
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19 |
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I/O1 |
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I/O7 |
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11 |
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18 |
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I/O2 |
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I/O6 |
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12 |
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17 |
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I/O3 |
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I/O5 |
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13 |
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16 |
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GND |
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I/O4 |
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14 |
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15 |
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LC35256FM
Block Diagram
A6 |
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A7 |
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A8 |
buffer |
A9 |
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A10 |
Address |
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A11 |
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A12 |
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A13 |
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A14 |
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I/O1 |
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I/O8 |
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CE |
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WE |
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OE |
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Row decoder
Input data buffer |
Input data control circuit |
VCC
Memory cell array
512 × 512
GND
Column I/O |
Output |
circuit |
data |
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buffer |
Column decoder |
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Address buffer
A0 A1 A2 A3 A4 A5
No. 6302-2/7
LC35256FM, FT-55U/70U
Pin Functions
A0 to A14 |
Address input |
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Read/write control input |
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WE |
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Output enable input |
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OE |
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Chip enable input |
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CE |
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I/O1 to I/O8 |
Data I/O |
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VCC, GND |
Power supply, ground |
Function Table
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Mode |
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CE |
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OE |
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WE |
I/O |
Supply current |
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Read cycle |
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L |
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L |
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H |
Data output |
ICCA |
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Write cycle |
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L |
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X |
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L |
Data input |
ICCA |
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Output disable |
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L |
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H |
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H |
High impedance |
ICCA |
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Unselected |
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H |
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X |
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X |
High impedance |
ICCS |
Specifications
Absolute Maximum Ratings
Parameter |
Symbol |
Conditions |
Ratings |
Unit |
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Maximum supply voltage |
VCC max |
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7.0 |
V |
Input pin voltage |
VIN |
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–0.3* to VCC + 0.3 |
V |
I/O pin voltage |
VI/O |
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–0.3 to VCC + 0.3 |
V |
Operating temperature |
Topr |
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–40 to +85 |
°C |
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Storage temperature |
Tstg |
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–55 to +125 |
°C |
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Note: * The minimum value is –3.0 V for pulse widths under 30 ns.
I/O Capacitances at Ta = 25°C, f = 1 MHz
Parameter |
Symbol |
Conditions |
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Ratings |
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Unit |
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min |
typ |
max |
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I/O pin capacitance |
CI/O |
VI/O = 0 V |
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6 |
10 |
pF |
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Input pin capacitance |
CI |
VIN = 0 V |
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6 |
10 |
pF |
Note: All units are not tested; only samples are tested.
DC Allowable Operating Ranges at Ta = –40 to +85°C, VCC = 4.5 to 5.5 V
Parameter |
Symbol |
Conditions |
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Ratings |
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Unit |
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min |
typ |
max |
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Supply voltage |
VCC |
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4.5 |
5.0 |
5.5 |
V |
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Input voltage |
VIH |
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2.2 |
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VCC + 0.3 |
V |
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VIL |
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–0.3* |
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+0.8 |
V |
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Note: * The minimum value is –3.0 V for pulse widths under 30 ns.
No. 6302-3/7