Sanyo LB1955 Specifications

Ordering number :EN5452A

41399TH (OT) / 73097HA (OT) No. 5452-1/9

Functions

• The LB1955 is a 3-phase brushless motor driver IC that
is optimal for applications such as driving the drum
motor in VCRs.

Features

• Current linear drive

• FG and PG free

• Single-voltage power supply

• Built-in AGC circuit

• Built-in thermal shutdown circuit

Package Dimensions

unit: mm

3222-HSOP28

0.1

1.8max

7.6

1.0

114

0.3

0.8

1528

2.7

15.2

0.8

5.6

0.5

0.2

SANYO: HSOP28

[LB1955]

SANYO Electric Co.,Ltd. Semiconductor Company

TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110-8534 JAPAN

Monolithic Digital IC

LB1955

Three-Phase Brushless Motor Driver

Any and all SANYO products described or contained herein do not have specifications that can handle
applications that require extremely high levels of reliability, such as life-support systems, aircraft’s
control systems, or other applications whose failure can be reasonably expected to result in serious
physical and/or material damage. Consult with your SANYO representative nearest you before using
any SANYO products described or contained herein in such applications.

SANYO assumes no responsibility for equipment failures that result from using products at values that
exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other
parameters) listed in products specifications of any and all SANYO products described or contained
herein.

Parameter Symbol Conditions Ratings Unit

Maximum supply voltage V

CC

max 14.5 V

Maximum output current I

OUT

1.0 A
Allowable power dissipation Pdmax Independent device 0.60 W
Operating temperature Topr –20 to +75 °C
Storage temperature Tstg –55 to +150 °C

Specifications

Absolute Maximum Ratings at Ta = 25°C

Parameter Symbol Conditions Ratings Unit

Supply voltage V

CC

10.2 to 13.8 V
Hall input amplitude Vhall At the input 70 to 500 mVp-p
VC input voltage V

C

0 to 5 V

Allowable Operating Ranges at Ta = 25°C

No. 5452-2/9

LB1955

Electrical Characteristics at Ta = 25°C, VCC= 12 V

Note: * is provided for when X is the peak value at the 60° position of the lower side of the UIN1 Hall amplifier input: THPG = 1.17X.

However, note that the THPG level may be reduced if the value of the capacitor (SH) used for the sample-and-hold circuit is too small since
a discharge current of a few nA will result.

Parameter Symbol Conditions

Ratings

Unit

min typ max
[Power Supply]
Current drain I

CC

VC= 0 V, LCTR = 6 V 7.0 10.0 13.0 mA

IC internal power supply V

REF

4.75 5.0 5.25 V

[Output]

Output saturation voltage V

O(sat)

1

I

O

= 400 mA Sink side 0.4 V

V

C

= 5 V, Rf= 0 Ω Source side 1.5 V

Output saturation voltage 2 V

O(sat)

2

I

O

= 800 mA Sink side 0.7 V

V

C

= 5 V, Rf= 0 Ω Source side 2.0 V

3-phase output current ripple Ior I

O

= 100 mA, Rf = 0.47 Ω –5 +5 %
[Hall Amplifier]
Input offset voltage VHoff –20 +20 mV

Input bias current IHb

V

AGC

= 1.4 V

U

IN

10 µA

V

IN

, W

IN

5 µA

Common-mode input voltage range

V

HCM

2.2 5.0 V
[Control]
VC pin input bias current I

VCb

VC= 0 V –10 –1.3 µA

Control start voltage V

THVC

Rf= 0.47 Ω, IO≥ 10 mA

2.25 2.5 2.75 V

With the Hall input logic fixed

Open-loop control gain G

MVC

Rf= 0.47 Ω, ∆IO= 200 mA

0.72 0.9 1.08 A/V

With the Hall input logic fixed and VG shorted to RF

[PG]
PG Hall amplifier

V

PGoff

Design target –10 +10 mV

input offset voltage
Peak hold charge current I

SHCHG

(U, V, W) = (L, L, H) 30 µA
PG comparator threshold THPG SH = 1000pF, Design target* 113 117 121 %
PG output high-level voltage V

PGH

4.5 5.2 V

PG leakage current I

LEAKPG

–10 0 +10 µA

[FG]
Back emf Schmitt input

V

SCHG

In the back emf Schmitt input increasing direction, Design target 100 mV
hysteresis width

In the back emf Schmitt input decreasing direction, Design target 0 mV
Ringing canceller Schmitt

V

SCHR

In the Schmitt input increasing direction, Design target 180 mV
input hysteresis width

In the Schmitt input decreasing direction, Design target –20 0 +20 mV
FG output high-level voltage V

FGH

FGR = 0 V 4.5 5.2 V
FG leakage current I

LEAKFG

–10 0 +10 µA

[TSD]
Thermal shutdown

TTSD Design target 180 °C

operating temperature
Thermal shutdown

∆TSD Design target 15 °C

temperature hysteresis width

No. 5452-3/9

LB1955

Allowable power dissipation, Pd max – W

Ambient temperature, Ta – °C

Pin Assignment

W

IN

2

W

IN

1

V

IN

2

V

IN

1

U

IN

2

U

IN

1

Pin Functions

Pin No. Pin Function

23, 24 U

IN

1, UIN2 U phase Hall element input

25, 26 V

IN

1, VIN2 V phase Hall element input

27, 28 W

IN

1, WIN2 W phase Hall element input
16 UOUT U phase output
15 VOUT V phase output
13 WOUT W phase output
11 LCTR Pin connected to the center points of the coils that are Y-connected to the U, V, and W outputs.

9 V

CC

Power supply

10 V

REF

Reference voltage output

8 GND GND

14 Rf Output current detection

1 VG Closed loop control gain switching
2 FC Speed control loop frequency characteristics correction
3 LIM Output current limit setting
4 VC Speed control
5 PG PG waveform output
6 FG FG waveform output (FGR shorted to GND)
7 FGR PG/FG synthesized output (FGR shorted to PG)

18 SH PG waveform sample-and-hold circuit capacitor connection
22 AGC Connection for the capacitor used by the AGC circuit, which holds the input gain at a fixed level.

12, 17, 19

NC No connection

20, 21