Sanyo LB1951V Specifications

Ordering number: ENN5232A

13

Three-phase Brushless Motor Driver

for Portable VCR Capstan Use

Functions Package Dimensions

Monolithic Digital IC

LB1951V

• 3-phase full-wave current linear drive system

(120 ° voltage linear drive system).

unit : mm

3175A-SSOP24

• Torque ripple correction circuit built in
(overlap correction).

• Speed control system using motor supply voltage control.

• FG comparator built in.

24

[LB1951V]

1.0

• Thermal shutdown circuit built in.

5.6

1

8.0

0.22

0.65

12

0.1

1.6max

0.43

SANYO : SSOP24

7.6

0.5

0.15

Specifications

Absolute Maximum Ratings at Ta = 25°C

Parameter Symbol Conditions Ratings Unit

VCC1 max 10 V

Maximum supply voltage VCC2 max 11 V

Vs max<VCC211V
Applied output voltage VO max VS +2 V
Maximum output current IO max 1.0 A
Allowable power dissipation Pd max Independent IC 440 mW
Operating temperature Topr –20 to +75 °C
Storage temperature Tstg –55 to +150 °C

Any and all SANYO products described or contained herein do not have specifications that can handle
applications that require extremely high levels of reliability, such as life-support systems, aircraft’s
control systems, or other applications whose failure can be reasonably expected to result in serious
physical and/or material damage. Consult with your SANYO representative nearest you before using
any SANYO products described or contained herein in such applications.

SANYO assumes no responsibility for equipment failures that result from using products at values that
exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other
parameters) listed in products specifications of any and all SANYO products described or contained
herein.

SANYO Electric Co.,Ltd. Semiconductor Company

TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110-8534 JAPAN

90699RM (II)/N3095HA (II) No. 5232-1/9

LB1951V

Allowable Operating Ranges at Ta = 25°C

Parameter Symbol Conditions Ratings Unit

VCC1 2.7 to 6.0 V

Supply voltage VCC2 3.5 to 9.0 V

Hall input amplitude V

V

s

HALL

Between Hall inputs ±20 to ±80 mV0-p

to VCC 2V

Electrical Characteristics at Ta = 25°C, VCC1 = 3 V, VCC2 = 4.75 V, VS = 1.5 V

Parameter Symbol Conditions

[Supply Current]
Supply current 1 ICC1 Iout = 100 mA 3.0 5.0 mA
Supply current 2 ICC2 Iout = 100 mA 7.0 10.0 mA
Static current 1 I
Static current 2 I
VS static current I

1V

CCQ

2V

CCQ

SQ

= 0 V 1.5 3.0 mA

STBY

= 0 V 100 µA

STBY

V

= 0 V 40 100 µA

STBY

[VX1]
Upper side residual voltage VXH1 Iout = 0.2 A 0.15 0.22 0.29 V
Lower side residual voltage VXL1 Iout = 0.2 A 0.16 0.21 0.26 V
[VX2]
Upper side residual voltage VXH2 Iout = 0.5 A 0.25 0.40 V
Lower side residual voltage VXL2 Iout = 0.5 A 0.25 0.40 V
Output side saturation voltage Vosat Iout = 0.8 A, Sink + Source 1.40 V
Overlap O.L RL =39 Ω × 3, R angle = 20 kΩ Note 1 70 77 84 %
[Hall Amplifier]
Hall amplifier input offset voltage V

Hall amplifier common-mode
input range

Hall amplifier I/O voltage gain V

HOFF

V

Note 2 –5 +5 mV
R angle = 20 kΩ 0.95 2.4 V

HCM

R angle = 20 kΩ 24.5 27.5 30.5 dB

GVH

[Standby Pin]
Stand-by pin high-level voltage V
Standby pin low-level voltage V
Standby pin input current I
Standby leakage current I

STH

STL

STIN

STLK

V

= 3 V 25 40 µA

STBY

V

= 0 V –30 µA

STBY

[FRC Pin]
FRC pin high-level voltage V
FRC pin low-level voltage V
FRC pin input current I
FRC pin leakage current I

FRCH

FRCL

FRCIN

FRCLKVFRC

V

FRC

= 3 V 20 30 µA

= 0 V –30 µA
[VH]
Hall supply voltage V

HALLIH

= 5 mA, VH (+)–VH (–) 0.85 0.95 1.05 V
VH (–) pin voltage VH(–) IH = 5 mA 0.81 0.88 0.95 V
[FG Comparator]
Input offset voltage V
Input bias current I
Input bias current offset ∆I
Common-mode input range V
Output high-level voltage V
Output low-level voltage V
Voltage gain V
Output current (Sink) I

FGOFF

bFG

bFG
FGCM
FGOH

FGOL

GFG

FGOs

V
V

FGIN
FGIN

+
+

=V
=V

–

= 1.5 V 500 nA

FGIN

–

= 1.5 V –100 +100 nA

FGIN

At internal pull-up 2.8 V
At internal pull-up 0.2 V
(Design target) Note 2 100 dB

With output pin ‘‘L’’ 5 mA
[TSD]
TSD operating temperature T-TSD (Design target value) Note 2 180 °C
TSD temperature hysteresis width ∆TSD (Design target value) Note 2 20 °C

Ratings

min typ max

2.5 V

0.4 V

2.5 V

0.4 V

–3 +3 mV

1.2 2.5 V

Unit

Note 1: Overlapping specifications are assumed to be test specifications.
Note 2: For parameters which have an entry of (Design target value) in the ‘‘Conditions’’ column, no measurements are made.

No. 5232-2/9

LB1951V

0.5

0.44

0.4

0.3

0.2

0.1

Allowable Power dissipation, Pd max – W

0

-20

Pin Assignment

Pd max – Ta

20

0

Ambient temperature, Ta – ˚C

1VCC1

40 60 80 100

0.264W

24 FG

OUT

OUT

OUT

OUT

2VCC2

3Vs

4N.C.

5U

6Rf

23 FGIN(–)

22 FGIN(+)

21 WIN2

20 WIN1

19 VIN2

LB1951V

7V

8Rf

9W

+

10VH

–

11VH

12ANGLE

Top view

18 VIN1

17 UIN2

16 UIN1

15 STBY

14 FRC

13 GND

A12467

No. 5232-3/9

LB1951V

Pin Functions

Pin No. Pin name I/O equivalent circuit Function

1V

2V

3V

5U
7V
9W

6, 8 Rf Pins for grounding output power transistor.

10 VH
11 VH

1 Power supply pin for supplying power to all circuits

CC

except amplitude control block in output block in
IC.

2 Power supply pin for supplying power to all circuits

CC

of the amplitude control block and the output
control block in IC.

S

Power supply pin for motor drive. Apply a voltage of
VCC2 or lower to this pin.

OUT
OUT

OUT

+
–

2

VCC2
VS

3

U

5

OUT

V

7

OUT

W

9

OUT

RF

6
8

A12468

U-phase output pin
V-phase output pin (Spark killer diode built in)
W-phase output pin

Pins for supplying the Hall element bias voltage.

VCC1

1

VH

11

Voltage of 0.95 V (typ.) is generated between VH
and VH– . (when IH = 5 mA)

–

+

Approx.

20kΩ

1.9V

10 VH

+

Approx. 0.9V

20kΩ

A12469

12 ANGLE Pins for controlling the Hall input-output gain. The

1VCC1

gain is controlled by a resistor between this pin and
GND.

4kΩ

ANGLE

VCC1

200Ω

12

16 UIN1 U-phase Hall element input pin;

1.2VTYP

17 UIN2 Logic ‘‘H’’ represents IN+ > IN–.
18 VIN1 V-phase Hall element input pin;
19 VIN2 Logic ‘‘H’’ represents IN+ > IN– .

400Ω

400Ω

4kΩ

200Ω

200Ω

16 18 20

17
19
21

20 WIN1 W-phase Hall element input pin;
21 WIN2 Logic ‘‘H’’ represents IN+ > IN–.

A12470

13 GND Pin for grounding other than output transistors.

Minimum potential of output transistors is equal to
the level at Rf pin.

14 FRC Forward/reverse select pin.

15 STBY Pin for selecting the bias supply for all circuits

VCC1V

50KΩ

14

CC

1

FRC

VCC1V

STBY

CC

1

15

100KΩ100KΩ

The voltage on this pin is used for forward/reverse
select. (with Hysteresis)

except the FG comparator.

100KΩ

‘‘L’’ level on this pin cuts the bias supply.

A12471

Continued on next page.

No. 5232-4/9

LB1951V

Continued from preceding page.

Pin No. Pin name I/O equivalent circuit Function

22 FGIN+ Noninverting input pin for the FG comparator.

23 FGIN– Inverting input pin for the FG comparator.

24 FG

OUT

—

FG

IN

23

200Ω

+

FG

IN

22 24

200Ω

50KΩ 15KΩ

VCC1

No bias is applied internally.

20KΩ

FG

OUT

No bias is applied internally.

FG comparator output pin. A resistive load of 20 kΩ
is provided internally.

A12472

Truth Table

1

2

3

4

5

6

Source → Sink

V → W
W → VL
U → W
W → UL

U → V

Hall input

UVW

HHL

H LL

HLH

FRC

H

H

H

Note: ‘‘H’’ in the FRC column represents a voltage of 2.5 V or

more; ‘‘L’’ represents a voltage of 0.4 V or less.
(At VCC1 =3 V)

Note: ‘‘H’’ in the Hall input columns represents a state in

which ‘‘+’’ has a potential which is higher by 0.02 V or
more than that of the ‘‘–’’ phase inputs.
Conversely, ‘‘L’’ represents a state in which ‘‘+’’ has a
potential which is lower by 0.02 V or more than that of
the ‘‘–’’ phase input.

V → UL
W → V
V → WL
W → U
U → WL

V → U

U → VL

L LH

L HH

LHL

H

H

H

No. 5232-5/9

Block Diagram

VS

U-OUT

V-OUT

W-OUTRFRF

V

CC

1

STBY

VH

+VH–

FGOUT

FG amplifier

3

V

CC

2

R5

R5

R5

R5

R5

B

B

B

R5

TSD

3I

I=O.L×VO1/(1.5×R5)

3I

0 current

distribution

2

5

7

9

6

8

1

15

10

11

24

2322

13GND

12

ANGLE

21

Win2

20

Win1

19

Vin2

18

Vin1

17

Uin2

16

Uin1

14

Forward/

reverse

selection

Hall amplifier

FRC

R6

R6

R3 R4

V

CC

2

VS/2

VO2

Vx+Vf Vs—Vx—Vf

VO3

+

V

CC

1

–

+

–

+

–

+

U

V

W

–

+

–

+

–

+

––

+

+

–

+

–

+

–

VX+VF

FGIN+ FGIN-

+VF

Vx

Vx

R1

3×R1

1.5×R5

O.L×VO1

R2

R2

U—V

V—W

W—U

Bias supply for

each block

Vo1= V

s

+( V

s

–V

x

)= V

s

–V

x

1

4

1

4

1

2

O.L=

R3

R3+R4

Vo3= V

s

–(V

x

—V

f

)+ V

s

=V

s

–V

x

–V

f

1

2

1

2

1.2 V reference

voltage and bias

start-up circuit

Hall supply

voltage output

circuit

A12473

Hall input synthesis block

(Matrix)

Synthesized signal level shift

Drive signal generating block

Upper/lower

amplitude

control

LB1951V

2.

CC

* For the blocks drawn with thick lines, power is supplied from V

No. 5232-6/9

Overlap Creation and Calculation

LB1951V

V

S

Upper residual voltage V

Upper clamp potential

O.L×( –VXH)

V

S

2

Lower clamp potential V

Lower residual voltage V

Time

–V

VS–V

V

S

2

XH

XH

XH

XL

XL

A12474

VS-V

Absolute
voltage

Calculated

midpoint

VN

V

S

XH
Vα

AB
Electrical
angle 180°

CD

Vβ

V

XL

i) Overlap creation

Because the voltage generated in the amplitude control block is: 2 × O.L. × (1/2 VS –V

) for each side,

X

(using the midpoint as the reference point), the point at which the two waveforms cross each other is O.L. (1/2 VS –VX )
from the midpoint.
Because that waveform is clamped at (1/2 VS –VX ) with the midpoint as the reference point, the overlap equals A/B
× 100, which equals O.L. × 100 (%).

ii) Overlap calculation
(1) Upper overlap amount

Calculated midpoint VN =

(VS –VXH –VXL )

2

+VXL =

(VS –VXH +VXL)

2

Because A = Vα –VN and B =VS –VXH – VN, the upper overlap amount is calculated as follows:

Overlap amount =

B VS –VXH – {(VS –VXH +V

A

Vα –{(VS –VXH +VXL )/2}

=

=

2Vα –(VS –VXH )–V

(VS –VXH )–V

XL

XL

XL

× 100

)/2}

× 100 (%)

(2) Lower overlap amount

Because C = VN – Vβ and D = VN – VXL , the lower overlap amount is calculated as follows:

Overlap amount = C =

D {(VS –VXH +VXL )/2} – V

{( VS –VXH +VXL )/2} – Vβ

(VS –VXH )+VXL –2Vβ

=

(VS –VXH )–V

× 100

XL

× 100 (%)

XL

No. 5232-7/9

112

24 13

LB1951V

TOP VIEW

Hall bias resistor R is selected

to match the sensor output.

Angle resistance

200kΩ

Hall input

Hall output

Hall output

Hall output

R

0.15µF×3

0.22µF

V

CC

2

VS (Motor speed control power supply)

Forward/reverse instructing

voltage supply pin

Standby control pin

FG

OUT

V

CC

1

0.22µF

R

MR

L

LL

A12475

Sample Application Circuit

LB1951V

Note: It should be noted that the constants specified are for example only, with no guarantee for characteristics implied.

No. 5232-8/9

LB1951V

Specifications of any and all SANYO products described or contained herein stipulate the performance,
characteristics, and functions of the described products in the independent state, and are not guarantees
of the performance, characteristics, and functions of the described products as mounted in the customer’s
products or equipment. To verify symptoms and states that cannot be evaluated in an independent device,
the customer should always evaluate and test devices mounted in the customer’s products or equipment.

SANYO Electric Co., Ltd. strives to supply high-quality high-reliability products. However, any and all
semiconductor products fail with some probability. It is possible that these probabilistic failures could
give rise to accidents or events that could endanger human lives, that could give rise to smoke or fire,
or that could cause damage to other property. When designing equipment, adopt safety measures so
that these kinds of accidents or events cannot occur. Such measures include but are not limited to protective
circuits and error prevention circuits for safe design, redundant design, and structural design.

In the event that any or all SANYO products(including technical data,services) described or
contained herein are controlled under any of applicable local export control laws and regulations,
such products must not be exported without obtaining the export license from the authorities
concerned in accordance with the above law.

No part of this publication may be reproduced or transmitted in any form or by any means, electronic or
mechanical, including photocopying and recording, or any information storage or retrieval system,
or otherwise, without the prior written permission of SANYO Electric Co. , Ltd.

Any and all information described or contained herein are subject to change without notice due to
product/technology improvement, etc. When designing equipment, refer to the “Delivery Specification”
for the SANYO product that you intend to use.

Information (including circuit diagrams and circuit parameters) herein is for example only ; it is not
guaranteed for volume production. SANYO believes information herein is accurate and reliable, but
no guarantees are made or implied regarding its use or any infringements of intellectual property rights
or other rights of third parties.

This catalog provides information as of September, 1999. Specifications and information herein are subject to change
without notice.

No. 5232-9/9

PS