SANYO LB1929 Datasheet

Ordering number : ENN7099

71202RM (OT) No. 7099-1/12

Overview

The LB1929 is a three-phase brushless motor driver that is
optimal for driving the drum and paper feed motors in
laser printers and plain-paper copiers. It can provide drive
with minimal power loss due to direct PWM drive
technique, features on-chip peripheral circuits such as a
speed control circuit and an FG amplifier, and can
implement a drive circuit in a single chip.

Functions and Features

• Three-phase bipolar drive (30 V, 3.5 A)

• Direct PWM drive

• Built-in low side output kickback absorption diode

• Control technique that combines a speed discriminator
with PLL speed control

• Speed lock detection output

• Built-in forward/reverse switching circuit

• Full complement of built-in protection circuits,
including current limiter, thermal protection circuit, and
motor lockup protection circuit.

Package Dimensions

unit: mm

3147B-DIP28H

1

14

28

15

0.4

0.6

4.04.0

26.75

20.0

R1.7

8.4

(1.81)

1.78

1.0

12.7

11.2

SANYO: DIP-28H (500 mil)

[LB1929]

LB1929

SANYO Electric Co.,Ltd. Semiconductor Company

TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110-8534 JAPAN

Three-Phase Brushless Motor Driver for OA Products

Monolithic Digital IC

Any and all SANYO products described or contained herein do not have specifications that can handle
applications that require extremely high levels of reliability, such as life-support systems, aircraft’s
control systems, or other applications whose failure can be reasonably expected to result in serious
physical and/or material damage. Consult with your SANYO representative nearest you before using
any SANYO products described or contained herein in such applications.

SANYO assumes no responsibility for equipment failures that result from using products at values that
exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other
parameters) listed in products specifications of any and all SANYO products described or contained
herein.

Parameter Symbol Conditions Ratings Unit

Supply voltage V

CC

max 30 V

Output current I

O

max T ≤ 500 ms 3.5 A
Allowable power dissipation 1 Pd max1 Independent IC 3 W
Allowable power dissipation 2 Pd max2 Infinitely large heat sink 20 W
Operating temperature Topr –20 to +80 °C
Storage temperature Tstg –55 to +150 °C

Specifications

Absolute Maximum Ratings at Ta = 25°C

Parameter Symbol Conditions Ratings Unit

Supply voltage range 1 V

CC

9.5 to 28 V
Regulator-voltage output current IREG 0 to –30 mA
LD output current ILD 0 to 15 mA

Allowable Operating Range at Ta = 25°C

No. 7099-2/12

LB1929

Parameter Symbol Conditions

Ratings

Unit

min typ max

Supply current 1 I

CC

1 23 30 mA

Supply current 2 I

CC

2 Stop mode 3.5 5 mA
Output block
Output saturation voltage 1 V

O

sat1 IO= 1.0 A, VO(SINK) + VO(SOURCE) 2.0 2.5 V

Output saturation voltage 2 V

O

sat2 IO= 2.0 A, VO(SINK) + VO(SOURCE) 2.6 3.2 V

Output leakage current I

O

leak 100 µA
Lower diode forward voltage 1 VD1 ID = –1.0 A 1.2 1.5 V
Lower diode forward voltage 2 VD2 ID = –2.0 A 1.5 2.0 V
Regulator-voltage output
Output voltage VREG I

O

= –5 mA 4.65 5.00 5.35 V

Voltage regulation ∆VREG1 V

CC

= 9.5 to 28 V 30 100 mV

Load regulation ∆VREG2 I

O

= –5 to –20 mA 20 100 mV
Hall Amplifier
Input bias current IHB –2 –0.5 µA
Common-mode input voltage range VICM 1.5

VREG – 1.5

V
Hall input sensitivity 80 mVp-p
Hysteresis width ∆V

IN

15 24 42 mV

Input voltage L

→ H VSLH 12 mV
Input voltage H → L VSHL –12 mV
PWM oscillator circuit
Output H level voltage

VOH(PWM)

2.5 2.8 3.1 V

Output L level voltage

VOL(PWM)

1.2 1.5 1.8 V
Oscillator frequency f (PWM) C = 3900pF 18 kHz
Amplitude V (PWM) 1.05 1.30 1.55 Vp-p
CSD circuit
Operating voltage

VOH(CSD)

3.6 3.9 4.2 V
External C charge current ICHG –17 –12 –9 µA
Operating time T (CSD) C = 10 µF, Design target value 3.3 s
Current limiter operation
Limiter VRF V

CC

–VM 0.45 0.5 0.55 V
Thermal shutdown operation
Thermal shutdown operating temperature TSD Design target value (junction temperature) 150 180 °C
Hysteresis width ∆TSD Design target value (junction temperature) 50 °C

Electrical Characteristics at Ta = 25°C, VCC= VM = 24 V

Note*: These items are design target values and are not tested.

Continued on next page.

No. 7099-3/12

LB1929

Continued from preceding page.

Parameter Symbol Conditions

Ratings

Unit

min typ max
FG amplifier
Input offset voltage V

IO

(FG) –10 10 mV
Input bias current IB (FG) –1 1 µA
Output H level voltage V

OH

(FG) IFGO = –0.2 mA

VREG – 1.2 VREG – 0.8

V

Output L level voltage V

OL

(FG) IFGO = 0.2 mA 0.8 1.2 V
FG input sensitivity Gain 100-fold 3 mV
Next-stage Schmidt width Design target value * 100 180 250 mV
Operating frequency range 2 kHz
Open loop GAIN f (FG) = 2 kHz 45 51 dB
Speed discriminator
Output H level voltage V

OH

(D) IDO = –0.1 mA

VREG – 1.0 VREG – 0.7

V

Output L level voltage V

OL

(D) IDO = 0.1 mA 0.8 1.1 V
No. of counts 512
PLL output
Output H level voltage V

OH

(P) IPO = –0.1 mA

VREG – 1.8 VREG – 1.5 VREG – 1.2

V

Output L level voltage V

OL

(P) IPO = 0.1 mA 1.2 1.5 1.8 V
Lock detection
Output L level voltage V

OL

(LD) ILD = 10 mA 0.15 0.5 V
Lock range 6.25 %
Integrator
Input bias current IB (INT) –0.4 0.4 µA
Output H level voltage V

OH

(INT) IINTO = –0.2 mA

VREG – 1.2 VREG – 0.8

V

Output L level voltage V

OL

(INT) IINTO = 0.2 mA 0.8 1.2 V
Open loop GAIN f (INT) = 1 kHz 45 51 dB
Gain-bandwidth product Design target value * 450 kHz
Reference voltage Design target value * –5% VREG/2 5% V
Crystal oscillator
Operating frequency range f

OSC

3 10 MHz
L level pin voltage VOSCL IOSC = –0.5 mA 1.65 V
H level pin current IOSCH VOSC = VOSCL + 0.3 V 0.4 mA
Start/stop pin
H level input voltage range V

IH

(S/S) 3.5 VREG V

L level input voltage range V

IL

(S/S) 0 1.5 V

Input open voltage V

IO

(S/S)

VREG – 0.5

VREG V

Hysteresis width ∆V

IN

0.35 0.50 0.65 V

H level input current I

IH

(S/S) V (S/S) = VREG –10 0 10 µA

L level input current I

IL

(S/S) V (S/S) = 0 V –280 –210 µA
Forward/reverse pin
H level input voltage range V

IH

(F/R) 3.5 VREG V

L level input voltage range V

IL

(F/R) 0 1.5 V

Input open voltage V

IO

(F/R)

VREG – 0.5

VREG V

Hysteresis width ∆V

IN

0.35 0.50 0.65 V

H level input current I

IH

(F/R) V (F/R) = VREG –10 0 10 µA
L level input current I

IL

(F/R) V (F/R) = 0 V –280 –210 µA

Note*: These items are design target values and are not tested.

No. 7099-4/12

LB1929

Truth Table

Pin Assignment

The crystal oscillation frequency fosc is related to the FG frequency fFGas follows:

fFG(servo) = f

OSC

/(ECL16 division × No. of counts)

= f

OSC

/8192

Source F/R= “L” F/R= “H”

Sink IN1 IN2 IN3 IN1 IN2 IN3
1 OUT2 → OUT1 H L H L H L
2 OUT3 → OUT1 H L L L H H
3 OUT3 → OUT2 H H L L L H
4 OUT1 → OUT2 L H L H L H
5 OUT1 → OUT3 L H H H L L
6 OUT2 → OUT3 L L H H H L

OUT1 F/R IN3+ IN3– IN2+ IN2–

27 2628 24 2325 21 2022 19 18 17 16 15

OUT2 OUT3 GND2 V

24

20

16

CC

VM

VREG PWM CSD XI XO INTOUT INTIN POUT DOUT

IN1+ IN1–

LB1929

Pd max – Ta

Infinitely large heat sink

GND1 S/S FGIN+ FGIN– FGOUT LD

1413121110987654321

Top view

12

8

Power dissipation, Pd max – W

4
3

0

–20 0 20 40 60 80 100

No heat sink

Ambient temperature, Ta – °C