SANYO LB1913 Datasheet
Overview
The LB1913 is a three-phase disk drive motor driver IC
that is optimal for use as a 3.5-inch floppy disk drive
spindle motor driver.
Functions and Features
• Three-phase full-wave linear drive
• On-chip digital speed control
• Start and stop circuits (active low)
• Speed switching
High: 300 rpm, Low: 360 rpm
• Current limiter circuit
• Index comparator circuit
• Index delay circuit
• Thermal protection circuit
Package Dimensions
unit: mm
3222-HSOP28
Monolithic Integrated IC
Ordering number : EN5503
83196HA (0T) No. 5503-1/6
SANYO: HSOP28
[LB1913]
SANYO Electric Co.,Ltd. Semiconductor Bussiness Headquarters
TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110 JAPAN
FDD Spindle Motor Driver
LB1913
Parameter Symbol Conditions Ratings Unit
Maximum supply voltage V
CC
max 7.0 V
Maximum output current I
O
max1 t ≤ 0.5 s 1.0 A
Maximum steady-state output current I
O
max2 0.7 A
Allowable power dissipation Pd max Independent IC 0.5 W
Operating temperature Topr –20 to +80 °C
Storage temperature Tstg –40 to +150 °C
Parameter Symbol Conditions Ratings Unit
Recommended supply voltage V
CC
4.2 to 6.5 V
Specifications
Absolute Maximum Ratings at Ta = 25°C
Allowable Operating Ranges at Ta = 25°C
No. 5503-2/6
LB1913
Note: * These items are design target values and are not tested.
A “high-level” (H) Hall amplifier input means: U
IN
+ > UIN–
V
IN
+ > VIN–
W
IN
+ > WIN–
Electrical Characteristics at Ta = 25°C, VCC= 5.0 V
Parameter Symbol Conditions
Ratings
Unit
min typ max
Current drain
I
CCO
S/S = 5 V (standby mode) 10 µA
I
CC
S/S = 0 V (normal mode) 12 18 mA
SL bias current I
SL
VSL= 0V 10 µA
SL input low-level voltage V
SLL
0 1.0 V
SL input high-level voltage V
SLH
3.5 V
CC
V
S/S bias current I
S/S
180 270 µA
S/S low-level voltage V
S/SL
0 0.8 V
S/S high-level voltage V
S/SH
3.5 V
CC
V
Hall amplifier input bias current I
HB
10 µA
Common-mode input voltage range Vh 1.5 V
CC
–1.0 V
Differential-mode input voltage range Vdif 50 200 mVp-p
Hall bias output voltage V
HIH
= 5 mA 0.8 V
Leakage current I
HL
S/S = 5 V ±10 µA
Output saturation voltage Vsat I
O
= 0.7 A, sink + source 1.3 1.8 V
Output leakage current I
OL
1.0 mA
Current limiter Vlim 0.27 0.3 0.33 V
Control amplifier voltage gain G
C
–7 dB
Interphase voltage gain difference ∆G
C
±1 dB
V/I converter source current I
+
9 14 19 µA
V/I converter sink current I
–
–9 –14 –19 µA
V/I converter current ratio I+/I
–
0.8 1.0 1.2
DSC buffer input current I
DSC
1.0 µA
FG Schmitt hysteresis ∆Vsh * 50 mV
Number of speed discriminator counts N 1041.5
Discriminator operating frequency F
D
* 1.1 MHz
Oscillator frequency range F
OSC
* 1.1 MHz
Index output low-level voltage V
IDLIO
= 2 mA 0.4 V
Index output leakage current I
IDL
±10 µA
FG amplifier voltage gain G
FG
* 48 dB
FG amplifier input offset V
FGO
±10 mV
FG amplifier internal reference voltage V
FGB
2.2 2.5 2.8 V
Schmitt hysteresis ∆V
SH
* 50 mV
Index input hysteresis ∆V
ID
* 20 mV
Index common-mode input voltage range V
ID
1.0 VCC–1.0 V
Thermal shutdown circuit operating
TSD * 150 180 °C
temperature
Hysteresis ∆TSD * 40 °C
Source → Sink
Hall input
U V W
1 V phase → W phase H H L
2 V phase → U phase L H L
3 W phase → U phase L H H
4 W phase → V phase L L H
5 U phase → V phase H L H
6 U phase → W phase H L L
Truth Table
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