Sanyo LB1889 Specifications

Ordering number: EN 5131

Monolithic Digital IC

LB1889, 1889M, 1889D

3-phase Brushless Motor Driver

for VTR Capstans

Functions

Package Dimensions

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.

.

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3-phase full-wave current linear drive system Torque ripple correction circuit built in (variable compensation ratio)

Current limiting circuit built in/with control characteristic gain switch

Output stage upper/lower oversaturation prevention circuit built in (no external capacitor required)

FG amplifier built in

Thermal shutdown circuit built in

unit : mm

3206-QFP34H

[LB1889]

SANYO : QFP34H

3147A-DIP28HS

[LB1889D]

3129-MFP36S

[LB1889M]

SANYO : MFP36S

SANYO : DIP28HS (500mil)

SANYO Electric Co.,Ltd. Semiconductor Bussiness Headquarters

TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110-8534 JAPAN

92595HA (II) No.5131-1/13

LB1889, 1889M, 1889D

Specifications

Absolute Maximum Ratings at Ta = 25 ° C

Parameter

Symbol

Conditions

Ratings

Unit

Maximum supply voltage

VCC max

7

V

VS max

24

V

Maximum output current

IO max

1.3

A

Arbitrarily large heat sink

LB1889

12.5

W

Arbitrarily large heat sink

LB1889D

15.0

W

Allowable power dissipation

Pd max

Independent IC

LB1889

0.77

W

Independent IC

LB1889M

0.95

W

Independent IC

LB1889D

3.0

W

Operating temperature

Topr

±20 to +75

°C

Storage temperature

Tstg

±55 to +150

°C

Allowable Operating Ranges at Ta = 25 ° C

Parameter

Symbol

Conditions

Ratings

Unit

Supply voltage

VS

5 to 22

V

VCC

4.5 to 5.5

V

Hall input amplitude

VHALL

Between Hall inputs

±30 to ±80

mV0-P

GSENSE input range

VGSENSE

Relative to control system GND

±0.20 to +0.20

V

Electrical Characteristics at Ta = 25 ° C, VCC = 5 V, VS = 15 V

Parameter

Symbol

Conditions

min

typ

max

Unit

VCC supply current

ICC

RL = ∞ (when stopped), VCTL = 0 V, VLIM = 0 V

12

18

mA

[Output]

VOsat1

IO = 500 mA, Rf = 0.5 Ω, Sink + Source

2.1

2.6

V

Output saturation voltage

VCTL = VLIM = 5 V (with saturation prevention)

VOsat2

IO = 1.0 A, Rf = 0.5 Ω, Sink + Source

2.6

3.5

V

VCTL = VLIM = 5 V (with saturation prevention)

Output leakage current

Ioleak

1.0

mA

[FR]

FR pin input threshold voltage

VFSR

2.25

2.50

2.75

V

FR pin input bias current

Ib (FSR)

±5.0

µA

[Control]

CTLREF pin voltage

VCREF

2.37

2.50

2.63

V

CTLREF pin input range

VCREFIN

1.70

3.50

V

CTL pin input bias current

Ib (CTL)

VCTL = 5 V, CTLREF : Open

8.0

µA

CTL pin control start voltage

VCTL (ST)

With Rf = 0.5 Ω, VLIM = 5 V, IO ^ 10 mA,

2.20

2.35

2.50

V

Hall input logic fixed, (u, v, w = H, H, L)

CTL pin control switch voltage

VCTL (ST2)

Rf = 0.5 Ω, VLIM = 5 V

3.00

3.15

3.30

V

CTL pin control Gm1

Gm1 (CTL)

With Rf = 0.5 Ω,

IO = 200 mA,

0.52

0.65

0.78

A/V

Hall input logic fixed, (u, v, w = H, H, L)

CTL pin control Gm2

Gm2 (CTL)

With Rf = 0.5 Ω,

VCTL = 200 mV,

1.20

1.50

1.80

A/V

Hall input logic fixed, (u, v, w = H, H, L)

[Current Limit]

LIM current limit offset voltage

Voff (LIM)

With Rf = 0.5 Ω, VCTL = 5 V, IO ^ 10 mA,

140

200

260

mV

Hall input logic fixed, (u, v, w = H, H, L)

LIM pin input bias current

Ib (LIM)

With VCTL = 5 V, CTLREF : Open,

±2.5

µA

VLIM = 0 V

LIM pin current limit level

I lim

With Rf = 0.5 Ω, VCTL = 5 V, VLIM = 2.06 V,

830

900

970

mA

Hall input logic fixed, (u, v, w = H, H, L)

[Hall Amplifier]

Hall amplifier input offset

Voff (HALL)

±6

+6

mV

voltage

Hall amplifier input bias current

Ib (HALL)

1.0

3.0

µA

Hall amplifier common-mode

Vcm (HALL)

1.3

3.3

V

input voltage

Continued on next page.

No.5131 - 2/13

LB1889, 1889M, 1889D

Continued from preceding page.

	Parameter	Symbol		Conditions	min	typ	max	Unit
	[TRC]
	Torque ripple correction factor	TRC	At bottom and peak in Rf waveform at IO = 200 mA			9		%
			(RF = 0.5 Ω, ADJ-OPEN) Note 2
	ADJ pin voltage	Vadj			2.37	2.50	2.63	V
	[FG Amplifier]
	FG amplifier input offset voltage	Voff (FG)			±8		+8	mV
	FG amplifier input bias current	Ib (FG)			±100			nA
	FG amplifier output saturation	VOsat (FG)	At internal pull-up resistor load on sink side				0.5	V
	voltage
	FG amplifier common-mode	VCM (FG)			0.5		4.0	V
	input voltage
	[Saturation]
	Saturation prevention circuit	VOsat (DET)	Voltage between each OUT and Rf at IO = 10 mA,		0.175	0.25	0.325	V
	lower set voltage		Rf = 0.5 Ω, VCTL = VLIM = 5 V
	[TSD]
	TSD operation temperature	T-TSD	(Design target)	Note 1		180		°C
	TSD temperature hysteresis	TSD	(Design target)	Note 1		20		°C
	width

Note 1: No measurements are performed for any values listed in the conditions column as design targets. Note 2: The torque ripple correction factor is calculated using the Rf voltage waveform as follows.

Hall input logic settings

GND level

Correction factor =	2 × (Vp − Vb)	× 100 (%)

Vp + Vb

Truth Table & Control Function

	Source → Sink		Hall input				FR
		U		V		W
1	V → W	H		H		L	H
	W → V						L
2	U → W	H		L		L	H
	W → U						L
3	U → V	H		L		H	H
	V → U						L
4	W → V	L		L		H	H
	V → W						L
5	W → U	L		H		H	H
	U → W						L
6	V → U	L		H		L	H
	U → V						L

Note: ``H'' in the FR column represents a voltage of 2.75 V or more; ``L'' represents a voltage of 2.25 V or less.

(At VCC = 5 V)

Note: ``H'' in the Hall input columns represents a state in which ``+'' has a potential which is higher by 0.01 V or more than that of the ``−'' phase inputs.

Conversely, ``L'' represents a state in which ``+'' has a potential which is lower by 0.01 V or more than that of the ``−'' phase input.

Note: Since 180° energized system is used as the drive system, other phases than the sink and source phases are turned off.

No.5131 - 3/13

LB1889, 1889M, 1889D

Control Function & Current Limit Function

Control characteristics

Current limit characteristics

Slope = 0.50 A/V typ

Pin Functions

The pin number in (		) is for MFP, that in <	> is for DIP, and other than these is for QFP.
Pin name		Pin No.			Function
FR	1 (33) <26>			Forward/reverse select pin. The pin voltage selects forward/reverse. (Vth = 2.5 V typ at
				VCC = 5 V)
GND	2 (34) <27>			GND for other than output transistor. Minimum potential of output transistor is at Rf pin.
FGin (±)	5 (3) <28>			Input pin when FG amplifier is used with inverted input. Feedback resistor is connected
				between this pin and FG-OUT.
FGin (+)	6 (4) <1>			Noninverting input pin when FG amplifier is used with differential input. Internal bias is
				not applied.
FG-OUT	8 (5) <3>			FG amplifier output pin. Resistive load provided internally.
CTL	9 (6) <4>			Speed control pin. Control is exercised by constant-current drive with current feedback
				applied from Rf. Gm = 0.65 A/V & 1.50 A/V typ at Rf = 0.5 Ω
CTLREF	10	(7) <5>		Control reference voltage pin. The voltage is set internally to approx. VCC/2 but this can
				be varied by applying voltage through a low impedance (input impedance = approx.
				2.5 kΩ).
LIM	11 (8) <6>			Current limiting function control pin. The output current is varied linearly by this pin
				voltage; slope = 0.5 A/V typ at Rf = 0.5 Ω.
FC	12	(9) <7>		Speed control loop frequency characteristic correction pin
Uin+, Uin±	13, 14 (10, 11) <8, 9>			U-phase Hall device input pin; logic ``H'' represents IN+ > IN−.
Vin+, Vin±	15, 16 (12, 13) <10, 11>			V-phase Hall device input pin; logic ``H'' represents IN+ > IN−.
Win+, Win±	17, 18 (14, 15) <12, 13>			W-phase Hall device input pin; logic ``H'' represents IN+ > IN−.
VCC	19	(16) <14>		Power supply pin for supplying power to all circuits except output section in IC; this
				voltage must be stabilized so as to eliminate ripple and noise.
VS	22	(21) <15>		Output selection power supply pin
ADJ	23	(22) <16>		Pin for external adjustment of torque ripple correction factor. When this factor is to be
				adjusted, a voltage is externally applied to the ADJ pin through a low impedance. If the
				voltage applied is increased, the factor drops; conversely, if it is reduced, the factor rises.
				The factor varies between 0 and 2 times that of the open state. (The voltage is set inside
				to approx. VCC/2 internally, and the input impedance is approx. 5 kΩ.)
Rf (PWR)	24	(23) <17>		Output current detection pin. Current feedback is applied to the control section by
Rf (SNS)	33	(31) <24>		connecting Rf between this pin and GND. The lower oversaturation prevention circuit
				and torque ripple correction circuit are activated in accordance with this pin voltage.
				Since the oversaturation prevention level is set with this voltage, the lower
				oversaturation prevention effect may deteriorate in the high current range if the Rf value
				is reduced to an extremely low level. The PWR and SENSE pins must always be
				connected.
Uout	27	(26) <21>		U-phase output pin
Vout	29	(27) <22>		V-phase output pin	(Built-in spark killer diode)
Wout	31	(28) <23>		W-phase output pin
GSENSE	34	(32) <25>		GND sensing pin. By connecting this pin to the neighboring GND on the Rf resistor side
				of the motor GND wire which contains Rf, the effect that GND common impedance
				exerts on Rf can be eliminated. (This pin must not be left open.)

No.5131 - 4/13