Sanyo LB1889 Specifications

Ordering number: EN 5131

Monolithic Digital IC

LB1889, 1889M, 1889D

3-phase Brushless Motor Driver

for VTR Capstans

Functions

.

3-phase full-wave current linear drive system

.

Torque ripple correction circuit built in (variable
compensation ratio)

.

Current limiting circuit built in/with control characteristic
gain switch

.

Output stage upper/lower oversaturation prevention circuit
built in (no external capacitor required)

.

FG amplifier built in

.

Thermal shutdown circuit built in

3147A-DIP28HS

[LB1889D]

Package Dimensions

unit : mm

3206-QFP34H

[LB1889]

SANYO : QFP34H

3129-MFP36S

[LB1889M]

SANYO : MFP36S

SANYO : DIP28HS (500mil)

SANYO Electric Co.,Ltd. Semiconductor Bussiness Headquarters

TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110-8534 JAPAN

92595HA (II) No.5131-1/13

LB1889, 1889M, 1889D

Specifications

Absolute Maximum Ratings atTa=25°C

Parameter Symbol Conditions Ratings Unit

V

max 7V

Maximum supply voltage

Maximum output current I

Allowable power dissipation Pd max

Operating temperature Topr –20 to +75
Storage temperature Tstg –55 to +150

Allowable Operating Ranges atTa=25°C

Parameter Symbol Conditions Ratings Unit

Supply voltage

Hall input amplitude V
GSENSE input range V

CC

V

max 24 V

S

max 1.3 A

O

Arbitrarily large heat sink LB1889 12.5 W
Arbitrarily large heat sink LB1889D 15.0 W
Independent IC LB1889 0.77 W
Independent IC LB1889M 0.95 W
Independent IC LB1889D 3.0 W

V

S

V

CC

HALL

GSENSE

Between Hall inputs ±30 to ±80 mV
Relative to control system GND –0.20 to +0.20 V

5to22 V

4.5 to 5.5 V

C

°

C

°

0-P

Electrical Characteristics atTa=25°C, VCC=5V,VS=15V

Parameter Symbol Conditions min typ max Unit

V

supply current I

CC

CC

[Output]

V

Osat

Output saturation voltage

V

Osat

Output leakage current Ioleak 1.0 mA
[FR]
FR pin input threshold voltage V

FSR

FR pin input bias current Ib (FSR) –5.0 µA
[Control]
CTLREF pin voltage V
CTLREF pin input range V

CREF

CREF

CTL pin input bias current Ib (CTL) V
CTL pin control start voltage V
CTL pin control switch voltage V

CTL

CTL

CTL pin control Gm1 Gm1 (CTL)

CTL pin control Gm2 Gm2 (CTL)
[Current Limit]
LIM current limit offset voltage Voff (LIM)

LIM pin input bias current Ib (LIM)

LIM pin current limit level I lim
[Hall Amplifier]

Hall amplifier input offset
voltage

Voff (HALL) –6 +6 mV

Hall amplifier input bias current Ib (HALL) 1.0 3.0 µA
Hall amplifier common-mode

input voltage

Vcm (HALL) 1.3 3.3 V

RL= ∞ (when stopped), V

I

= 500 mA, Rf = 0.5 Ω, Sink + Source

O

1

V

CTL=VLIM

I

= 1.0 A, Rf = 0.5 Ω, Sink + Source

O

2

V

CTL=VLIM

= 5 V (with saturation prevention)

= 5 V (with saturation prevention)

CTL

=0V,V

= 0 V 12 18 mA

LIM

2.1 2.6 V

2.6 3.5 V

2.25 2.50 2.75 V

2.37 2.50 2.63 V

IN 1.70 3.50 V

= 5 V, CTLREF : Open 8.0 µA

CTL

With Rf = 0.5 Ω,V

(ST)

Hall input logic fixed, (u, v,w=H,H,L)

(ST2) Rf = 0.5 Ω,V

LIM

With Rf = 0.5 Ω, ∆I
Hall input logic fixed, (u, v,w=H,H,L)

With Rf = 0.5 Ω, ∆V
Hall input logic fixed, (u, v,w=H,H,L)

With Rf = 0.5 Ω,V
Hall input logic fixed, (u, v,w=H,H,L)

With V
V

LIM

= 5 V, CTLREF : Open,

CTL

=0V

With Rf = 0.5 Ω,V
Hall input logic fixed, (u, v,w=H,H,L)

=5V,IO^10 mA,

LIM

2.20 2.35 2.50 V

= 5 V 3.00 3.15 3.30 V

= 200 mA,

O

= 200 mV,

CTL

=5V,IO^10 mA,

CTL

0.52 0.65 0.78 A/V

1.20 1.50 1.80 A/V

140 200 260 mV

–2.5 µA

CTL

=5V,V

LIM

= 2.06 V,

830 900 970 mA

Continued on next page.

No.5131 - 2/13

LB1889, 1889M, 1889D

Continued from preceding page.

Parameter Symbol Conditions min typ max Unit

[TRC]
Torque ripple correction factor T
ADJ pin voltage Vadj 2.37 2.50 2.63 V

[FG Amplifier]
FG amplifier input offset voltage Voff (FG) –8 +8 mV
FG amplifier input bias current Ib (FG) –100 nA
FG amplifier output saturation

voltage
FG amplifier common-mode

input voltage
[Saturation]
Saturation prevention circuit

lower set voltage
[TSD]
TSD operation temperature T-TSD (Design target) Note 1 180
TSD temperature hysteresis

width

RC

V

Osat

V

CM

V

Osat

∆TSD (Design target) Note 1 20

Note 1: No measurements are performed for any values listed in the conditions column as design targets.
Note 2: The torque ripple correction factor is calculated using the Rf voltage waveform as follows.

At bottom and peak in Rf waveform at IO= 200 mA
(RF = 0.5 Ω, ADJ-OPEN) Note 2

(FG) At internal pull-up resistor load on sink side 0.5 V

(FG) 0.5 4.0 V

Voltage between each OUT and Rf at I

(DET)

Rf = 0.5 Ω,V

CTL=VLIM

=5V

=10mA,

O

0.175 0.25 0.325 V

9%

C

°

C

°

Hall input logic settings

GND level

Correction factor =

2 × (Vp − Vb)

Vp + Vb

× 100 (%)

Truth Table & Control Function

Source → Sink

1

2

3

4

5

6

V→W
W→VL
U→W
W→UL

U→V

V→UL
W→V
V→WL
W→U
U→WL

V→U

U→VL

Hall input

UVW

HHL

HLL

HLH

LLH

LHH

LHL

FR

H

H

H

H

H

H

Note: Since 180° energized system is used as the drive system, other phases than the sink and source phases are turned off.

Note: ‘‘H’’ in the FR column represents a voltage of 2.75 V or

more; ‘‘L’’ represents a voltage of 2.25 V or less.
(At V

CC

=5V)

Note: ‘‘H’’ in the Hall input columns represents a state in

which ‘‘+’’ has a potential which is higher by 0.01 V or
more than that of the ‘‘−’’ phase inputs.
Conversely, ‘‘L’’ represents a state in which ‘‘+’’ has a
potential which is lower by 0.01 V or more than that of
the ‘‘−’’ phase input.

No.5131 - 3/13

LB1889, 1889M, 1889D

Control Function & Current Limit Function

Control characteristics

Current limit characteristics

Slope = 0.50 A/V typ

Pin Functions

The pin number in ( ) is for MFP, that in < > is for DIP, and other than these is for QFP.

Pin name Pin No. Function

FR 1 (33) <26> Forward/reverse select pin. The pin voltage selects forward/reverse. (Vth = 2.5 V typ at

GND 2 (34) <27> GND for other than output transistor. Minimum potential of output transistor is at Rf pin.
FGin (–) 5 (3) <28> Input pin when FG amplifier is used with inverted input. Feedback resistor is connected

FGin (+) 6 (4) <1> Noninverting input pin when FG amplifier is used with differential input. Internal bias is

FG-OUT 8 (5) <3> FG amplifier output pin. Resistive load provided internally.
CTL 9 (6) <4> Speed control pin. Control is exercised by constant-current drive with current feedback

CTLREF 10 (7) <5> Control reference voltage pin. The voltage is set internally to approx. V

LIM 11 (8) <6> Current limiting function control pin. The output current is varied linearly by this pin

FC 12 (9) <7> Speed control loop frequency characteristic correction pin

+

CC

S

, Uin

–

13, 14 (10, 11) <8, 9>

–

15, 16 (12, 13) <10, 11>

–

17, 18 (14, 15) <12, 13>
19 (16) <14> Power supply pin for supplying power to all circuits except output section in IC; this

22 (21) <15> Output selection power supply pin

Uin
Vin+,Vin
Win+, Win

V

V
ADJ 23 (22) <16> Pin for external adjustment of torque ripple correction factor. When this factor is to be

Rf (PWR)
Rf (SNS)

Uout
Vout
Wout

24 (23) <17>
33 (31) <24>

27 (26) <21>
29 (27) <22>
31 (28) <23>

GSENSE 34 (32) <25> GNDsensing pin. By connecting this pin to the neighboring GND on the Rf resistor side

V

=5V)

CC

between this pin and FG-OUT.

not applied.

applied from Rf. Gm = 0.65 A/V & 1.50 A/V typ at Rf = 0.5 Ω

/2 but this can

be varied by applying voltage through a low impedance (input impedance = approx.

CC

2.5 kΩ).

voltage; slope = 0.5 A/V typ at Rf = 0.5 Ω.

U-phase Hall device input pin; logic ‘‘H’’ represents IN+ > IN−.
V-phase Hall device input pin; logic ‘‘H’’ represents IN+ > IN−.

W-phase Hall device input pin; logic ‘‘H’’ represents IN+ > IN−.

voltage must be stabilized so as to eliminate ripple and noise.

adjusted, a voltage is externally applied to the ADJ pin through a low impedance. If the
voltage appliedisincreased, the factor drops; conversely,if it is reduced, the factor rises.
The factor varies between 0 and 2 times that of the open state. (The voltage is set inside
to approx. V

/2 internally, and the input impedance is approx. 5 kΩ.)

CC

Output current detection pin. Current feedback is applied to the control section by
connecting Rf between this pin and GND. The lower oversaturation prevention circuit
and torque ripple correction circuit are activated in accordance with this pin voltage.
Since the oversaturation prevention level is set with this voltage, the lower
oversaturation prevention effect may deteriorate in the high current range if the Rf value
is reduced to an extremely low level. The PWR and SENSE pins must always be
connected.

U-phase output pin
V-phase output pin

(Built-in spark killer diode)

W-phase output pin

of the motor GND wire which contains Rf, the effect that GND common impedance
exerts on Rf can be eliminated. (This pin must not be left open.)

No.5131 - 4/13

Block Diagram

LB1889, 1889M, 1889D

Hall amplifier

Control amplifier 1

Hall input combination unit

(linear matrix)

Combined output

logarithmic compression unit

Differential

distribution &

torque ripple

correction

unit

Output stage

Logarithmic

inverse

transformation

& differential

distribution

Upper
saturation
prevention
control

Drive distribution circuit & lower
saturation prevention control

Feedback
amplifier

Control amplifier 2

Forward/
reverse
selection

Reference

voltage

FG amplifier

No.5131 - 5/13

Pin Assignment [LB1889]

LB1889, 1889M, 1889D

Note: FRAME must be connected to GND for GND

potential stablization.

Pd—Ta

Allowable power dissipation, Pd — W

Ambient temperature, Ta —°C

Top view

No.5131 - 6/13

Pin Assignment [LB1889M]

LB1889, 1889M, 1889D

(PACKAGE : MFP-36S-LF)

Note: Although there is no internal connection between the FRAME pin

and GND, FRAME must be connected to GND externally for GND
potential stabilization.

Pd—Ta

Allowalle power dissipation, Pd — W

Ambient temperature, Ta —°C

Top view

No.5131 - 7/13

Pin Assignment [LB1889D]

LB1889, 1889M, 1889D

DIP-28HS bent opposite

(Resin side)

Top view

Pd—Ta

Allowable power dissipation, Pd — W

Ambient temperature, Ta —°C

No.5131 - 8/13

LB1889, 1889M, 1889D

Sample Application Circuit [LB1889]

Power GND

Forward/reverse instructing

voltage supply pin

ADJ voltage supply pin

Vs

Vcc

Current limit setting voltage supply

Hall input

pin

CTL REF voltage supply pin

Torque instructing voltage supply pin

FG output pin

Hall output

Hall output

Note: The constants provided in this sample application circuit are provided by way of example and are not intended to guarantee the characteristics.

GaAs is

recommended as the

Hall device.

Hall

output

Hall bias resistor R is

selected to match the

sensor output.

No.5131 - 9/13

LB1889, 1889M, 1889D

Sample Application Circuit [LB1889M]

Power GND

Forward/reverse instructing voltage

supply pin

ADJ voltage supply pin

Vs

Vcc

Current limit setting voltage supply pin

CTL REF voltage supply pin

Torque instructing voltage supply pin

Hall output

Hall input

FG output pin

Hall output

GaAs is recommended

as the Hall device.

Hall

output

Note: The constants provided in this sample application circuit are provided by way of example and are not intended to guarantee the characteristics.

Hall bias resistor R is

selected to match the

sensor output.

No.5131 - 10/13

LB1889, 1889M, 1889D

Sample Application Circuit [LB1889D]

Forward/reverse instructing voltage

supply pin

Power GND

ADJ voltage supply pin

Vs

Vcc

Current limit setting voltage supply pin

CTL REF voltage supply pin

Torque instructing voltage supply pin

Hall output

(Resign side)

Hall output

Hall input

Hall bias resistor R is selected

to match the sensor output.

FG output pin

Note: The constants provided in this sample application circuit are provided by way of example and are not intended to guarantee the characteristics.

GaAs is

recommended as

the Hall device.

Hall

output

No.5131 - 11/13

LB1889, 1889M, 1889D

Pin Input/Output Equivalent Circuit

Pin name Input/Output Equivalent Circuit

Uin (+)
Uin (–)
Vin (+)
Vin (–)
Win (+)
Win (–)

U-OUT
V-OUT
W-OUT
V

S

Rf (POWER)
Rf (SENSE)

Each (+) input

Each output

Each (−) input

Lower oversaturation
prevention circuit input block

CTL
LIM
CTLREF

FR
ADJ

Continued on next page.

No.5131 - 12/13

LB1889, 1889M, 1889D

Continued from preceding page.

Pin name Input/Output Equivalent Circuit

FGin (–)
FGin (+)

FGOUT
FC

No products described or contained herein are intended for use in surgical implants, life-support systems, aerospace equipment,
nuclear power control systems, vehicles, disaster/crime-prevention equipment and the like, the failure of which may directly or
indirectly cause injury, death or property loss.

Anyone purchasing any products described or contained herein for an above-mentioned use shall:
1 Accept full responsibility and indemnify and defend SANYO ELECTRIC CO., LTD., its affiliates, subsidiaries and distributors

and all their officers and employees, jointly and severally, against any and all claims and litigation and all damages, cost and
expenses associated with such use:

2 Not impose any responsibility for any fault or negligence which may be cited in any such claim or litigation on SANYO

ELECTRIC CO., LTD., its affiliates, subsidiaries and distributors or any of their officers and employees jointly or severally.

Information (including circuit diagrams and circuit parameters) herein is for example only; it is not guaranteed for volume
production. SANYO believes information herein is accurate and reliable, but no guarantees are made or implied regarding its use
or any infringements of intellectual property rights or other rights of third parties.

This catalog provides information as of September, 1995. Specifications and information herein are subject to change without notice.

No.5131 - 13/13