No. 3976-2/6
LB1857M
Electrical Characteristics at Ta = 25°C, VCC1 = 5 V, VCC2 = 7 V, VS= 3 V
Ratings
Parameter Symbol Conditions
min typ max
Unit
I
CC
1 VBR= 5 V 4.5 6.5 mA
Supply current I
CC
2 VBR= 5 V 13 20 mA
I
S
VBR= 5 V, RL= ∞ 6.5 9.0 mA
Output quiescent current
I
CCOQ
V
STBY
= 0 V 180 µA
I
SOQ
V
STBY
= 0 V, RL= ∞ 150 µA
Output saturation voltage V
O(sat)
I
OUT
= 0.6 A, sink + source 2.3 V
Output TRS withstand voltage V
O(sus)
I
OUT
= 20 mA*1 16 V
Output quiescent voltage V
OQ
VBR= 5 V 1.4 1.5 1.6 V
Hall amplifier input offset voltage V
HOFFSET
*1 –5 +5 mV
Hall amplifier common mode input
V
HCOM
1.4 2.8 V
voltage range
Hall I/O voltage gain GV
HO
Rangle = 8.2 kΩ 32.0 35.0 38.0 dB
Brake pin high level voltage V
BRH
2.0 V
Brake pin low level voltage V
BRL
0.8 V
Brake pin input current I
BRIN
100 µA
Brake pin leakage current I
BRLEAK
–30 µA
FRC pin high level voltage V
FRCH
2.8 V
FRC pin low level voltage V
FRCL
1.2 V
FRC pin input current I
FRCIN
100 µA
FRC pin leakage current I
FRCLEAK
–30 µA
Upper side residual voltage V
XH
I
OUT
= 100 mA, VCC2 = 6 V, VS= 2 V 0.32 0.49 V
Lower side residual voltage V
XL
I
OUT
= 100 mA, VCC2 = 6 V, VS= 2 V 0.39 0.48 V
Overlap level OL V
CC
2 = 6 V, VS= 3 V 60 70 80 %
Standby on voltage V
STBYL
*2 –0.2 +0.1 V
Standby off voltage V
STBYH
2 5 V
Standby pin bias current I
STBYIN
10 µA
Thermal protection circuit operating
T
TSD
*1 150 180 210 °C
temperature
Thermal protection circuit hysteresis
∆T
TSD
*1 15 °C
[FG amplifier]
Input offset voltage V
FG OFFSET
–8 +8 mV
Open loop voltage gain GV
FG
f = 1 kHz 60 dB
Source output saturation voltage V
FG OU
IO= –2 mA 3.7 V
Sink output saturation voltage V
FG OD
IO= 2 mA 1.3 V
Common mode signal exclusion ratio CHR *1 80 dB
FG amplifier common mode input
V
FG CH
0 3.5 V
voltage range
Phase margin φM *1 20 deg
Schmitt amplifier threshold voltage V
FGS SH
V
FGIN
+
= 2.5 V,
2.45 2.50 2.55 V
when V
FGOUT
2 goes from high to low
Schmitt amplifier hysteresis width V
FGS HIS
V
FGIN
+
= 2.5 V 20 40 60 mV
Note: 1. These are target settings, and are not measured. The overlap ratings are taken as test ratings without change.
2. When the standby pin is open the IC will be in the standby state.