SANYO LB11820M Datasheet

Monolithic Linear IC
61202RM (OT) No. 7104-1/17
SANYO Electric Co.,Ltd. Semiconductor Company
TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110-8534 JAPAN
Direct PWM Drive Brushless Pre-Driver for
Household Appliance Motors
Ordering number : ENN7104A
Parameter Symbol Conditions Ratings Unit
Maximum supply voltage 1 V
CC
1 max VCC1 14.5 V
Maximum supply voltage 2 V
CC
2 max VCC2 14.5 V
Maximum supply voltage 3 V
CC
3 max VCC320V
Specifications
Absolute Maximum Ratings at Ta = 25°C
Any and all SANYO products described or contained herein do not have specifications that can handle applications that require extremely high levels of reliability, such as life-support systems, aircraft’s control systems, or other applications whose failure can be reasonably expected to result in serious physical and/or material damage. Consult with your SANYO representative nearest you before using any SANYO products described or contained herein in such applications.
SANYO assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all SANYO products described or contained herein.
Overview
The LB11820M is a direct PWM drive pre-driver IC that is appropriate for 3-phase power brushless motors. This IC can implement motor driver circuits that provide the desired output capabilities (voltage and current) by the use of appropriate discrete transistors in the output circuit. The LB11820M is optimal for driving the large motors used in air conditioners and on-demand hot water heaters.
Functions and Features
• Three-phase bipolar drive
• Direct PWM drive
• Built-in braking function (Short braking)
• Forward/reverse switching function
• Reverse motion mode protection circuit
• Full complement of protection circuits, include current limiter, low-voltage protection, and motor constraint (rotor locking) protection circuits
• Supports control from either a command voltage or a PWM duty input.
Package Dimensions
unit: mm
3073C-MFP30SD (375mil)
SANYO: MFP30SD(375mil)
[LB11820M]
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No. 7104-2/17
LB11820M
Parameter Symbol Conditions
Ratings
Unit
min typ max Supply current 1 ICC1-1 15 20 mA Supply current 2 I
CC
1-2 When stopped 2.5 4 mA [Output Block] Output voltage 1-1 V
OUT
1-1 Low level, IO= 400 µA 0.1 0.3 V
Output voltage 1-2 V
OUT
1-2 Low level, IO= 10 mA 0.8 1.1 V
Output voltage 2 V
OUT
2 High level, IO= –20 mA
VCC1 – 1.1 VCC1 – 0.9
V
Temperature coefficient 1-1 V
OUT
1-1 Design target value*, low level, IO= 400 µA 0.2 mV / °C
Temperature coefficient 1-2 V
OUT
1-2 Design target value*, low level, IO = 10 mA –1.5 mV / °C
Temperature coefficient 2 V
OUT
2 Design target value*, high level, IO= –20 mA 1.5 mV / °C [12 V Voltage Output (12REG pin)] Output voltage V12REG V
CC
3 = 15 V, IO= –30 mA 11.7 12.1 12.6 V
Line regulation
V12REG1
VCC3 = 13.5 to 19 V, IO= –30 mA 150 300 mV
Load regulation
V12REG2
IO= –5 to –45 mA, VCC3 = 15 V 100 200 mV
Temperature coefficient
V12REG3
Design target value* 2 mV / °C
[5 V Voltage Output (VREG pin)] Output voltage VREG 4.7 5.0 5.3 V Line regulation
VREG1
VCC1 = 8 to 13.5 V 40 100 mV
Load regulation
VREG2
IO= –5 to –20 mA 5 30 mV
Temperature coefficient
VREG3
Design target value* 0 mV / °C
[Hall Amplifier Block] Input bias current
IHB(HA)
–2 –0.5 µA
Common-mode input voltage range 1
VICM1
When Hall effect devices are used 0.5
VCC1 – 2.0
V
Common-mode input voltage range 2
VICM2
When single-sided input bias is used (Hall IC application)
0 VCC1 V Hall input sensitivity 50 mVp-p Hysteresis
VIN(HA)
20 30 50 mV
Input voltage low––>high
VSLH(HA)
5 15 25 mV Input voltage high––>low
VSHL(HA)
–25 –15 –5 mV
Parameter Symbol Conditions Ratings Unit
Maximum output current I
O
max The UL, VL, WL, UH, VH, and WH pins 40 mA Maximum RF pin applied voltage VRF max 4 V Maximum LVS pin applied voltage VLVS max 20 V Maximum TOC pin applied voltage VTOC max V
CC
2 V Maximum VCTL pin applied voltage VCTL max 14.5 V Allowable power dissipation Pd max Independent IC 0.9 W Operating temperature Topr –20 to +100 °C Storage temperature Tstg –55 to +150 °C
Parameter Symbol Conditions Ratings Unit
Supply voltage range 1-1 V
CC
1-1 VCC1 8 to 13.5 V
Supply voltage range 1-2 V
CC
1-2 VCC1, with VCC1 and VREG shorted together 4.5 to 5.5 V
Supply voltage range 2 V
CC
2 VCC2 4.5 to VCC1 V
Supply voltage range 3 V
CC
3 VCC3 13.5 to 19 V
Output current I
O
The UL, VL, WL, UH, VH, and WH pins 30 mA 12 V regulator voltage output current I12REG –50 mA 5 V regulator voltage output current IREG –20 mA HP pin applied voltage VHP 0 to 13.5 V HP pin output current IHP 0 to 10 mA
Allowable Operating Ranges at Ta = 25°C
Electrical Characteristics at Ta = 25°C, VCC1 = 12 V, VCC2 = V
REG
* : These are design target values and are not tested.
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No. 7104-3/17
LB11820M
Parameter Symbol Conditions
Ratings
Unit
min typ max [VCTL Pin] Input voltage 1 VCTL1 Output duty : 0% 1.05 1.4 1.75 V Input voltage 2 VCTL2 Output duty : 100% 3.0 3.5 4.1 V Input bias current 1 IB1(CTL) VCTL = 0 V –80 –60 µA Input bias current 2 IB2(CTL) VCTL = 5 V 60 80 µA [PWM Oscillator (PWM pin)] High-level output voltage
VOH(PWM)
2.75 3.0 3.25 V
Low-level output voltage
VOL(PWM)
1.0 1.2 1.3 V External capacitor charge current ICHG VPWM = 2.1 V –60 –45 –30 µA Oscillator frequency f(PWM) C = 1000pF 17.6 22 26.8 kHz Amplitude V(PWM) 1.6 1.8 2.1 Vp-p [TOC pin] Input voltage 1 VTOC1 Output duty : 0% 2.72 3.0 3.30 V Input voltage 2 VTOC2 Output duty : 100% 0.99 1.2 1.34 V Input voltage 1L VTOC1L
Design target value*, when VCC2 = 4.7 V, 0%
2.72 2.80 2.90 V
Input voltage 2L VTOC2L
Design target value*, when VCC2 = 4.7 V, 100%
0.99 1.08 1.17 V
Input voltage 1H VTOC1H
Design target value*, when VCC2 = 5.3 V, 0%
3.08 3.20 3.30 V
Input voltage 2H VTOC2H
Design target value*, when VCC2 = 5.3 V, 100%
1.11 1.22 1.34 V [HP pin] Output saturated voltage VHPL I
O
= 7 mA 0.15 0.5 V
Output leakage current IHP leak V
O
= 13.5 V 10 µA [CSD Oscillator (CSD pin)] High-level output voltage
VOH(CSD)
3.2 3.6 4.0 V
Low-level output voltage
VOL(CSD)
0.9 1.1 1.3 V External capacitor charge current ICHG1 –14 –10 –6 µA External capacitor discharge current ICHG2 7 11 15 µA Oscillator frequency f(CSD) C = 0.01 µF 200 Hz Amplitude V(CSD) 2.2 2.5 2.75 Vp-p [Current Limiter Circuit (RF pin)] Limiter voltage VRF 0.45 0.5 0.55 V [Low-Voltage Protection Circuit (LVS pin)] Operating voltage VSDL 3.6 3.8 4.0 V Release voltage VSDH 4.1 4.3 4.5 V Hysteresis VSD 0.35 0.5 0.65 V [Thermal Shutdown Circuit (Thermal protection circuit)] Thermal shutdown temperature TSD Design target value* (Junction temperature) 125 145 165 ˚C Hysteresis TSD Design target value* (Junction temperature) 20 25 30 ˚C [PWMIN Pin] Input frequency f(PI) 50 kHz High-level input voltage V
IH
(PI) 2.0 VREG V
Low-level input voltage V
IL
(PI) 0 1.0 V
Input open voltage V
IO
(PI)
VREG – 0.5
VREG V
Hysteresis V
IS
(PI) 0.2 0.3 0.4 V
High-level input current I
IH
(PI) VPWMIN = VREG –10 0 10 µA
Low-level input current I
IL
(PI) VPWMIN = 0 V –130 –96 µA [S/S Pin] High-level input voltage V
IH
(SS) 2.0 VREG V Low-level input voltage V
IL
(SS) 0 1.0 V Input open voltage V
IO
(SS)
VREG – 0.5
VREG V
Hysteresis V
IS
(SS) 0.2 0.3 0.4 V High-level input current I
IH
(SS) VS/S = VREG –10 0 10 µA
Low-level input current I
IL
(SS) VS/S = 0 V –130 –96 µA
* : These are design target values and are not tested.
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No. 7104-4/17
LB11820M
Parameter Symbol Conditions
Ratings
Unit
min typ max [F/R Pin] High-level input voltage V
IH
(FR) 2.0 VREG V
Low-level input voltage V
IL
(FR) 0 1.0 V
Input open voltage V
IO
(FR)
VREG – 0.5
VREG V
Hysteresis V
IS
(FR) 0.2 0.3 0.4 V
High-level input current I
IH
(FR) VF/R = VREG –10 0 10 µA
Low-level input current I
IL
(FR) VF/R = 0 V –130 –96 µA [BR Pin] High-level input voltage V
IH
(BR) 2.0 VREG V
Low-level input voltage V
IL
(BR) 0 1.0 V
Input open voltage V
IO
(BR)
VREG – 0.5
VREG V
Hysteresis V
IS
(BR) 0.2 0.3 0.4 V
High-level input current I
IH
(BR) VBR = VREG –10 0 10 µA
Low-level input current I
IL
(BR) VBR = 0 V –130 –96 µA [REVSEL Pin] High-level input voltage
VIH(RSEL)
2.0 VREG V
Low-level input voltage
VIL(RSEL)
0 1.0 V
Input open voltage
VIO(RSEL)
VREG – 0.5
VREG V
High-level input current
IIH(RSEL)
VREVSEL = VREG –10 0 10 µA
Low-level input current
IIL(RSEL)
VREVSEL = 0 V –130 –96 µA
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No. 7104-5/17
LB11820M
Ambient temperature, Ta — °C
Allowable power dissipation, Pdmax — W
When the OFF mode is selected during reversing at the REVSEL pin, it is necessary to specify the Hall input condition. With F/R = "L", the condition in which the Hall input is entered in the order from 1 to 6 in the above table is considered the forward rotation and that in the
reverse order is considered reversing. With F/R = "H", the condition in which the Hall input is entered in the order from 6 to 1 in the above table is considered the forward rotation and that in the
reverse order is considered reversing.
When S/S and PWMIN pins are not used, set the input to the L level voltage. When REVSEL and BR pins are not used, set the input to the H level voltage or the open condition.
F / R = (L) F / R = (H) Output
IN1 IN2 IN3 IN1 IN2 IN3 PWM – 1 H L H L H L VH UL 2 H L L L H H WH UL 3 H H L L L H WH VL 4 L H L H L H UH VL 5 L H H H L L UH WL 6 L L H H H L VH WL
Three-Phase Logic Truth Table (IN = "H" refers to the state where IN+> IN–.)
S/S Pin
Independent IC
Input state State
High or open Stop
Low Start
REVSEL Pin
Input state State
High or open
Low Off in reverse
BR Pin
Input state State
High or open
Low Brake
PWIM Pin
Input state State
High or open Output off
Low Output on
Pin Assignment
No. 7104-6/17
LB11820M
Pin No.
1
2 4 6 3 5 7
8
Pin
RF
WH
VH UH
WL
VL
UL
V
CC
1
Equivalent circuitFunction
Output current detection Connect a resistor (Rf) between this pin and ground. Set with the maximum output current I
OUT
= 0.5/Rf.
Output pin (external TR drive output) Duty control made on UH, VH, and WH sides.
Power supply (output and Hall input blocks). Normally used with the 12 V power supply. Connect to V
CC
2 and VREG for application with the 5 V single power supply. Connect a capacitor between this pin and GND for stabilization.
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