c 2-wire/4-wire conversion
c Line driver
c Transmitting amplifier
c Receiving amplifier (with ATT)
c Power supply switching circuit
c Impedance matching
c DTMF interface
c Key tone interface
c BN circuit network switching circuit
(BN = Balancing Network)
Signal processor block
c Record preamplifier (with ALC)
c Record amplifier
c Power amplifier (V
c Playback equalizer amplifier
c Voice detector (VOX)
c Electronic volume control (4 dB, 7 steps)
Crosspoint switch block
c Crosspoint switches (mixing available)
c CPU interface
=5V,RL=8Ω,PO= 200 mW)
CC
Package Dimensions
unit : mm
3159-QFP64E
[LA8515NM]
SANYO : QIP64E
Features
c Because it is possible to switch the Balancing Network
between two systems, one for the near end and one for the
far end, in accordance with the line current, this IC provides
excellent sidetone characteristics over a wide range of line
currents.
c Receiver amplifier supports ceramic receivers and dynamic
receivers.
c Power amplifier on chip
(V
=5V,RL=8Ω,PO= 200 mW).
CC
c Crosspoint switches allow full mixing, permitting the
implementation of a variety of functions, such as three- or
four-way calls.
c Digital volume control on chip (power system output).
120 × 120 × 1.5 mm3glass epoxy board
Independent IC
Allowable power dissipation, Pd max − W
Ambient temperature, Ta − °C
SANYO Electric Co.,Ltd. Semiconductor Bussiness Headquarters
TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110 JAPAN
41596HA (II) No.5421-1/31
LA8518NM
Specifications
Maximum Ratings at Ta = 25°C
ParameterSymbolConditionsRatingsUnit
V
maxSpeech network block15V
Maximum supply voltage
Line currentI
Allowable power dissipationPd max1.05W
Operating temperatureTopr–20 to +70°C
Storage temperatureTstg–40 to +150°C
Operating Conditions at Ta = 25°C
ParameterSymbolConditionsRatingsUnit
Recommended supply voltageV
Operating supply voltage rangeV
Operating Characteristics at Ta = 25°C,f=1kHz
ParameterSymbolConditionsmintypmaxUnit
[Speech Network Block (External power supply operating characteristics)]
Line voltageV
Pin 31 voltage 1V
Pin 31 voltage 2V
Quiescent currentI
OXL
OXH
VRW
REF
CK
H
L
CH1
CH2
CCO
LA8518NM
–24 dBV input0.3V
–27 dBV input4.8V
3.8dB
2.12.32.5V
500kHz
3V
1.5V
The voltage applied to pin 31 is effective3.5V
The voltage supplied from pin 64 is effective1.2V
Power amplifier on192635mA
No.5421-4/31
Block Diagram
LA8518NM
No.5421-5/31
Test Circuit Diagram
LA8518NM
No.5421-6/31
Sample Application Circuit
LA8518NM
No.5421-7/31
LA8518NM
— Serial control data format —
c Serial data content
First bit
A0 to A6→Specify the address of a crosspoint switch and a control switch.
D→Turns the crosspoint switch on and off and controls the control switch.
(WhenD=1,theswitch is on; whenD=0,theswitch is off.)
c Example: Turning address 11 (AUX input, RF1 output) on
The address table is shown on the following page:
Note 1: Because there is a power-on reset function, all crosspoint switches and control switches are reset when the external power
supply (V
at pin 31) is turned on.
CC
Note 2: SW2 and SW3 in the block diagram are controlled by the MUTE pin (pin 51); the signals that are enabled are shown
00All crosspoint switches and control switches off*2
38Mixing switch for PB amplifier-OGM amplifier on
39Transmitting/receiving CTL (SW1 and SW2 in the block diagram) *1
3AReceiver amplifier ATTSet to 0 dB
3BLine amplifier ATTSet to –6 dB
3CALC on
3DPB amplifier on
3EREC amplifier on
3FPower amplifier on
40Electronic volume control0 dB
41Electronic volume control–4dB
42Electronic volume control–8dB
43Electronic volume control–12dB
44Electronic volume control–16dB
*1: When address 39 is on, SW1 enables the transmitting amplifier output (pin 58) signal, and SW4 enables the receiving
amplifier output (pin 7) or KT (pin 55) signal. If voltage is not supplied to pin 31 (V
) (power is off), the status of SW1
CC
and SW4 is the same as address 39 is in on state.
*2: When setting address 00 and 40 to 47, ‘‘D’’ data may be either ‘‘0’’ or ‘‘1’’.
Note 1: The receiver amplifier ATT is set to −6 dB when power is first applied, when a reset is performed, and when all of the
switches are off.
Note 2: The line amplifier ATT is set to 0 dB when power is first applied, when a reset is performed, and when all of the switches
are off.
Note 3: The electronic volume control is set to 0 dB when power is first applied, when a reset is performed, and when all of the
switches are off.
Note 4: The addresses are given in hexadecimal notation.
No.5421-9/31
Input Port Timing
LA8518NM
c f
c f
c f
c t
c t
c t
c t
c t
c t
MAX
WL
WH
CS
CH
DS
DH
WC
WR
(Maximum clock frequency)500 kHz
(Clock pulse width ‘‘L’’)1µs or longer
(Clock pulse width ‘‘H’’)1µs or longer
(Chip enable setup time)1µs or longer
(Chip enable hold time)1µs or longer
(Data setup time)1µs or longer
(Data hold time)1µs or longer
(Chip enable pulse width)1µs or longer
(Reset pulse width)1µs or longer
Note: The control data must input 400 ms or longer after the supply voltage is applied to V
CC
(pin 31).
No.5421-10/31
Loading...
+ 21 hidden pages
You need points to download manuals.
1 point = 1 manual.
You can buy points or you can get point for every manual you upload.